Searched defs:ASR (Results 1 - 8 of 8) sorted by relevance
/external/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.h | 40 ASR, ///< Arithmetic shift right. enumerator in enum:llvm::AVRISD::NodeType
|
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64AddressingModes.h | 36 ASR, enumerator in enum:llvm::AArch64_AM::ShiftExtendType 57 case AArch64_AM::ASR: return "asr"; 78 case 2: return AArch64_AM::ASR; 106 case AArch64_AM::ASR: STEnc = 2; break;
|
/external/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.h | 356 ASR, enumerator in enum:llvm::AArch64SE::ShiftExtSpecifiers
|
/external/llvm/lib/Transforms/IPO/ |
H A D | MergeFunctions.cpp | 1073 unsigned int ASR = GEPR->getPointerAddressSpace(); local 1075 if (int Res = cmpNumbers(ASL, ASR))
|
/external/v8/src/arm/ |
H A D | constants-arm.h | 259 ASR = 2 << 5, // Arithmetic shift right. enumerator in enum:v8::internal::ShiftOp
|
/external/vixl/src/aarch32/ |
H A D | disasm-aarch32.cc | 7151 // ASR<c>{<q>} {<Rd>}, <Rm>, #<imm> ; T2 7448 // ASR<c>{<q>} {<Rdm>}, <Rdm>, <Rs> ; T1 7471 // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1 7475 Operand(Register(rm), ASR, Register(rs))); local 7478 // MOVS{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1 7482 Operand(Register(rm), ASR, Register(rs))); local 9330 // SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn>, ASR #<amount> ; T1 NOLINT(whitespace/line_length) 9334 Operand(Register(rn), ASR, amount)); local 9449 // USAT{<c>}{<q>} <Rd>, #<imm>, <Rn>, ASR #<amount> ; T1 NOLINT(whitespace/line_length) 9453 Operand(Register(rn), ASR, amoun local 19249 Operand(Register(rm), ASR, amount)); local [all...] |
/external/v8/src/arm64/ |
H A D | constants-arm64.h | 333 ASR = 0x2, enumerator in enum:v8::internal::Shift
|
/external/vixl/src/aarch64/ |
H A D | constants-aarch64.h | 278 ASR = 0x2, enumerator in enum:vixl::aarch64::Shift
|
Completed in 315 milliseconds