/external/llvm/lib/Analysis/ |
H A D | DemandedBits.cpp | 76 APInt &KnownZero2, APInt &KnownOne2) { 94 KnownZero2 = APInt(BitWidth, 0); 96 computeKnownBits(const_cast<Value *>(V2), KnownZero2, KnownOne2, DL, 200 AB &= ~KnownZero2; 204 AB &= ~(KnownZero & ~KnownZero2); 320 APInt KnownZero, KnownOne, KnownZero2, KnownOne2; local 338 KnownZero2, KnownOne2); 73 determineLiveOperandBits( const Instruction *UserI, const Instruction *I, unsigned OperandNo, const APInt &AOut, APInt &AB, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2) argument
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H A D | ValueTracking.cpp | 237 APInt &KnownZero2, APInt &KnownOne2, 249 computeKnownBits(Op1, KnownZero2, KnownOne2, Depth + 1, Q); 254 if ((KnownZero2 & MaskV) == MaskV) { 269 computeKnownBits(Op1, KnownZero2, KnownOne2, Depth + 1, Q); 275 std::swap(KnownZero2, KnownOne2); 279 APInt PossibleSumZero = ~LHSKnownZero + ~KnownZero2 + CarryIn; 283 APInt CarryKnownZero = ~(PossibleSumZero ^ LHSKnownZero ^ KnownZero2); 288 APInt RHSKnown = KnownZero2 | KnownOne2; 304 if (LHSKnownZero.isNegative() && KnownZero2.isNegative()) 316 APInt &KnownZero2, APIn 235 computeKnownBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, unsigned Depth, const Query &Q) argument 314 computeKnownBitsMul(Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, unsigned Depth, const Query &Q) argument 792 computeKnownBitsFromShiftOperator(Operator *I, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, unsigned Depth, const Query &Q, KZFunctor KZF, KOFunctor KOF) argument [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDILISelLowering.cpp | 284 APInt KnownZero2; local 298 KnownZero2, 303 assert((KnownZero2 & KnownOne2) == 0 307 KnownZero &= KnownZero2;
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 839 APInt KnownZero2, KnownOne2; local 848 DAG.ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, 851 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 855 KnownZero &= KnownZero2;
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1241 APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut; local 1272 KnownZero2, KnownOne2, TLO, Depth+1)) 1274 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1278 if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask)) 1283 if ((NewMask & (KnownZero|KnownZero2)) == NewMask) 1286 if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask)) 1295 KnownZero |= KnownZero2; 1303 KnownZero2, KnownOne2, TLO, Depth+1)) 1305 assert((KnownZero2 [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 464 APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut; local 494 KnownZero2, KnownOne2, TLO, Depth+1)) 496 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 500 if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask)) 505 if ((NewMask & (KnownZero|KnownZero2)) == NewMask) 508 if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask)) 517 KnownZero |= KnownZero2; 525 KnownZero2, KnownOne2, TLO, Depth+1)) 527 assert((KnownZero2 [all...] |
/external/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 2926 APInt KnownZero2; local
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1890 APInt KnownZero2, KnownOne2; local 1899 DAG.computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1903 KnownZero &= KnownZero2;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 744 APInt KnownZero2, KnownOne2; local 746 DAG.computeKnownBits(Op->getOperand(1), KnownZero2, KnownOne2, Depth + 1); 747 KnownZero &= KnownZero2;
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