Searched defs:MMX (Results 1 - 9 of 9) sorted by relevance

/external/fec/
H A Dencode_rs_8.c12 static enum {UNKNOWN=0,MMX,SSE,SSE2,ALTIVEC,PORT} cpu_mode; enumerator in enum:__anon6367
32 } else if(f & (1<<23)){ /* MMX is present */
33 cpu_mode = MMX;
58 case MMX:
H A Dfec.h261 extern enum cpu_mode {UNKNOWN=0,PORT,MMX,SSE,SSE2,ALTIVEC} Cpu_mode; enumerator in enum:cpu_mode
/external/swiftshader/src/Common/
H A DCPUID.hpp29 static bool supportsMMX2(); // MMX instructions added by SSE: pshufw, pmulhuw, pmovmskb, pavgw/b, pextrw, pinsrw, pmaxsw/ub, etc.
50 static bool MMX; member in class:sw::CPUID
84 return MMX && enableMMX;
H A DCPUID.cpp32 bool CPUID::MMX = detectMMX(); member in class:sw::CPUID
178 return MMX = (registers[3] & 0x00800000) != 0;
/external/llvm/include/llvm/IR/
H A DIntrinsics.h91 Void, VarArg, MMX, Token, Metadata, Half, Float, Double, enumerator in enum:llvm::Intrinsic::IITDescriptor::IITDescriptorKind
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86Subtarget.h45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 enumerator in enum:llvm::X86Subtarget::X86SSEEnum
56 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
172 bool hasMMX() const { return X86SSELevel >= MMX; }
/external/llvm/lib/Target/X86/
H A DX86Subtarget.h53 NoThreeDNow, MMX, ThreeDNow, ThreeDNowA enumerator in enum:llvm::final::X863DNowEnum
71 /// MMX, 3DNow, 3DNow Athlon, or none supported.
394 bool hasMMX() const { return X863DNowLevel >= MMX; }
/external/clang/lib/CodeGen/
H A DCGBuiltin.cpp6764 MMX, enumerator in enum:X86Features
6796 .Case("mmx", X86Features::MMX)
/external/swiftshader/src/Reactor/
H A DNucleus.hpp382 class MMX : public Variable<MMX> class in namespace:sw

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