| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| H A D | Passes.cpp | 50 FunctionPass *llvm::createRegisterAllocator(CodeGenOpt::Level OptLevel) { argument
66 // When the 'default' allocator is requested, pick one based on OptLevel.
67 switch (OptLevel) {
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| /external/swiftshader/third_party/LLVM/lib/Target/ |
| H A D | TargetSubtargetInfo.cpp | 26 CodeGenOpt::Level OptLevel,
25 enablePostRAScheduler( CodeGenOpt::Level OptLevel, AntiDepBreakMode& Mode, RegClassVector& CriticalPathRCs) const argument
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| /external/llvm/tools/opt/ |
| H A D | opt.cpp | 228 /// OptLevel.
230 /// OptLevel - Optimization Level
233 TargetMachine *TM, unsigned OptLevel,
239 Builder.OptLevel = OptLevel;
244 } else if (OptLevel > 1) {
245 Builder.Inliner = createFunctionInliningPass(OptLevel, SizeLevel);
251 DisableLoopUnrolling : OptLevel == 0;
258 Builder.LoopVectorize = OptLevel > 1 && SizeLevel < 2;
262 DisableSLPVectorization ? false : OptLevel >
231 AddOptimizationPasses(legacy::PassManagerBase &MPM, legacy::FunctionPassManager &FPM, TargetMachine *TM, unsigned OptLevel, unsigned SizeLevel) argument
[all...] |
| /external/llvm/include/llvm-c/ |
| H A D | ExecutionEngine.h | 45 unsigned OptLevel; member in struct:LLVMMCJITCompilerOptions
85 unsigned OptLevel,
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| /external/llvm/lib/Target/Lanai/ |
| H A D | LanaiSubtarget.cpp | 44 CodeGenOpt::Level OptLevel)
40 LanaiSubtarget(const Triple &TargetTriple, StringRef Cpu, StringRef FeatureString, const TargetMachine &TM, const TargetOptions &Options, CodeModel::Model CodeModel, CodeGenOpt::Level OptLevel) argument
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| H A D | LanaiTargetMachine.cpp | 61 CodeGenOpt::Level OptLevel)
64 CodeModel, OptLevel),
65 Subtarget(TT, Cpu, FeatureString, *this, Options, CodeModel, OptLevel),
56 LanaiTargetMachine(const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString, const TargetOptions &Options, Optional<Reloc::Model> RM, CodeModel::Model CodeModel, CodeGenOpt::Level OptLevel) argument
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| /external/llvm/lib/Transforms/IPO/ |
| H A D | InlineSimple.cpp | 93 Pass *llvm::createFunctionInliningPass(unsigned OptLevel, argument
96 llvm::computeThresholdFromOptLevels(OptLevel, SizeOptLevel));
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| H A D | MachineFunctionAnalysis.h | 29 CodeGenOpt::Level OptLevel; member in struct:llvm::MachineFunctionAnalysis
39 CodeGenOpt::Level getOptLevel() const { return OptLevel; }
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| H A D | AlphaTargetMachine.cpp | 41 CodeGenOpt::Level OptLevel) {
46 CodeGenOpt::Level OptLevel) {
40 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
45 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| H A D | BlackfinTargetMachine.cpp | 40 CodeGenOpt::Level OptLevel) {
41 PM.add(createBlackfinISelDag(*this, OptLevel));
39 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| H A D | SPUSubtarget.cpp | 51 CodeGenOpt::Level OptLevel,
65 return OptLevel >= CodeGenOpt::Default;
50 enablePostRAScheduler( CodeGenOpt::Level OptLevel, TargetSubtargetInfo::AntiDepBreakMode& Mode, RegClassVector& CriticalPathRCs) const argument
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| H A D | SPUTargetMachine.cpp | 53 CodeGenOpt::Level OptLevel) {
61 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { argument
52 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| H A D | MBlazeSubtarget.cpp | 56 enablePostRAScheduler(CodeGenOpt::Level OptLevel, argument
62 return HasItin && OptLevel >= CodeGenOpt::Default;
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| H A D | MBlazeTargetMachine.cpp | 50 CodeGenOpt::Level OptLevel) {
59 CodeGenOpt::Level OptLevel) {
49 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
58 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| H A D | MSP430TargetMachine.cpp | 41 CodeGenOpt::Level OptLevel) {
43 PM.add(createMSP430ISelDag(*this, OptLevel));
48 CodeGenOpt::Level OptLevel) {
40 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
47 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| H A D | PTXMFInfoExtract.cpp | 36 PTXMFInfoExtract(PTXTargetMachine &TM, CodeGenOpt::Level OptLevel) argument
66 CodeGenOpt::Level OptLevel) {
67 return new PTXMFInfoExtract(TM, OptLevel);
65 createPTXMFInfoExtract(PTXTargetMachine &TM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| H A D | SparcTargetMachine.cpp | 39 CodeGenOpt::Level OptLevel) {
48 CodeGenOpt::Level OptLevel){
38 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
47 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| H A D | SystemZTargetMachine.cpp | 36 CodeGenOpt::Level OptLevel) {
38 PM.add(createSystemZISelDag(*this, OptLevel));
35 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| H A D | XCoreTargetMachine.cpp | 36 CodeGenOpt::Level OptLevel) {
35 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
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| /external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelDAGToDAG.cpp | 41 CodeGenOpt::Level OptLevel)
42 : SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
116 CodeGenOpt::Level OptLevel) {
117 return new WebAssemblyDAGToDAGISel(TM, OptLevel);
40 WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &tm, CodeGenOpt::Level OptLevel) argument
115 createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOpt::Level OptLevel) argument
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| /external/swiftshader/third_party/LLVM/include/llvm/Transforms/IPO/ |
| H A D | PassManagerBuilder.h | 31 /// Builder.OptLevel = 2;
75 unsigned OptLevel; member in class:llvm::PassManagerBuilder
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| H A D | ARMSubtarget.cpp | 212 CodeGenOpt::Level OptLevel,
218 return PostRAScheduler && OptLevel >= CodeGenOpt::Default;
211 enablePostRAScheduler( CodeGenOpt::Level OptLevel, TargetSubtargetInfo::AntiDepBreakMode& Mode, RegClassVector& CriticalPathRCs) const argument
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| H A D | ARMTargetMachine.cpp | 98 CodeGenOpt::Level OptLevel) {
99 if (OptLevel != CodeGenOpt::None && EnableGlobalMerge)
106 CodeGenOpt::Level OptLevel) {
107 PM.add(createARMISelDag(*this, OptLevel));
112 CodeGenOpt::Level OptLevel) {
114 if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
116 if (OptLevel != CodeGenOpt::None && Subtarget.isCortexA9())
122 CodeGenOpt::Level OptLevel) {
124 if (OptLevel != CodeGenOpt::None) {
135 if (OptLevel !
97 addPreISel(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
105 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
111 addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
121 addPreSched2(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
145 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
154 addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, JITCodeEmitter &JCE) argument
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| H A D | PPCTargetMachine.cpp | 64 CodeGenOpt::Level OptLevel) {
71 CodeGenOpt::Level OptLevel) {
78 CodeGenOpt::Level OptLevel,
63 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
70 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
77 addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, JITCodeEmitter &JCE) argument
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86TargetMachine.cpp | 112 CodeGenOpt::Level OptLevel) {
114 PM.add(createX86ISelDag(*this, OptLevel));
124 CodeGenOpt::Level OptLevel) {
130 CodeGenOpt::Level OptLevel) {
136 CodeGenOpt::Level OptLevel) {
138 if (OptLevel != CodeGenOpt::None &&
153 CodeGenOpt::Level OptLevel,
111 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
123 addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
129 addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
135 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) argument
152 addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, JITCodeEmitter &JCE) argument
|