/external/llvm/lib/CodeGen/ |
H A D | AllocationOrder.cpp | 31 const VirtRegMap &VRM, 35 const MachineFunction &MF = VRM.getMachineFunction(); 36 const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo(); 38 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); 30 AllocationOrder(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo, const LiveRegMatrix *Matrix) argument
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H A D | RegAllocBase.h | 63 VirtRegMap *VRM; member in class:llvm::RegAllocBase 75 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {}
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H A D | CalcSpillWeights.cpp | 28 VirtRegMap *VRM, 36 VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm); 79 VirtRegMap *VRM, 82 unsigned Original = VRM ? VRM->getOriginal(Reg) : 0; 97 if (VRM) { 109 VRM->getOriginal(Reg) != Original) 232 if (isRematerializable(li, LIS, VRM, *MF.getSubtarget().getInstrInfo())) 26 calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF, VirtRegMap *VRM, const MachineLoopInfo &MLI, const MachineBlockFrequencyInfo &MBFI, VirtRegAuxInfo::NormalizingFn norm) argument 77 isRematerializable(const LiveInterval &LI, const LiveIntervals &LIS, VirtRegMap *VRM, const TargetInstrInfo &TII) argument
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H A D | VirtRegMap.cpp | 163 VirtRegMap *VRM; member in class:__anon12656::VirtRegRewriter 219 VRM = &getAnalysis<VirtRegMap>(); 223 DEBUG(VRM->dump()); 226 LIS->addKillFlags(VRM); 235 getAnalysis<LiveDebugVariables>().emitDebugValues(VRM); 239 VRM->clearAllVirt(); 299 unsigned PhysReg = VRM->getPhys(VirtReg); 399 unsigned PhysReg = VRM->getPhys(VirtReg);
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H A D | SplitKit.h | 80 const VirtRegMap &VRM; member in class:llvm::SplitAnalysis 240 VirtRegMap &VRM; member in class:llvm::SplitEditor
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H A D | LiveDebugVariables.cpp | 267 void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI); 270 void emitDebugValues(VirtRegMap *VRM, 355 void emitDebugValues(VirtRegMap *VRM); 914 UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) { argument 924 if (VRM.isAssignedReg(VirtReg) && 925 TargetRegisterInfo::isPhysicalRegister(VRM.getPhys(VirtReg))) { 929 Loc.substPhysReg(VRM.getPhys(VirtReg), TRI); 930 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) { 932 Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg)); 987 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveInterval argument 1020 emitDebugValues(VirtRegMap *VRM) argument 1033 emitDebugValues(VirtRegMap *VRM) argument [all...] |
H A D | RegAllocPBQP.cpp | 136 void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller); 140 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, 147 VirtRegMap &VRM, 153 VirtRegMap &VRM) const; 561 void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, argument 614 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller); 638 VirtRegMap &VRM, Spiller &VRegSpiller) { 641 LiveRangeEdit LRE(&LIS.getInterval(VReg), NewIntervals, MF, LIS, &VRM, 665 VirtRegMap &VRM, 676 VRM 635 spillVReg(unsigned VReg, SmallVectorImpl<unsigned> &NewIntervals, MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, Spiller &VRegSpiller) argument 663 mapPBQPToRegAlloc(const PBQPRAGraph &G, const PBQP::Solution &Solution, VirtRegMap &VRM, Spiller &VRegSpiller) argument 746 VirtRegMap &VRM = getAnalysis<VirtRegMap>(); local [all...] |
H A D | InlineSpiller.cpp | 66 VirtRegMap &VRM; member in class:__anon12551::HoistSpillHelper 116 Loops(pass.getAnalysis<MachineLoopInfo>()), VRM(vrm), 137 VirtRegMap &VRM; member in class:__anon12551::InlineSpiller 174 Loops(pass.getAnalysis<MachineLoopInfo>()), VRM(vrm), 328 VRM.getOriginal(Reg) == Original; 977 StackSlot = VRM.assignVirt2StackSlot(Original); 984 VRM.assignVirt2StackSlot(Edit->getReg(), StackSlot); 1026 Original = VRM.getOriginal(edit.getReg()); 1027 StackSlot = VRM.getStackSlot(Original); 1367 LiveRangeEdit Edit(nullptr, NewVRegs, MF, LIS, &VRM, thi [all...] |
H A D | LiveIntervalAnalysis.cpp | 648 void LiveIntervals::addKillFlags(const VirtRegMap *VRM) { argument 666 for (MCRegUnitIterator Units(VRM->getPhys(Reg), TRI); Units.isValid();
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | AllocationOrder.cpp | 26 const VirtRegMap &VRM, 29 const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg); 31 VRM.getRegInfo().getRegAllocationHint(VirtReg); 38 Hint = VRM.getPhys(Hint); 42 const TargetRegisterInfo &TRI = VRM.getTargetRegInfo(); 46 VRM.getMachineFunction()); 61 VRM.getMachineFunction()); 25 AllocationOrder(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo) argument
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H A D | LiveRangeEdit.cpp | 34 VirtRegMap &VRM) { 35 MachineRegisterInfo &MRI = VRM.getRegInfo(); 37 VRM.grow(); 38 VRM.setIsSplitFromReg(VReg, VRM.getOriginal(OldReg)); 212 LiveIntervals &LIS, VirtRegMap &VRM, 217 MachineRegisterInfo &MRI = VRM.getRegInfo(); 301 bool IsOriginal = VRM.getOriginal(LI->reg) == LI->reg; 305 Dups.push_back(&createFrom(LI->reg, LIS, VRM)); 310 VRM 32 createFrom(unsigned OldReg, LiveIntervals &LIS, VirtRegMap &VRM) argument 211 eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead, LiveIntervals &LIS, VirtRegMap &VRM, const TargetInstrInfo &TII) argument [all...] |
H A D | LiveRangeEdit.h | 133 LiveInterval &create(LiveIntervals &LIS, VirtRegMap &VRM) { argument 134 return createFrom(getReg(), LIS, VRM);
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H A D | SplitKit.h | 44 const VirtRegMap &VRM; member in class:llvm::SplitAnalysis 206 VirtRegMap &VRM; member in class:llvm::SplitEditor
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H A D | StackSlotColoring.cpp | 61 VirtRegMap* VRM; member in class:__anon18598::StackSlotColoring 257 if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters()) 282 unsigned Reg = VRM->getFirstUnusedRegister(RC); 304 VRM->setRegisterUsed(Reg); 309 VRM->setRegisterUsed(*AS); 725 VRM = &getAnalysis<VirtRegMap>(); 732 if (NumSlots == 0 || !VRM->HasUnusedRegisters())
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H A D | VirtRegMap.h | 522 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) { argument 523 VRM.print(OS);
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H A D | VirtRegRewriter.cpp | 93 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM, argument 118 if (!VRM.hasPhys(reg)) 120 unsigned pReg = VRM.getPhys(reg); 424 VirtRegMap &VRM); 442 VirtRegMap &VRM) { 447 Rejected, RegKills, KillOps, VRM); 679 VirtRegMap &VRM) { 680 MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg); 696 unsigned Phys = VRM.getPhys(VirtReg); 873 VirtRegMap &VRM) { 437 GetRegForReload(unsigned VirtReg, unsigned PhysReg, MachineInstr *MI, AvailableSpills &Spills, std::vector<MachineInstr*> &MaybeDeadStores, BitVector &RegKills, std::vector<MachineOperand*> &KillOps, VirtRegMap &VRM) argument [all...] |
H A D | InlineSpiller.cpp | 61 VirtRegMap &VRM; member in class:__anon18527::InlineSpiller 146 VRM(vrm), 311 VRM.getOriginal(Reg) == Original; 729 VRM.addSpillSlotUse(StackSlot, MII); 890 LiveInterval &NewLI = Edit->createFrom(Original, LIS, VRM); 961 Edit->eliminateDeadDefs(DeadDefs, LIS, VRM, TII); 1046 VRM.addSpillSlotUse(StackSlot, FoldMI); 1067 VRM.addSpillSlotUse(StackSlot, MI); 1083 VRM.addSpillSlotUse(StackSlot, MI); 1168 LiveInterval &NewLI = Edit->createFrom(Reg, LIS, VRM); [all...] |
H A D | LiveDebugVariables.cpp | 260 void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI); 263 void emitDebugValues(VirtRegMap *VRM, 344 void emitDebugValues(VirtRegMap *VRM); 876 UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) { argument 886 if (VRM.isAssignedReg(VirtReg) && 887 TargetRegisterInfo::isPhysicalRegister(VRM.getPhys(VirtReg))) { 891 Loc.substPhysReg(VRM.getPhys(VirtReg), TRI); 892 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT && 893 VRM.isSpillSlotUsed(VRM 956 emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, const TargetInstrInfo &TII) argument 989 emitDebugValues(VirtRegMap *VRM) argument 999 emitDebugValues(VirtRegMap *VRM) argument [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 55 VirtRegMap *VRM; member in class:llvm::VirtRegAuxInfo 66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {} 75 VirtRegMap *VRM,
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H A D | LiveRegMatrix.h | 41 VirtRegMap *VRM; member in class:llvm::LiveRegMatrix
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H A D | VirtRegMap.h | 184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) { argument 185 VRM.print(OS);
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H A D | LiveRangeEdit.h | 65 VirtRegMap *VRM; member in class:llvm::LiveRangeEdit 131 VRM(vrm), TII(*MF.getSubtarget().getInstrInfo()), TheDelegate(delegate),
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.cpp | 259 const VirtRegMap *VRM, 273 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); 287 } else if (VRM && VRM->hasPhys(Paired)) { 288 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); 255 getRegAllocationHints(unsigned VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const argument
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