Searched defs:dividend (Results 1 - 3 of 3) sorted by relevance

/art/compiler/optimizing/
H A Dcode_generator_arm64.cc3287 Register dividend = InputRegisterAt(instruction, 0); local
3295 __ Mov(out, dividend);
3297 __ Neg(out, dividend);
3310 Register dividend = InputRegisterAt(instruction, 0); local
3319 __ Add(temp, dividend, abs_imm - 1);
3320 __ Cmp(dividend, 0);
3321 __ Csel(out, temp, dividend, lt);
3329 __ Asr(temp, dividend, bits - 1);
3331 __ Add(out, dividend, temp);
3345 Register dividend local
3411 Register dividend = InputRegisterAt(instruction, 0); local
[all...]
H A Dcode_generator_arm.cc4040 Register dividend = locations->InAt(0).AsRegister<Register>(); local
4048 __ Mov(out, dividend);
4050 __ rsb(out, dividend, ShifterOperand(0));
4064 Register dividend = locations->InAt(0).AsRegister<Register>(); local
4071 __ Lsr(temp, dividend, 32 - ctz_imm);
4073 __ Asr(temp, dividend, 31);
4076 __ add(out, temp, ShifterOperand(dividend));
4098 Register dividend = locations->InAt(0).AsRegister<Register>(); local
4108 __ smull(temp2, temp1, dividend, temp1);
4111 __ add(temp1, temp1, ShifterOperand(dividend));
[all...]
H A Dcode_generator_arm_vixl.cc4033 vixl32::Register dividend = InputRegisterAt(instruction, 0); local
4041 __ Mov(out, dividend);
4043 __ Rsb(out, dividend, 0);
4057 vixl32::Register dividend = InputRegisterAt(instruction, 0); local
4064 __ Lsr(temp, dividend, 32 - ctz_imm);
4066 __ Asr(temp, dividend, 31);
4069 __ Add(out, temp, dividend);
4091 vixl32::Register dividend = InputRegisterAt(instruction, 0); local
4102 __ Smull(temp2, temp1, dividend, temp1);
4105 __ Add(temp1, temp1, dividend);
[all...]

Completed in 46 milliseconds