/external/llvm/lib/Target/Mips/ |
H A D | MipsISelDAGToDAG.h | 122 // getImm - Return a target constant with the specified value. 123 inline SDValue getImm(const SDNode *Node, uint64_t Imm) { function in class:llvm::MipsDAGToDAGISel
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/external/llvm/include/llvm/MC/ |
H A D | MCInst.h | 74 int64_t getImm() const { function in class:llvm::MCOperand
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/external/swiftshader/third_party/LLVM/include/llvm/MC/ |
H A D | MCInst.h | 69 int64_t getImm() const { function in class:llvm::MCOperand
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/external/llvm/include/llvm/CodeGen/ |
H A D | MachineOperand.h | 410 int64_t getImm() const { function in class:llvm::MachineOperand
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/external/llvm/utils/TableGen/ |
H A D | CodeGenInstruction.h | 330 int64_t getImm() const { assert(isImm()); return Imm; } function in struct:llvm::CodeGenInstAlias::ResultOperand
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/ |
H A D | MBlazeAsmParser.cpp | 146 const MCExpr *getImm() const { function in struct:__anon18768::MBlazeOperand 194 addExpr(Inst, getImm()); 282 getImm()->print(OS); 379 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getImm(), S, E);
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
H A D | CodeGenInstruction.h | 304 int64_t getImm() const { assert(isImm()); return Imm; } function in struct:llvm::CodeGenInstAlias::ResultOperand
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/external/llvm/lib/Target/Lanai/AsmParser/ |
H A D | LanaiAsmParser.cpp | 144 const MCExpr *getImm() const { function in struct:llvm::__anon13040::LanaiOperand 392 addExpr(Inst, getImm()); 397 addExpr(Inst, getImm()); 402 addExpr(Inst, getImm()); 407 addExpr(Inst, getImm()); 441 addExpr(Inst, getImm()); 446 addExpr(Inst, getImm()); 451 if (const MCConstantExpr *ConstExpr = dyn_cast<MCConstantExpr>(getImm())) 454 else if (isa<LanaiMCExpr>(getImm())) { 456 const LanaiMCExpr *SymbolRefExpr = dyn_cast<LanaiMCExpr>(getImm()); [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 259 const MCExpr *getImm() const { function in class:__anon13141::SparcOperand 292 case k_Immediate: OS << "Imm: " << getImm() << "\n"; break; 309 const MCExpr *Expr = getImm(); 458 const MCExpr *Imm = Op->getImm(); 478 int64_t RawImmValue = IsImm ? MCValOp.getImm() : 0;
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 137 inline SDValue getImm(const SDNode *Node, uint64_t Imm) const { function in class:__anon13160::SystemZDAGToDAGISel
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/external/llvm/lib/Target/X86/AsmParser/ |
H A D | X86Operand.h | 102 const MCExpr *getImm() const { function in struct:llvm::X86Operand 142 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 156 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 170 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 184 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 195 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 422 addExpr(Inst, getImm()); 426 addExpr(Inst, getImm());
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H A D | X86AsmParser.cpp | 283 int64_t getImm() { return Imm + IC.execute(); } function in class:__anon13205::X86AsmParser::IntelExprStateMachine 1411 ImmDisp, SM.getImm(), BracLoc, StartInBrac, 1415 if (SM.getImm() || !Disp) { 1416 const MCExpr *Imm = MCConstantExpr::create(SM.getImm(), getContext()); 1653 const MCExpr *Disp = MCConstantExpr::create(SM.getImm(), getContext()); 1818 int64_t Imm = SM.getImm(); 2497 if (Op1.isImm() && isa<MCConstantExpr>(Op1.getImm()) && 2498 cast<MCConstantExpr>(Op1.getImm())->getValue() == 1) 2502 if (Op1.isImm() && isa<MCConstantExpr>(Op1.getImm()) && 2503 cast<MCConstantExpr>(Op1.getImm()) [all...] |
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | MachineOperand.h | 360 int64_t getImm() const { function in class:llvm::MachineOperand
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/external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 166 const MCExpr *getImm() const { function in struct:__anon18835::X86Operand 202 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 219 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 236 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 251 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 267 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 302 addExpr(Inst, getImm()); 920 if (Op1->isImm() && isa<MCConstantExpr>(Op1->getImm()) && 921 cast<MCConstantExpr>(Op1->getImm())->getValue() == 1) { 931 if (Op1->isImm() && isa<MCConstantExpr>(Op1->getImm()) [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonHardwareLoops.cpp | 323 unsigned getImm() const { function in class:__anon12993::CountValue 741 int64_t StartV = Start->getImm(); 742 int64_t EndV = End->getImm(); 816 StartV = Start->getImm(); 818 EndV = End->getImm(); 892 EndValInstr->getOperand(2).getImm() == StartV) { 1221 int64_t CountImm = TripCount->getImm(); 1392 return (EndVal->getImm() == Imm); 1462 Val = MO.getImm(); 1510 unsigned Sub2 = DI->getOperand(2).getImm(); [all...] |
/external/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 392 int64_t getImm() const { function in struct:__anon13107::PPCOperand 453 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } 454 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); } 455 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); } 456 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); } 457 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); } 458 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); } 459 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); } 461 isUInt<6>(getImm()) && 462 (getImm() [all...] |
/external/llvm/lib/Target/SystemZ/AsmParser/ |
H A D | SystemZAsmParser.cpp | 220 const MCExpr *getImm() const { function in class:__anon13152::SystemZOperand 279 addExpr(Inst, getImm());
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/external/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 223 bool isOffset() const { return isImmTy(ImmTyOffset) && isUInt<16>(getImm()); } 224 bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<16>(getImm()); } 225 bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); } 324 int64_t getImm() const { function in class:__anon12860::AMDGPUOperand 387 Inst.addOperand(MCOperand::createImm(getImm())); 472 OS << '<' << getImm(); 2273 return isImm() && isUInt<8>(getImm()); 2279 return isImm() && !isUInt<8>(getImm()) && isUInt<32>(getImm()); 2439 bool result = isImm() && getImmTy() == ImmTyDppCtrl && isUInt<9>(getImm()); [all...] |
/external/llvm/lib/Target/Hexagon/AsmParser/ |
H A D | HexagonAsmParser.cpp | 232 const MCExpr *getImm() const { function in struct:__anon12949::HexagonOperand 245 const MCExpr *myMCExpr = &HexagonMCInstrInfo::getExpr(*getImm()); 359 Inst.addOperand(MCOperand::createExpr(getImm())); 365 const_cast<HexagonMCExpr *>(cast<HexagonMCExpr>(getImm())); 557 dyn_cast<MCConstantExpr>(&HexagonMCInstrInfo::getExpr(*getImm())); 564 dyn_cast<MCConstantExpr>(&HexagonMCInstrInfo::getExpr(*getImm())); 608 getImm()->print(OS, nullptr); 758 int64_t Value (I.getImm());
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 476 const MCExpr *getImm() const { function in class:__anon18719::ARMOperand 518 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 526 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 534 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 542 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 550 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 558 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 566 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 574 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 582 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); [all...] |
/external/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 339 const MCExpr *getImm() const { function in class:__anon12830::AArch64Operand 444 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); 453 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); 462 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); 471 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); 515 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); 517 return isSymbolicUImm12Offset(getImm(), Scale); 526 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); 535 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); 544 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); [all...] |
/external/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 937 addExpr(Inst, getImm()); 946 addExpr(Inst, getImm()); 964 const MCExpr *Expr = getImm(); 1026 return isImm() && isa<MCConstantExpr>(getImm()); 1184 const MCExpr *getImm() const { function in class:__anon13062::MipsOperand 1190 const MCExpr *Val = getImm(); 1539 if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm())) 1541 if (OffsetToAlignment(Offset.getImm(), 1569 if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm())) 1571 if (OffsetToAlignment(Offset.getImm(), [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 629 const MCExpr *getImm() const { function in class:__anon12918::ARMOperand 683 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm())) 692 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm())) 749 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 756 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 763 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 770 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 777 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 784 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 791 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); [all...] |