Searched defs:imm (Results 1 - 25 of 150) sorted by relevance

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/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_bitarit.c219 lp_build_shl_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm) argument
221 LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm);
222 assert(imm <= bld->type.width);
231 lp_build_shr_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm) argument
233 LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm);
234 assert(imm <= bld->type.width);
H A Dlp_bld_tgsi_info.c50 float imm[128][4]; member in struct:analysis_context
75 assert(src->Index < Elements(ctx->imm));
76 if (src->Index < Elements(ctx->imm)) {
77 chan_info->u.value = ctx->imm[src->Index][swizzle];
443 if (ctx.num_imms < Elements(ctx.imm)) {
446 ctx.imm[ctx.num_imms][chan] = value;
/external/v8/src/arm/
H A Dconstants-arm.cc27 uint64_t imm = high16 << 48; local
29 memcpy(&d, &imm, 8);
/external/v8/src/crankshaft/arm64/
H A Ddelayed-masm-arm64-inl.h38 void DelayedMasm::Fmov(FPRegister fd, double imm) { argument
40 __ Fmov(fd, imm);
/external/pcre/dist2/src/sljit/
H A DsljitNativeMIPS_32.c29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst_ar, sljit_sw imm) argument
31 if (!(imm & ~0xffff))
32 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
34 if (imm < 0 && imm >= SIMM_MIN)
35 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
37 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar));
38 return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SLJIT_SUCCESS;
H A DsljitNativePPC_32.c29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) argument
31 if (imm <= SIMM_MAX && imm >= SIMM_MIN)
32 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm));
34 if (!(imm & ~0xffff))
35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm));
37 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16)));
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS;
101 return push_inst(compiler, ADDI | D(dst) | A(src1) | compiler->imm);
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H A DsljitNativeSPARC_32.c27 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw imm) argument
29 if (imm <= SIMM_MAX && imm >= SIMM_MIN)
30 return push_inst(compiler, OR | D(dst) | S1(0) | IMM(imm), DR(dst));
32 FAIL_IF(push_inst(compiler, SETHI | D(dst) | ((imm >> 10) & 0x3fffff), DR(dst)));
33 return (imm & 0x3ff) ? push_inst(compiler, OR | D(dst) | S1(dst) | IMM_ARG | (imm & 0x3ff), DR(dst)) : SLJIT_SUCCESS;
H A DsljitNativeMIPS_64.c29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst_ar, sljit_sw imm) argument
37 if (!(imm & ~0xffff))
38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
40 if (imm < 0 && imm >= SIMM_MIN)
41 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
43 if (imm <= 0x7fffffffl && imm >= -0x80000000l) {
44 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar));
45 return (imm
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H A DsljitNativePPC_64.c44 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) argument
51 if (imm <= SIMM_MAX && imm >= SIMM_MIN)
52 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm));
54 if (!(imm & ~0xffff))
55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm));
57 if (imm <= 0x7fffffffl && imm >= -0x80000000l) {
58 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16)));
59 return (imm
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H A DsljitNativeX86_32.c29 static sljit_s32 emit_do_imm(struct sljit_compiler *compiler, sljit_u8 opcode, sljit_sw imm) argument
37 sljit_unaligned_store_sw(inst, imm);
H A DsljitNativeX86_64.c29 static sljit_s32 emit_load_imm64(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) argument
38 sljit_unaligned_store_sw(inst, imm);
331 static sljit_s32 emit_do_imm32(struct sljit_compiler *compiler, sljit_u8 rex, sljit_u8 opcode, sljit_sw imm) argument
342 sljit_unaligned_store_s32(inst, imm);
/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_parse.c148 struct tgsi_full_immediate *imm = &ctx->FullToken.FullImmediate; local
151 memset(imm, 0, sizeof *imm);
152 copy_token(&imm->Immediate, &token);
154 imm_count = imm->Immediate.NrTokens - 1;
156 switch (imm->Immediate.DataType) {
159 next_token(ctx, &imm->u[i].Float);
165 next_token(ctx, &imm->u[i].Uint);
171 next_token(ctx, &imm->u[i].Int);
H A Dtgsi_transform.c70 const struct tgsi_full_immediate *imm)
74 ti += tgsi_build_full_immediate(imm,
69 emit_immediate(struct tgsi_transform_context *ctx, const struct tgsi_full_immediate *imm) argument
/external/mesa3d/src/gallium/drivers/r300/
H A Dr300_tgsi_to_rc.c297 struct tgsi_full_immediate * imm,
306 if (imm->u[i].Float == 0.0f) {
308 } else if (imm->u[i].Float == 0.5f && ttr->use_half_swizzles) {
310 } else if (imm->u[i].Float == 1.0f) {
326 constant.u.Immediate[i] = imm->u[i].Float;
296 handle_immediate(struct tgsi_to_rc * ttr, struct tgsi_full_immediate * imm, unsigned index) argument
H A Dr300_vs.c185 struct ureg_src imm; local
191 imm = ureg_imm4f(ureg, 0, 0, 0, 1);
193 ureg_MOV(ureg, dst, imm);
H A Dr300_fs.c233 struct ureg_src imm; local
238 imm = ureg_imm4f(ureg, 0, 0, 0, 1);
240 ureg_MOV(ureg, out, imm);
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
H A DMBlazeISelDAGToDAG.cpp119 /// can be more efficiently represented with [r+imm].
127 int32_t imm = 0;
129 if (isIntS32Immediate(N.getOperand(1), imm))
145 /// a signed 32-bit displacement [r+imm], and if it is not better
154 int32_t imm = 0; local
155 if (isIntS32Immediate(N.getOperand(1), imm)) {
156 Disp = CurDAG->getTargetConstant(imm, MVT::i32);
209 SDValue imm = CurDAG->getTargetConstant(0, MVT::i32); local
215 return CurDAG->SelectNodeTo(Node, Opc, VT, TFI, imm);
216 return CurDAG->getMachineNode(Opc, dl, VT, TFI, imm);
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/
H A DMBlazeMCCodeEmitter.cpp86 void EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const;
126 EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const { argument
127 int32_t val = (int32_t)imm.getImm();
/external/valgrind/none/tests/amd64/
H A Daes.c224 static void AESKEYGENASSIST(int imm, char* s_argL, char* s_exp) argument
236 if (imm == 1)
247 else if (imm == 2)
258 else if (imm == 8)
276 printf ("aeskeygenassist %d %s result %s\n", imm, s_argL, s_res);
282 int imm; // only for aeskeygenassist member in struct:Aes_Args
365 AESKEYGENASSIST(aes_args[i].imm, aes_args[i].argL, "");
/external/vixl/src/
H A Dutils-vixl.cc131 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size) { argument
135 if ((imm & 0xffff) == 0) {
138 imm >>= 16;
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp34 static unsigned translateShiftImm(unsigned imm) { argument
36 assert((imm & ~0x1f) == 0 && "Invalid shift encoding");
38 if (imm == 0)
40 return imm;
56 O << "<imm:";
121 O << ", " << markup("<imm:") << "#"
279 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << markup(">");
330 O << markup("<imm:") << "#-" << formatImm(-OffImm) << markup(">");
332 O << markup("<imm:") << "#" << formatImm(OffImm) << markup(">");
391 O << ", " << markup("<imm
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/external/llvm/lib/Target/Sparc/
H A DSparc.h150 inline static unsigned HI22(int64_t imm) { argument
151 return (unsigned)((imm >> 10) & ((1 << 22)-1));
154 inline static unsigned LO10(int64_t imm) { argument
155 return (unsigned)(imm & 0x3FF);
158 inline static unsigned HIX22(int64_t imm) { argument
159 return HI22(~imm);
162 inline static unsigned LOX10(int64_t imm) { argument
163 return ~LO10(~imm);
/external/mesa3d/src/gallium/auxiliary/util/
H A Du_simple_shaders.c142 struct ureg_src imm = ureg_imm4f( ureg, 0, 0, 0, 1 ); local
144 ureg_MOV( ureg, out, imm );
185 struct ureg_src imm; local
205 imm = ureg_imm4f( ureg, 0, 0, 0, 1 );
207 ureg_MOV( ureg, out, imm );
231 struct ureg_src imm; local
256 imm = ureg_imm4f( ureg, 0, 0, 0, 1 );
258 ureg_MOV( ureg, out, imm );
285 struct ureg_src imm; local
305 imm
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/external/mesa3d/src/mesa/drivers/dri/nouveau/
H A Dnouveau_vbo_t.c59 GLboolean imm = (render->mode == IMM); local
72 imm ? array->BufferObj : NULL,
73 array->Ptr, imm, ctx);
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
H A DPTXISelDAGToDAG.cpp57 bool SelectImm(const SDValue &operand, SDValue &imm);
211 // Match memory operand of the form [reg], [imm+reg], and [reg+imm]
256 // let SelectADDRii handle the [imm] case
271 // let SelectADDRii handle the [imm+imm] case
275 // try [reg+imm] and [imm+reg]
282 // neither [reg+imm] nor [imm
341 SelectImm(const SDValue &operand, SDValue &imm) argument
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