/external/vixl/src/aarch32/ |
H A D | instructions-aarch32.cc | 630 uint32_t imm8 = imm >> (24 - shift); local 632 if ((imm8 <= 0xff) && ((imm8 & 0x80) != 0) && (overflow == 0)) { 633 SetEncodingValue(((shift + 8) << 7) | (imm8 & 0x7F)); 687 uint32_t imm8 = (imm << rot) | (imm >> (32 - rot)); local 688 if (imm8 <= 0xff) { 689 SetEncodingValue((rot << 7) | imm8);
|
H A D | operands-aarch32.h | 554 static float Decode(uint32_t imm8, const FloatType<float>&) { argument 555 return VFP::Imm8ToFP32(imm8); 558 static double Decode(uint32_t imm8, const FloatType<double>&) { argument 559 return VFP::Imm8ToFP64(imm8); 627 // - an immediate constant, such as <imm8>, <imm12>
|
H A D | macro-assembler-aarch32.cc | 1555 uint8_t imm8 = imm & 0xff; local 1558 if ((imm & 0xff) != imm8) return false;
|
/external/valgrind/VEX/priv/ |
H A D | guest_generic_x87.c | 775 imm8 is the original immediate from the instruction. isSTRM 779 If the given imm8 case can be handled, the return value is True. 788 UInt imm8, Bool isxSTRM ) 790 vassert(imm8 < 0x80); 794 /* Explicitly reject any imm8 values that haven't been validated, 797 switch (imm8) { 807 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 808 UInt agg = (imm8 >> 2) & 3; // imm8[ 784 compute_PCMPxSTRx( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument 1035 compute_PCMPxSTRx_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
H A D | guest_amd64_helpers.c | 3673 UInt imm8 = imm_and_return_control_bit & 7; local 3675 UInt srcOffsL = imm8 & 3; /* src offs in 32-bit (L) chunks */ 3676 UInt dstOffsL = (imm8 >> 2) & 1; /* dst offs in ditto chunks */ 3770 opc_and_imm contains (4th byte of opcode << 8) | the-imm8-byte so 3808 HWord imm8 = opc4_and_imm & 0xFF; local 3812 HWord wide = (imm8 & 1); 3853 zmaskL, zmaskR, imm8, (Bool)isxSTRM 3877 zmaskL, zmaskR, imm8, (Bool)isxSTRM 3881 // front end shouldn't pass us any imm8 variants we can't 4207 HWord imm8, 4205 amd64g_dirtyhelper_AESKEYGENASSIST( VexGuestAMD64State* gst, HWord imm8, HWord gstOffL, HWord gstOffR ) argument [all...] |
H A D | host_amd64_isel.c | 1952 /* Add64( Add64(expr1, Shl64(expr2, imm8)), simm32 ) */ 1966 IRExpr* imm8 = mi.bindee[2]; local 1968 if (imm8->tag == Iex_Const 1969 && imm8->Iex.Const.con->tag == Ico_U8 1970 && imm8->Iex.Const.con->Ico.U8 < 4 1971 /* imm8 is OK, now check simm32 */ 1975 UInt shift = imm8->Iex.Const.con->Ico.U8;
|
H A D | host_arm_defs.c | 423 ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ) { argument 426 ri84->ARMri84.I84.imm8 = imm8; 428 vassert(imm8 >= 0 && imm8 <= 255); 442 vex_printf("0x%x", ROR32(ri84->ARMri84.I84.imm8, 533 ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ) { 536 i->imm8 = imm8; 542 ULong y, x = imm->imm8; [all...] |
H A D | host_arm_defs.h | 160 ARMam2_RI=3, /* reg +/- imm8 */ 236 ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */ 246 UShort imm8; member in struct:__anon22226::__anon22227::__anon22228 256 extern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ); 291 /* imm8 = abcdefgh, B = NOT(b); 316 UInt imm8; member in struct:__anon22235 320 extern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 );
|
/external/vixl/src/aarch64/ |
H A D | instructions-aarch64.cc | 183 float Instruction::Imm8ToFP32(uint32_t imm8) { argument 187 uint32_t bits = imm8; 200 double Instruction::Imm8ToFP64(uint32_t imm8) { argument 205 uint32_t bits = imm8;
|
H A D | assembler-aarch64.h | 1768 void orr(const VRegister& vd, const int imm8, const int left_shift = 0); 1780 void bic(const VRegister& vd, const int imm8, const int left_shift = 0); 1808 const int imm8, 3029 static Instr ImmNEONabcdefgh(int imm8) { argument 3030 VIXL_ASSERT(IsUint8(imm8)); 3032 instr = ((imm8 >> 5) & 7) << ImmNEONabc_offset; 3033 instr |= (imm8 & 0x1f) << ImmNEONdefgh_offset; 3235 const int imm8, 3239 const int imm8,
|
H A D | disasm-aarch64.cc | 4481 uint64_t imm8 = instr->GetImmNEONabcdefgh(); local 4482 AppendToOutput("#0x%" PRIx64, imm8); 4485 uint64_t imm8 = instr->GetImmNEONabcdefgh(); local 4488 if (imm8 & (1 << i)) {
|
/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.cpp | 1638 uint8_t imm8; local 1658 if (consumeByte(insn, &imm8)) 1660 insn->immediates[insn->numImmediatesConsumed] = imm8;
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 1394 uint8_t imm8; local 1413 if (consumeByte(insn, &imm8)) 1415 insn->immediates[insn->numImmediatesConsumed] = imm8;
|
/external/valgrind/none/tests/amd64/ |
H A D | pcmpstr64w.c | 188 imm8 is the original immediate from the instruction. isSTRM 192 If the given imm8 case can be handled, the return value is True. 201 UInt imm8, Bool isxSTRM ) 203 assert(imm8 < 0x80); 207 /* Explicitly reject any imm8 values that haven't been validated, 210 switch (imm8) { 220 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 221 UInt agg = (imm8 >> 2) & 3; // imm8[ 197 pcmpXstrX_WRK_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
H A D | pcmpstr64.c | 183 imm8 is the original immediate from the instruction. isSTRM 187 If the given imm8 case can be handled, the return value is True. 196 UInt imm8, Bool isSTRM ) 198 assert(imm8 < 0x80); 202 /* Explicitly reject any imm8 values that haven't been validated, 205 switch (imm8) { 215 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 216 UInt agg = (imm8 >> 2) & 3; // imm8[ 192 pcmpXstrX_WRK( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isSTRM ) argument [all...] |
/external/v8/src/ia32/ |
H A D | macro-assembler-ia32.h | 375 void ShlPair(Register high, Register low, uint8_t imm8); 377 void ShrPair(Register high, Register low, uint8_t imm8); 379 void SarPair(Register high, Register low, uint8_t imm8); 811 void Pextrd(Register dst, XMMRegister src, int8_t imm8); 812 void Pinsrd(XMMRegister dst, Register src, int8_t imm8) { argument 813 Pinsrd(dst, Operand(src), imm8); 815 void Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8);
|
H A D | disasm-ia32.cc | 627 int imm8 = -1; local 657 imm8 = 1; 659 imm8 = *(data + 1); 664 if (imm8 >= 0) { 665 AppendToBuffer(",%d", imm8); 1478 // shufps xmm, xmm/m128, imm8 1482 int8_t imm8 = static_cast<int8_t>(data[1]); local 1486 static_cast<int>(imm8)); 1504 int8_t imm8 = static_cast<int8_t>(data[1]); local 1507 NameOfCPURegister(regop), static_cast<int>(imm8)); 1708 int8_t imm8 = static_cast<int8_t>(data[1]); local 1716 int8_t imm8 = static_cast<int8_t>(data[1]); local 1726 int8_t imm8 = static_cast<int8_t>(data[1]); local 1736 int8_t imm8 = static_cast<int8_t>(data[1]); local 1746 int8_t imm8 = static_cast<int8_t>(data[1]); local 1817 int8_t imm8 = static_cast<int8_t>(data[1]); local 1860 int8_t imm8 = static_cast<int8_t>(data[1]); local 1869 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | assembler-ia32.cc | 803 void Assembler::cmpb(const Operand& op, Immediate imm8) { argument 804 DCHECK(imm8.is_int8() || imm8.is_uint8()); 812 emit_b(imm8); 1069 void Assembler::rcl(Register dst, uint8_t imm8) { argument 1071 DCHECK(is_uint5(imm8)); // illegal shift count 1072 if (imm8 == 1) { 1078 EMIT(imm8); 1083 void Assembler::rcr(Register dst, uint8_t imm8) { argument 1085 DCHECK(is_uint5(imm8)); // illega 1097 ror(const Operand& dst, uint8_t imm8) argument 1118 sar(const Operand& dst, uint8_t imm8) argument 1161 shl(const Operand& dst, uint8_t imm8) argument 1181 shr(const Operand& dst, uint8_t imm8) argument 1285 test_b(Register reg, Immediate imm8) argument 1303 test_b(const Operand& op, Immediate imm8) argument 2416 shufps(XMMRegister dst, XMMRegister src, byte imm8) argument 2527 extractps(Register dst, XMMRegister src, byte imm8) argument 2851 rorx(Register dst, const Operand& src, byte imm8) argument 2958 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
H A D | macro-assembler-ia32.cc | 2510 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { argument 2511 if (imm8 == 0) { 2515 DCHECK_EQ(1, imm8); 2518 pextrd(dst, src, imm8); 2526 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { argument 2527 DCHECK(imm8 == 0 || imm8 == 1); 2530 pinsrd(dst, src, imm8); 2534 if (imm8 == 1) { 2537 DCHECK_EQ(0, imm8); [all...] |
/external/v8/src/x87/ |
H A D | disasm-x87.cc | 563 int imm8 = -1; local 593 imm8 = 1; 595 imm8 = *(data + 1); 600 if (imm8 >= 0) { 601 AppendToBuffer(",%d", imm8); 1131 // shufps xmm, xmm/m128, imm8 1135 int8_t imm8 = static_cast<int8_t>(data[1]); local 1139 static_cast<int>(imm8)); 1157 int8_t imm8 = static_cast<int8_t>(data[1]); local 1160 NameOfCPURegister(regop), static_cast<int>(imm8)); 1361 int8_t imm8 = static_cast<int8_t>(data[1]); local 1371 int8_t imm8 = static_cast<int8_t>(data[1]); local 1381 int8_t imm8 = static_cast<int8_t>(data[1]); local 1391 int8_t imm8 = static_cast<int8_t>(data[1]); local 1462 int8_t imm8 = static_cast<int8_t>(data[1]); local 1491 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | assembler-x87.cc | 385 void Assembler::mov_b(const Operand& dst, int8_t imm8) { argument 389 EMIT(imm8); 674 void Assembler::cmpb(const Operand& op, Immediate imm8) { argument 675 DCHECK(imm8.is_int8() || imm8.is_uint8()); 683 emit_b(imm8); 940 void Assembler::rcl(Register dst, uint8_t imm8) { argument 942 DCHECK(is_uint5(imm8)); // illegal shift count 943 if (imm8 == 1) { 949 EMIT(imm8); 954 rcr(Register dst, uint8_t imm8) argument 968 ror(const Operand& dst, uint8_t imm8) argument 989 sar(const Operand& dst, uint8_t imm8) argument 1032 shl(const Operand& dst, uint8_t imm8) argument 1052 shr(const Operand& dst, uint8_t imm8) argument 1156 test_b(Register reg, Immediate imm8) argument 1174 test_b(const Operand& op, Immediate imm8) argument 2097 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
/external/v8/src/x64/ |
H A D | disasm-x64.cc | 823 int imm8 = -1; local 825 imm8 = 1; 828 imm8 = *(data + count); 831 AppendToBuffer(", %d", imm8); 1658 AppendToBuffer("extractps "); // reg/m32, xmm, imm8 1670 // roundsd xmm, xmm/m64, imm8 1677 AppendToBuffer("pextrb "); // reg/m32, xmm, imm8 1683 AppendToBuffer("pextrw "); // reg/m32, xmm, imm8 1689 AppendToBuffer("pextrd "); // reg/m32, xmm, imm8 1695 AppendToBuffer("pinsrd "); // xmm, reg/m32, imm8 [all...] |
H A D | assembler-x64.cc | 985 void Assembler::cmpb_al(Immediate imm8) { argument 986 DCHECK(is_int8(imm8.value_) || is_uint8(imm8.value_)); 989 emit(imm8.value_); 2828 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) { argument 2830 DCHECK(is_uint8(imm8)); 2838 emit(imm8); 2841 void Assembler::pextrb(Register dst, XMMRegister src, int8_t imm8) { argument 2843 DCHECK(is_uint8(imm8)); 2851 emit(imm8); 2854 pextrb(const Operand& dst, XMMRegister src, int8_t imm8) argument 2867 pinsrw(XMMRegister dst, Register src, int8_t imm8) argument 2878 pinsrw(XMMRegister dst, const Operand& src, int8_t imm8) argument 2889 pextrw(Register dst, XMMRegister src, int8_t imm8) argument 2900 pextrw(const Operand& dst, XMMRegister src, int8_t imm8) argument 2913 pextrd(Register dst, XMMRegister src, int8_t imm8) argument 2925 pextrd(const Operand& dst, XMMRegister src, int8_t imm8) argument 2937 pinsrd(XMMRegister dst, Register src, int8_t imm8) argument 2950 pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) argument 2962 pinsrb(XMMRegister dst, Register src, int8_t imm8) argument 2974 pinsrb(XMMRegister dst, const Operand& src, int8_t imm8) argument 2986 insertps(XMMRegister dst, XMMRegister src, byte imm8) argument 3050 shufps(XMMRegister dst, XMMRegister src, byte imm8) argument 3292 psllq(XMMRegister reg, byte imm8) argument 3304 psrlq(XMMRegister reg, byte imm8) argument 3315 psllw(XMMRegister reg, byte imm8) argument 3325 pslld(XMMRegister reg, byte imm8) argument 3335 psrlw(XMMRegister reg, byte imm8) argument 3345 psrld(XMMRegister reg, byte imm8) argument 3355 psraw(XMMRegister reg, byte imm8) argument 3365 psrad(XMMRegister reg, byte imm8) argument 4373 rorxq(Register dst, Register src, byte imm8) argument 4385 rorxq(Register dst, const Operand& src, byte imm8) argument 4397 rorxl(Register dst, Register src, byte imm8) argument 4409 rorxl(Register dst, const Operand& src, byte imm8) argument [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1958 unsigned imm8 = fieldFromInstruction(Insn, 0, 8); local 1964 Inst.addOperand(MCOperand::createImm(imm8)); 1971 if (imm8 == 0x10 && pred != 0xe && ((FeatureBits[ARM::FeatureRAS]) != 0))
|
/external/v8/src/arm/ |
H A D | assembler-arm.cc | 1122 uint32_t imm8 = base::bits::RotateLeft32(imm32, 2 * rot); local 1123 if ((imm8 <= 0xff)) { 1125 *immed_8 = imm8;
|