Searched defs:insn (Results 1 - 25 of 98) sorted by relevance

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/external/libpcap/
H A Dbpf_dump.c32 const struct bpf_insn *insn; local
36 insn = p->bf_insns;
39 for (i = 0; i < n; ++insn, ++i) {
40 printf("%u %u %u %u\n", insn->code,
41 insn->jt, insn->jf, insn->k);
46 for (i = 0; i < n; ++insn, ++i)
48 insn->code, insn
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/external/tcpdump/
H A Dbpf_dump.c36 struct bpf_insn *insn; local
40 insn = p->bf_insns;
43 for (i = 0; i < n; ++insn, ++i) {
44 printf("%u %u %u %u\n", insn->code,
45 insn->jt, insn->jf, insn->k);
50 for (i = 0; i < n; ++insn, ++i)
52 insn->code, insn
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/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_wm_debug.c167 GLuint insn; local
170 for (insn = 0; insn < c->nr_insns; insn++)
171 brw_wm_print_insn(c, &c->instruction[insn]);
H A Dbrw_wm_pass1.c119 GLint insn; local
121 for (insn = c->nr_insns-1; insn >= 0; insn--) {
122 struct brw_wm_instruction *inst = &c->instruction[insn];
H A Dbrw_wm_pass2.c145 if (ref->insn < thisinsn) {
153 while (ref->prevuse && ref->prevuse->insn >= thisinsn)
156 grf->nextuse = ref->insn;
308 GLuint insn; local
313 for (insn = 0; insn < c->nr_insns; insn++) {
314 struct brw_wm_instruction *inst = &c->instruction[insn];
318 update_register_usage(c, insn);
330 alloc_contiguous_dest(c, inst->dst, 4, insn);
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H A Dbrw_vs_constval.c193 GLuint insn; local
222 for (insn = 0; insn < vp->program.Base.NumInstructions; insn++) {
223 struct prog_instruction *inst = &vp->program.Base.Instructions[insn];
H A Dbrw_wm_pass0.c73 ref->insn = 0;
87 ref->insn = 0;
123 ref->insn = 0;
286 struct brw_wm_instruction *insn)
294 if (insn) {
295 newref->insn = insn - c->instruction;
413 GLuint insn; local
421 for (insn = 0; insn <
283 get_new_ref( struct brw_wm_compile *c, struct prog_src_register src, GLuint i, struct brw_wm_instruction *insn) argument
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/external/libchrome/sandbox/linux/bpf_dsl/
H A Ddump_bpf.cc81 void AppendInstruction(std::string* dst, size_t pc, const sock_filter& insn) { argument
83 switch (BPF_CLASS(insn.code)) {
85 if (insn.code == BPF_LD + BPF_W + BPF_ABS) {
86 base::StringAppendF(dst, "LOAD %" PRIu32 " // ", insn.k);
88 (insn.k - offsetof(struct arch_seccomp_data, args)) /
90 if (maybe_argno < 6 && insn.k == SECCOMP_ARG_LSB_IDX(maybe_argno)) {
93 insn.k == SECCOMP_ARG_MSB_IDX(maybe_argno)) {
96 base::StringAppendF(dst, "%s\n", DataOffsetName(insn.k));
103 if (BPF_OP(insn.code) == BPF_JA) {
104 base::StringAppendF(dst, "JMP %zu\n", pc + insn
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H A Dverifier.cc35 void Ld(State* state, const struct sock_filter& insn, const char** err) { argument
36 if (BPF_SIZE(insn.code) != BPF_W || BPF_MODE(insn.code) != BPF_ABS ||
37 insn.jt != 0 || insn.jf != 0) {
41 if (insn.k < sizeof(struct arch_seccomp_data) && (insn.k & 3) == 0) {
44 reinterpret_cast<const char*>(&state->data) + insn.k, 4);
53 void Jmp(State* state, const struct sock_filter& insn, const char** err) { argument
54 if (BPF_OP(insn
103 Ret(State*, const struct sock_filter& insn, const char** err) argument
111 Alu(State* state, const struct sock_filter& insn, const char** err) argument
189 const struct sock_filter& insn = program[state.ip]; local
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H A Dcodegen_unittest.cc138 const sock_filter& insn = program.at(i - 1); local
141 if (BPF_CLASS(insn.code) == BPF_JMP) {
142 if (BPF_OP(insn.code) == BPF_JA) {
144 hash = prog_hashes.at(i + insn.k);
146 hash = Hash(insn.code, insn.k, prog_hashes.at(i + insn.jt),
147 prog_hashes.at(i + insn.jf));
149 } else if (BPF_CLASS(insn.code) == BPF_RET) {
150 hash = Hash(insn
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/external/mesa3d/src/gallium/state_trackers/d3d1x/d3d1xshader/src/
H A Dsm4_dump.cpp179 std::ostream& operator <<(std::ostream& out, const sm4_insn& insn) argument
181 out << sm4_opcode_names[insn.opcode];
182 if(insn.insn.sat)
184 for(unsigned i = 0; i < insn.num_ops; ++i)
188 out << ' ' << *insn.ops[i];
/external/google-breakpad/src/third_party/libdisasm/
H A Dia32_operand.c15 /* apply segment override to memory operand in insn */
39 x86_op_t *op, x86_insn_t *insn,
68 size = ia32_modrm_decode( buf, buf_len, op, insn,
72 size = ia32_modrm_decode( buf, buf_len, op, insn,
76 size = ia32_modrm_decode( buf, buf_len, op, insn,
80 size = ia32_modrm_decode( buf, buf_len, op, insn,
84 size = ia32_modrm_decode( buf, buf_len, op, insn,
118 if ( insn->addr_size == 4 ) {
167 insn->addr_size );
169 size = insn
38 decode_operand_value( unsigned char *buf, size_t buf_len, x86_op_t *op, x86_insn_t *insn, unsigned int addr_meth, size_t op_size, unsigned int op_value, unsigned char modrm, size_t gen_regs ) argument
232 decode_operand_size( unsigned int op_type, x86_insn_t *insn, x86_op_t *op ) argument
379 ia32_decode_operand( unsigned char *buf, size_t buf_len, x86_insn_t *insn, unsigned int raw_op, unsigned int raw_flags, unsigned int prefixes, unsigned char modrm ) argument
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H A Dx86_operand_list.c5 static void x86_oplist_append( x86_insn_t *insn, x86_oplist_t *op ) { argument
8 if (! insn ) {
12 list = insn->operands;
14 insn->operand_count = 1;
20 insn->explicit_count = 1;
21 insn->operands = op;
29 insn->operand_count = insn->operand_count + 1;
30 insn->explicit_count = insn
71 x86_operand_foreach( x86_insn_t *insn, x86_operand_fn func, void *arg, enum x86_op_foreach_type type ) argument
149 count_operand( x86_op_t *op, x86_insn_t *insn, void *arg ) argument
154 x86_operand_count( x86_insn_t *insn, enum x86_op_foreach_type type ) argument
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H A Dx86_disasm.c18 x86_insn_t *insn ){
22 if ( ! buf || ! insn || ! buf_len ) {
29 memset( insn, 0, sizeof(x86_insn_t) );
30 insn->addr = buf_rva + offset;
31 insn->offset = offset;
32 /* default to invalid insn */
33 insn->type = insn_invalid;
34 insn->group = insn_none;
52 size = ia32_disasm_addr( bytes, len, insn);
63 MAKE_INVALID( insn, byte
76 x86_insn_t insn; local
131 x86_insn_t insn; local
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H A Dx86_insn.c11 int x86_insn_is_valid( x86_insn_t *insn ) {
12 if ( insn && insn->type != insn_invalid && insn->size > 0 ) {
19 uint32_t x86_get_address( x86_insn_t *insn ) {
21 if (! insn || ! insn->operands ) {
25 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) {
40 int32_t x86_get_rel_offset( x86_insn_t *insn ) {
42 if (! insn || ! ins
155 x86_set_insn_addr( x86_insn_t *insn, uint32_t addr ) argument
159 x86_set_insn_offset( x86_insn_t *insn, unsigned int offset ) argument
163 x86_set_insn_function( x86_insn_t *insn, void * func ) argument
167 x86_set_insn_block( x86_insn_t *insn, void * block ) argument
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H A Dia32_insn.c47 /* these are not used in stack insn */
55 /* determine what this insn does to the stack */
56 static void ia32_stack_mod(x86_insn_t *insn) { argument
59 if (! insn || ! insn->operands ) {
63 dest = &insn->operands->op;
65 src = &insn->operands->next->op;
68 insn->stack_mod = 0;
69 insn->stack_mod_val = 0;
71 switch ( insn
169 ia32_handle_cpu( x86_insn_t *insn, unsigned int cpu ) argument
176 ia32_handle_mnemtype(x86_insn_t *insn, unsigned int mnemtype) argument
184 ia32_handle_notes(x86_insn_t *insn, unsigned int notes) argument
189 ia32_handle_eflags( x86_insn_t *insn, unsigned int eflags) argument
216 ia32_handle_prefix( x86_insn_t *insn, unsigned int prefixes ) argument
242 reg_32_to_16( x86_op_t *op, x86_insn_t *insn, void *arg ) argument
253 handle_insn_metadata( x86_insn_t *insn, ia32_insn_t *raw_insn ) argument
261 ia32_decode_insn( unsigned char *buf, size_t buf_len, ia32_insn_t *raw_insn, x86_insn_t *insn, unsigned int prefixes ) argument
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H A Dia32_modrm.c209 x86_op_t *op, x86_insn_t *insn, size_t gen_regs ) {
225 /* increase insn size by 1 for modrm byte */
234 if ( insn->addr_size == 2 ) {
291 insn->addr_size);
292 ea->disp_size = insn->addr_size;
208 ia32_modrm_decode( unsigned char *buf, unsigned int buf_len, x86_op_t *op, x86_insn_t *insn, size_t gen_regs ) argument
H A Dx86_format.c645 static int format_operand_att( x86_op_t *op, x86_insn_t *insn, char *buf, argument
665 insn->addr + insn->size), len );
672 insn->addr + insn->size), len );
676 insn->addr + insn->size), len );
694 if (insn->type == insn_jmp || insn->type == insn_call)
703 if (insn
719 format_operand_native( x86_op_t *op, x86_insn_t *insn, char *buf, int len) argument
783 format_operand_xml( x86_op_t *op, x86_insn_t *insn, char *buf, int len) argument
884 format_operand_raw( x86_op_t *op, x86_insn_t *insn, char *buf, int len) argument
985 x86_insn_t *insn; local
1017 format_att_mnemonic( x86_insn_t *insn, char *buf, int len) argument
1071 x86_format_mnemonic(x86_insn_t *insn, char *buf, int len, enum x86_asm_format format) argument
1089 format_op_raw( x86_op_t *op, x86_insn_t *insn, void *arg ) argument
1095 format_insn_note(x86_insn_t *insn, char *buf, int len) argument
1113 format_raw_insn( x86_insn_t *insn, char *buf, int len ) argument
1164 format_xml_insn( x86_insn_t *insn, char *buf, int len ) argument
1302 x86_format_insn( x86_insn_t *insn, char *buf, int len, enum x86_asm_format format ) argument
[all...]
/external/valgrind/tests/
H A Dpower_insn_available.c11 /* If the insn that got queried for: exists */
13 /* If the insn that got queried for: does not exist on this platform */
15 /* If the insn that got queried for: does not exist in the vocabulary of this program */
76 char *insn; local
78 fprintf(stderr, "usage: power_insn_available <insn>\n" );
82 insn = argv[1];
83 if (strcmp (insn, "dcbzl") == 0)
86 /* power_insn_available has not been taught anything about this insn yet. */
/external/mesa3d/src/gallium/drivers/nvc0/codegen/
H A Dnv50_ir_target_nvc0.cpp45 // TODO: separate version for nve4+ which doesn't like the 4-byte insn formats
470 TargetNVC0::isModSupported(const Instruction *insn, int s, Modifier mod) const argument
472 if (!isFloatType(insn->dType)) {
473 switch (insn->op) {
487 if (insn->src(s ? 0 : 1).mod.neg())
492 return insn->src(1).mod.neg() ? false : true;
500 return (mod & Modifier(opInfo[insn->op].srcMods[s])) == mod;
504 TargetNVC0::mayPredicate(const Instruction *insn, const Value *pred) const argument
506 if (insn->getPredicate())
508 return opInfo[insn
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/external/valgrind/none/tests/x86/
H A Dbug152818-x86.c47 #define EMIT_CALL(dir_insn, insn, in_eax, in_esi, in_eflags, out_eax, out_esi, out_eflags, count) \
56 insn "\t\n" \
87 int insn; local
88 for (insn = 0; insn < 4; ++insn) //b,w[rep/addr],d,w[addr/rep]
103 switch (insn)
133 switch (insn)
/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/test/validation/
H A DStructuredLockingTest.java92 AbstractInsnNode insn = mn.instructions.get(i);
93 switch (insn.getOpcode()) {
113 AbstractInsnNode insn = mn.instructions.get(i);
114 if (insn.getOpcode() > 0) {
124 .assertNoLock("No handlers for insn with lock");
155 public void execute(AbstractInsnNode insn, argument
157 super.execute(insn, interpreter);
158 switch (insn.getOpcode()) {
161 enter(((VarInsnNode) insn.getPrevious()).var);
165 exit(((VarInsnNode) insn
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/external/libunwind/include/tdep-ia64/
H A Dscript.h57 struct ia64_script_insn insn[IA64_MAX_SCRIPT_LEN]; member in struct:ia64_script
/external/linux-kselftest/tools/testing/selftests/powerpc/primitives/
H A Dload_unaligned_zeropad.c86 unsigned long insn, fixup; local
88 insn = *ex_p++;
91 if (insn == *ip) {
/external/valgrind/none/tests/tilegx/
H A Dgen_insn_test.c183 tilegx_bundle_bits insn = 0; local
192 insn = tilegx_opcodes[TILEGX_OPC_FNOP].
198 insn |= opc->fixed_bit_values[p];
262 insn |= x;
271 decode(&insn, 2, 0);
371 insn |= x;
374 decode(&insn, 2, 0);
410 return insn;
423 tilegx_bundle_bits insn = 0; local
428 insn |
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