/art/compiler/utils/arm/ |
H A D | assembler_arm_vixl.h | 75 void (func_name)(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { \ 76 MacroAssembler::func_name(vixl32::DontCare, rd, rn, operand); \ 100 void (func_name)(vixl32::Register rd, const vixl32::Operand& operand) { \ 101 MacroAssembler::func_name(vixl32::DontCare, rd, operand); \ 123 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { argument 124 if (rd.Is(rn) && operand.IsPlainRegister()) { 125 MacroAssembler::Add(rd, rn, operand); 127 MacroAssembler::Add(vixl32::DontCare, rd, rn, operand);
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/art/compiler/optimizing/ |
H A D | loop_optimization.cc | 66 // Detect a sign extension from the given type. Returns the promoted operand on success. 69 /*out*/ HInstruction** operand) { 79 *operand = instruction; 87 *operand = instruction; 103 *operand = instruction; 114 // Detect a zero extension from the given type. Returns the promoted operand on success. 117 /*out*/ HInstruction** operand) { 127 *operand = instruction; 135 *operand = instruction; 149 *operand 67 IsSignExtensionAndGet(HInstruction* instruction, Primitive::Type type, HInstruction** operand) argument 115 IsZeroExtensionAndGet(HInstruction* instruction, Primitive::Type type, HInstruction** operand) argument [all...] |
H A D | code_generator_arm.cc | 2800 ShifterOperand operand; local 2803 operand = ShifterOperand(CodeGenerator::GetInt32ValueOf(src.GetConstant())); 2806 operand = ShifterOperand(src.AsRegister<Register>()); 2810 __ mov(out.AsRegister<Register>(), operand, cond.first);
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/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 1997 void X86Assembler::shll(Register operand, Register shifter) { argument 1998 EmitGenericShift(4, Operand(operand), shifter); 2017 void X86Assembler::shrl(Register operand, Register shifter) { argument 2018 EmitGenericShift(5, Operand(operand), shifter); 2037 void X86Assembler::sarl(Register operand, Register shifter) { argument 2038 EmitGenericShift(7, Operand(operand), shifter); 2093 void X86Assembler::roll(Register operand, Register shifter) { argument 2094 EmitGenericShift(0, Operand(operand), shifter); 2103 void X86Assembler::rorl(Register operand, Register shifter) { argument 2104 EmitGenericShift(1, Operand(operand), shifte 2444 EmitOperand(int reg_or_opcode, const Operand& operand) argument 2468 EmitComplex(int reg_or_opcode, const Operand& operand, const Immediate& immediate) argument 2524 EmitGenericShift(int reg_or_opcode, const Operand& operand, const Immediate& imm) argument 2540 EmitGenericShift(int reg_or_opcode, const Operand& operand, Register shifter) argument [all...] |
/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 995 // Emit a REX.W prefix if the operand size is 64 bits. 1010 // Emit a REX.W prefix if the operand size is 64 bits. 1030 // Emit a REX.W prefix if the operand size is 64 bits. 1045 // Emit a REX.W prefix if the operand size is 64 bits. 1105 // Emit a REX.W prefix if the operand size is 64 bits. 1125 // Emit a REX.W prefix if the operand size is 64 bits. 2190 // W - 64-bit operand 2217 // W - 64-bit operand 2500 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { argument 2501 EmitGenericShift(false, 4, operand, shifte 2505 shlq(CpuRegister operand, CpuRegister shifter) argument 2520 shrl(CpuRegister operand, CpuRegister shifter) argument 2525 shrq(CpuRegister operand, CpuRegister shifter) argument 2535 sarl(CpuRegister operand, CpuRegister shifter) argument 2545 sarq(CpuRegister operand, CpuRegister shifter) argument 2555 roll(CpuRegister operand, CpuRegister shifter) argument 2565 rorl(CpuRegister operand, CpuRegister shifter) argument 2575 rolq(CpuRegister operand, CpuRegister shifter) argument 2585 rorq(CpuRegister operand, CpuRegister shifter) argument 3047 EmitOperand(uint8_t reg_or_opcode, const Operand& operand) argument 3075 EmitComplex(uint8_t reg_or_opcode, const Operand& operand, const Immediate& immediate) argument 3153 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister operand, CpuRegister shifter) argument 3212 EmitOptionalRex32(const Operand& operand) argument 3219 EmitOptionalRex32(CpuRegister dst, const Operand& operand) argument 3229 EmitOptionalRex32(XmmRegister dst, const Operand& operand) argument 3247 EmitRex64(const Operand& operand) argument 3265 EmitRex64(CpuRegister dst, const Operand& operand) argument 3273 EmitRex64(XmmRegister dst, const Operand& operand) argument 3287 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) argument [all...] |