Searched defs:temp1_ (Results 1 - 5 of 5) sorted by relevance
| /art/compiler/optimizing/ |
| H A D | code_generator_mips.cc | 624 temp1_(temp1) {
651 DCHECK_NE(temp1_, AT);
652 DCHECK_NE(temp1_, TMP);
653 __ Move(temp1_, ref_reg);
692 __ Beq(temp1_, ref_reg, &done);
706 Register expected = temp1_;
765 const Register temp1_; member in class:art::mips::ReadBarrierMarkAndUpdateFieldSlowPathMIPS
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| H A D | code_generator_mips64.cc | 569 temp1_(temp1) {
596 DCHECK_NE(temp1_, AT);
597 DCHECK_NE(temp1_, TMP);
598 __ Move(temp1_, ref_reg);
636 __ Beqc(temp1_, ref_reg, &done);
647 GpuRegister expected = temp1_;
700 const GpuRegister temp1_; member in class:art::mips64::ReadBarrierMarkAndUpdateFieldSlowPathMIPS64
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| H A D | code_generator_arm.cc | 931 temp1_(temp1),
946 DCHECK_NE(ref_reg, temp1_);
964 __ LoadFromOffset(kLoadWord, temp1_, obj_, monitor_offset);
977 __ add(obj_, obj_, ShifterOperand(temp1_, LSR, 32));
995 __ Lsrs(temp1_, temp1_, LockWord::kReadBarrierStateShift + 1);
1002 DCHECK_NE(temp1_, IP);
1003 __ Mov(temp1_, ref_reg);
1015 __ cmp(temp1_, ShifterOperand(ref_reg));
1030 Register expected = temp1_;
1094 const Register temp1_; member in class:art::arm::LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARM
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| H A D | code_generator_arm_vixl.cc | 960 temp1_(temp1),
975 DCHECK_NE(ref_.reg(), LocationFrom(temp1_).reg());
988 // Temporary register `temp1_`, used to store the lock word, must
991 // word to still be in `temp1_` after the reference load.
992 DCHECK(!temp1_.Is(ip));
1000 arm_codegen->GetAssembler()->LoadFromOffset(kLoadWord, temp1_, obj_, monitor_offset);
1013 __ Add(obj_, obj_, Operand(temp1_, ShiftType::LSR, 32));
1030 __ Lsrs(temp1_, temp1_, LockWord::kReadBarrierStateShift + 1);
1037 DCHECK(!temp1_
1136 const vixl32::Register temp1_; member in class:art::arm::LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARMVIXL
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| H A D | code_generator_x86_64.cc | 565 temp1_(temp1),
594 __ movl(temp1_, ref_cpu_reg);
629 __ cmpl(temp1_, ref_cpu_reg);
640 // expected value (stored in `temp1_`) into EAX.
642 __ movl(CpuRegister(RAX), temp1_); variable
656 value_reg = temp1_.AsRegister();
707 const CpuRegister temp1_; member in class:art::x86_64::ReadBarrierMarkAndUpdateFieldSlowPathX86_64
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