/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_clip_tri.c | 482 struct brw_indirect vt2 = brw_indirect(2, 0); local 492 brw_MOV(p, get_addr_reg(vt2), brw_address(c->reg.vertex[2])); 495 brw_MOV(p, v2, deref_4f(vt2, hpos_offset));
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/external/flatbuffers/php/ |
H A D | FlatbufferBuilder.php | 829 $vt2 = $this->space; variable 833 if ($len == $this->bb->getShort($vt2)) { 835 if ($this->bb->getShort($vt1 + $j) != $this->bb->getShort($vt2 + $j)) {
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/external/libvpx/libvpx/vp8/common/mips/msa/ |
H A D | idct_msa.c | 90 v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3; local 100 VP8_IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3); 101 SRARI_W4_SW(vt0, vt1, vt2, vt3, 3); 102 TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3); 108 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); 183 v4i32 hz0_w, hz1_w, hz2_w, hz3_w, vt0, vt1, vt2, vt3, res0, res1, res2, res3; local 196 VP8_IDCT_1D_W(hz0_w, hz1_w, hz2_w, hz3_w, vt0, vt1, vt2, vt3); 197 SRARI_W4_SW(vt0, vt1, vt2, vt3, 3); 198 TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt 219 v8i16 hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3, res0, res1, res2, res3; local [all...] |
/external/vixl/src/aarch64/ |
H A D | assembler-aarch64.cc | 1555 const VRegister& vt2, 1557 USE(vt2); 1558 VIXL_ASSERT(AreSameFormat(vt, vt2)); 1559 VIXL_ASSERT(AreConsecutive(vt, vt2)); 1565 const VRegister& vt2, 1568 USE(vt2, vt3); 1569 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); 1570 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); 1576 const VRegister& vt2, 1580 USE(vt2, vt 1554 ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) argument 1564 ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) argument 1575 ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) argument 1587 ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) argument 1597 ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) argument 1608 ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) argument 1618 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) argument 1629 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) argument 1641 ld3r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) argument 1652 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) argument 1664 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) argument 1677 ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) argument 1694 st1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) argument 1704 st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) argument 1715 st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) argument 1727 st2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) argument 1737 st2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) argument 1748 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) argument 1759 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) argument 1771 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) argument 1783 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) argument [all...] |
H A D | macro-assembler-aarch64.h | 2516 void Ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) { argument 2519 ld1(vt, vt2, src); 2522 const VRegister& vt2, 2527 ld1(vt, vt2, vt3, src); 2530 const VRegister& vt2, 2536 ld1(vt, vt2, vt3, vt4, src); 2548 void Ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) { argument 2551 ld2(vt, vt2, src); 2554 const VRegister& vt2, 2559 ld2(vt, vt2, lan 2521 Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) argument 2529 Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) argument 2553 Ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) argument 2561 Ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) argument 2566 Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) argument 2574 Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) argument 2583 Ld3r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) argument 2591 Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) argument 2600 Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) argument 2610 Ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) argument 2685 St1(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) argument 2690 St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) argument 2698 St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) argument 2712 St2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) argument 2717 St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) argument 2725 St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) argument 2734 St2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) argument 2742 St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) argument 2751 St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) argument [all...] |
/external/webp/src/dsp/ |
H A D | dec_msa.c | 45 v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3; local 55 IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3); 56 SRARI_W4_SW(vt0, vt1, vt2, vt3, 3); 57 TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3); 63 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
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H A D | enc_msa.c | 47 v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3; local 57 IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3); 58 SRARI_W4_SW(vt0, vt1, vt2, vt3, 3); 59 TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3); 65 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
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/external/libvpx/libvpx/vp9/encoder/ |
H A D | vp9_encodeframe.c | 1045 v16x16 vt2[16]; local 1307 v8x8 *vst2 = is_key_frame ? &vst->split[k] : &vt2[i2 + j].split[k]; 1325 v16x16 *vtemp = (!is_key_frame) ? &vt2[i2 + j] : &vt.split[i].split[j]; 1399 // block, then the variance is based on 4x4 down-sampling, so use vt2 1402 ? &vt2[i2 + j]
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/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
H A D | org.eclipse.swt.win32.win32.x86_3.6.1.v3657a.jar | META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ... |