Searched refs:f1 (Results 26 - 30 of 30) sorted by relevance
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| /art/compiler/optimizing/ |
| H A D | code_generator_mips.cc | 1104 FRegister f1 = loc1.AsFpuRegister<FRegister>(); local
1108 __ MovS(f2, f1);
1109 __ MovS(f1, FTMP);
1113 __ MovD(f2, f1);
1114 __ MovD(f1, FTMP);
1120 FRegister f1 = loc1.IsFpuRegister() ? loc1.AsFpuRegister<FRegister>() local
1124 __ Mfc1(r2, f1);
1125 __ Mtc1(TMP, f1);
1142 FRegister f1 = loc1.IsFpuRegister() ? loc1.AsFpuRegister<FRegister>() local
1151 __ Mfc1(TMP, f1);
[all...] |
| /art/runtime/arch/mips64/ |
| H A D | quick_entrypoints_mips64.S | 425 s.d $f1, 24($sp)
482 l.d $f1, 24($sp)
731 l.d $f1, 8($a1)
1678 dmtc1 $v1, $f1 # place return value to FP return value
1816 dmtc1 $v1, $f1 # place return value to FP return value
2129 sdc1 $f1, 8($sp)
2196 ldc1 $f1, 8($sp)
|
| /art/runtime/interpreter/mterp/mips/ |
| H A D | header.S | 119 #define fv0f $$f1
|
| /art/test/083-compiler-regressions/src/ |
| H A D | Main.java | 5340 float f1 = 1;
7338 f1 += f0;
7340 f2 += f1;
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| /art/runtime/interpreter/mterp/out/ |
| H A D | mterp_mips.S | 126 #define fv0f $f1
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