Searched refs:UINT32 (Results 26 - 50 of 3124) sorted by relevance

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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ipf/
H A DSynchronization.c36 UINT32
39 IN volatile UINT32 *Value
42 UINT32 OriginalValue;
67 UINT32
70 IN volatile UINT32 *Value
73 UINT32 OriginalValue;
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/
H A DSwapBytes32.c37 UINT32
40 IN UINT32 Operand
43 UINT32 LowerBytes;
44 UINT32 HigherBytes;
46 LowerBytes = (UINT32) SwapBytes16 ((UINT16) Operand);
47 HigherBytes = (UINT32) SwapBytes16 ((UINT16) (Operand >> 16));
H A DHighBitSet64.c45 if (Operand == (UINT32)Operand) {
49 return HighBitSet32 ((UINT32)Operand);
55 if (sizeof (UINTN) == sizeof (UINT32)) {
56 return HighBitSet32 (((UINT32*)&Operand)[1]) + 32;
58 return HighBitSet32 ((UINT32)RShiftU64 (Operand, 32)) + 32;
/device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/
H A DSwapBytes32.c32 UINT32
35 IN UINT32 Value
38 UINT32 LowerBytes;
39 UINT32 HigherBytes;
41 LowerBytes = (UINT32) SwapBytes16 ((UINT16) Value);
42 HigherBytes = (UINT32) SwapBytes16 ((UINT16) (Value >> 16));
H A DHighBitSet64.c40 if (Operand == (UINT32)Operand) {
44 return HighBitSet32 ((UINT32)Operand);
50 if (sizeof (UINTN) == sizeof (UINT32)) {
51 return HighBitSet32 (((UINT32*)&Operand)[1]) + 32;
53 return HighBitSet32 ((UINT32)RShiftU64 (Operand, 32)) + 32;
/device/linaro/bootloader/edk2/MdePkg/Library/BaseSynchronizationLib/Ipf/
H A DSynchronization.c30 UINT32
33 IN volatile UINT32 *Value
36 UINT32 OriginalValue;
61 UINT32
64 IN volatile UINT32 *Value
67 UINT32 OriginalValue;
/device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Guid/
H A DCapsule.h52 UINT32 Signature; ///< CBDS.
53 UINT32 CheckSum; ///< To sum this structure to 0.
58 UINT32 HeaderSize;
72 UINT32 HeaderSize;
77 UINT32 Flags;
84 UINT32 CapsuleImageSize;
91 UINT32 SequenceNumber;
104 UINT32 OffsetToSplitInformation;
109 UINT32 OffsetToCapsuleBody;
114 UINT32 OffsetToOemDefinedHeade
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Protocol/
H A DEnhancedSpeedstep.h50 UINT32 RatioStep; // Step
51 UINT32 MinRatio; // Calculated min ratio
52 UINT32 MaxRatio; // Calculated max ratio
53 UINT32 MinCoreFreq; // Calculated min freq
54 UINT32 MaxCoreFreq; // Calculated max freq
55 UINT32 MinPower; // Calculated min power
56 UINT32 MaxPower; // Calculated max power
57 UINT32 NumStates; // Number of states
61 UINT32 CoreFrequency;
62 UINT32 Powe
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/
H A DEfiRegTableLib.h68 #define TERMINATE_TABLE { (UINT32) OP_TERMINATE_TABLE, (UINT32) 0, (UINT32) 0 }
76 UINT32 OpCode;
77 UINT32 PciAddress;
78 UINT32 Data;
83 (UINT32) (OP_PCI_WRITE | ((S3Flag) << 8) | ((Width) << 16)), \
84 (UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
85 (UINT32) (Data), \
86 (UINT32) (
[all...]
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Thunk16/
H A DThunk16Lib.h38 UINT32 CF:1; // Carry Flag
39 UINT32 Reserved_0:1; // Reserved
40 UINT32 PF:1; // Parity Flag
41 UINT32 Reserved_1:1; // Reserved
42 UINT32 AF:1; // Auxiliary Carry Flag
43 UINT32 Reserved_2:1; // Reserved
44 UINT32 ZF:1; // Zero Flag
45 UINT32 SF:1; // Sign Flag
46 UINT32 TF:1; // Trap Flag
47 UINT32 I
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/device/linaro/bootloader/edk2/CorebootModulePkg/Include/
H A DCoreboot.h58 UINT32 magic;
59 UINT32 start;
60 UINT32 size;
61 UINT32 id;
65 UINT32 max_entries;
66 UINT32 num_entries;
67 UINT32 locked;
68 UINT32 size;
73 UINT32 magic;
74 UINT32 start_offse
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/device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/
H A DSmramSaveStateMap.h49 UINT32 SMBASE; // 7ef8h
50 UINT32 SMMRevId; // 7efch
54 UINT32 IOMemAddr; // 7fa0h
55 UINT32 IOMisc; // 7fa4h
56 UINT32 _ES; // 7fa8h
57 UINT32 _CS; // 7fach
58 UINT32 _SS; // 7fb0h
59 UINT32 _DS; // 7fb4h
60 UINT32 _FS; // 7fb8h
61 UINT32 _G
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Sample/Tools/Source/Common/
H A DEfiUtilityMsgs.h61 UINT32 LineNumber,
62 UINT32 ErrorCode,
71 UINT32 LineNumber,
72 UINT32 ErrorCode,
81 UINT32 LineNumber,
82 UINT32 MsgLevel,
90 UINT32 MsgMask
96 UINT32 LineNum
101 UINT32 ErrorCode,
109 UINT32 ErrorCod
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/device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/
H A DDebugTimer.h26 UINT32
28 OUT UINT32 *TimerFrequency,
45 IN UINT32 TimerCycle,
46 IN UINT32 Timer,
47 IN UINT32 TimeoutTicker
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciSched.h91 UINT32 RouteString:20;
95 UINT32 RootPortNum:8;
99 UINT32 TierNum:4;
106 UINT32 Dword;
132 UINT32 Parameter1;
134 UINT32 Parameter2;
136 UINT32 Status;
138 UINT32 CycleBit:1;
139 UINT32 RsvdZ1:9;
140 UINT32 Typ
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/
H A DIntelQNCConfig.h26 #define QNC_FIXED_CONFIG_ASTATUS ((UINT32) (\
79 UINT32 PortErrorMask :8;
80 UINT32 SlotImplemented :1;
81 UINT32 Reserved1 :1;
82 UINT32 AspmEnable :1;
83 UINT32 AspmAutoEnable :1;
84 UINT32 AspmL0sEnable :2;
85 UINT32 AspmL1Enable :1;
86 UINT32 PmeInterruptEnable :1;
87 UINT32 PhysicalSlotNumbe
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/
H A DOhciReg.h214 UINT32 Revision:8;
215 UINT32 Rsvd:24;
219 UINT32 ControlBulkRatio:2;
220 UINT32 PeriodicEnable:1;
221 UINT32 IsochronousEnable:1;
222 UINT32 ControlEnable:1;
223 UINT32 BulkEnable:1;
224 UINT32 FunctionalState:2;
225 UINT32 InterruptRouting:1;
226 UINT32 RemoteWakeu
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/device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/
H A DDebugCommunicationLibUsb3Internal.h124 #define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))
125 #define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))
224 UINT32 EPState:3;
225 UINT32 RsvdZ1:5;
226 UINT32 Mult:2; // set to 0
227 UINT32 MaxPStreams:5; // set to 0
228 UINT32 LSA:1; // set to 0
229 UINT32 Interval:8; // set to 0
230 UINT32 RsvdZ2:8;
232 UINT32 RsvdZ
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/
H A DOhciReg.h214 UINT32 Revision:8;
215 UINT32 Rsvd:24;
219 UINT32 ControlBulkRatio:2;
220 UINT32 PeriodicEnable:1;
221 UINT32 IsochronousEnable:1;
222 UINT32 ControlEnable:1;
223 UINT32 BulkEnable:1;
224 UINT32 FunctionalState:2;
225 UINT32 InterruptRouting:1;
226 UINT32 RemoteWakeu
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/device/linaro/bootloader/edk2/BaseTools/Source/C/Include/Common/
H A DUefiCapsule.h23 UINT32 HeaderSize;
24 UINT32 Flags;
25 UINT32 CapsuleImageSize;
/device/linaro/bootloader/edk2/SecurityPkg/Include/Library/
H A DTcg2PpVendorLib.h46 UINT32
50 IN UINT32 OperationRequest,
51 IN OUT UINT32 *ManagementFlags,
76 IN UINT32 OperationRequest,
77 IN UINT32 ManagementFlags,
99 UINT32
102 IN UINT32 OperationRequest,
103 IN UINT32 ManagementFlags,
104 IN UINT32 RequestParameter
122 UINT32
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/device/linaro/bootloader/edk2/SecurityPkg/Library/Tcg2PpVendorLibNull/
H A DTcg2PpVendorLibNull.c36 UINT32
40 IN UINT32 OperationRequest,
41 IN OUT UINT32 *ManagementFlags,
70 IN UINT32 OperationRequest,
71 IN UINT32 ManagementFlags,
97 UINT32
100 IN UINT32 OperationRequest,
101 IN UINT32 ManagementFlags,
102 IN UINT32 RequestParameter
124 UINT32
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/Library/
H A DQNCAccessLib.h22 (UINT32)((QUARK_OPCODE_READ << QNC_MCR_OP_OFFSET) | ((Port << QNC_MCR_PORT_OFFSET) & 0xFF0000) | ((Reg << QNC_MCR_REG_OFFSET) & 0xFF00) | 0xF0)
25 (UINT32)((QUARK_OPCODE_WRITE << QNC_MCR_OP_OFFSET) | ((Port << QNC_MCR_PORT_OFFSET) & 0xFF0000) | ((Reg << QNC_MCR_REG_OFFSET) & 0xFF00) | 0xF0)
28 (UINT32)((QUARK_ALT_OPCODE_READ << QNC_MCR_OP_OFFSET) | ((Port << QNC_MCR_PORT_OFFSET) & 0xFF0000) | ((Reg << QNC_MCR_REG_OFFSET) & 0xFF00) | 0xF0)
31 (UINT32)((QUARK_ALT_OPCODE_WRITE << QNC_MCR_OP_OFFSET) | ((Port << QNC_MCR_PORT_OFFSET) & 0xFF0000) | ((Reg << QNC_MCR_REG_OFFSET) & 0xFF00) | 0xF0)
34 (UINT32)((QUARK_OPCODE_IO_READ << QNC_MCR_OP_OFFSET) | ((Port << QNC_MCR_PORT_OFFSET) & 0xFF0000) | ((Reg << QNC_MCR_REG_OFFSET) & 0xFF00) | 0xF0)
37 (UINT32)((QUARK_OPCODE_IO_WRITE << QNC_MCR_OP_OFFSET) | ((Port << QNC_MCR_PORT_OFFSET) & 0xFF0000) | ((Reg << QNC_MCR_REG_OFFSET) & 0xFF00) | 0xF0)
40 (UINT32)((QUARK_DRAM_BASE_ADDR_READY << QNC_MCR_OP_OFFSET) | ((Port << QNC_MCR_PORT_OFFSET) & 0xFF0000) | ((Reg << QNC_MCR_REG_OFFSET) & 0xFF00) | 0xF0)
46 UINT32
50 UINT32 RegAddress
61 UINT32 RegAddres
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Library/
H A DEfiRegTableLib.h77 #define TERMINATE_TABLE { (UINT32) OP_TERMINATE_TABLE, (UINT32) 0, (UINT32) 0 }
85 UINT32 OpCode;
86 UINT32 PciAddress;
87 UINT32 Data;
92 (UINT32) (OP_PCI_WRITE | ((S3Flag) << 8) | ((Width) << 16)), \
93 (UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
94 (UINT32) (Data), \
95 (UINT32) (
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/device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/
H A Duldivmod.c19 UINT32 __udivsi3(UINT32 n, UINT32 d);
20 UINT32 __umodsi3(UINT32 a, UINT32 b);

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