/external/ltp/testcases/kernel/power_management/ |
H A D | runpwtests06.sh | 37 RC=0 40 RC=$? 43 RC=$(( RC | $? )) 44 return $RC
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H A D | runpwtests03.sh | 30 RC=0 41 RC=1 45 if [ ${RC} -eq 0 ] ; then 48 return $RC 56 RC=0 67 RC=1 71 if [ ${RC} -eq 0 ] ; then 74 return $RC 80 RC=0 92 RC [all...] |
H A D | runpwtests_exclusive03.sh | 55 RC=0 61 RC=1 66 if [ $RC -eq 0 ]; then 75 RC=0 85 RC=1 93 if [ $RC -eq 0 ]; then
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H A D | runpwtests02.sh | 41 RC=$? 44 RC=$(( RC | $? )) 45 return $RC
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H A D | runpwtests05.sh | 56 RC=0 59 analyze_sched_domain_result $sched_mc $ret; RC=$? 61 if [ $RC -eq 0 ]; then 68 RC=0 73 analyze_sched_domain_result $sched_mc $ret $sched_smt; RC=$? 76 if [ $RC -eq 0 ]; then
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H A D | runpwtests_exclusive01.sh | 51 RC=0 66 $sched_mc_pass_cnt; RC=$? 68 if [ $RC -eq 0 ]; then 74 RC=0 92 $sched_mc_smt_pass_cnt $sched_smt; RC=$? 95 if [ $RC -eq 0 ]; then
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H A D | runpwtests_exclusive05.sh | 51 RC=0 64 RC=1 69 if [ $RC -eq 0 ]; then 75 RC=0 88 RC=1 95 if [ $RC -eq 0 ]; then
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H A D | runpwtests_exclusive02.sh | 49 RC=0 65 $sched_smt_pass_cnt; RC=$? 67 if [ $RC -eq 0 ]; then
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/external/ltp/testcases/commands/eject/ |
H A D | eject-tests.sh | 59 # Set return code RC variable to 0, it will be set with a non-zero return code 63 RC=0 75 eject -d > $LTPTMP/tst_eject.res 2>&1 || RC=$? 76 if [ $RC -eq 0 ] 91 echo "return code from eject = $RC" > $LTPTMP/tst_eject.out 2>/dev/null 102 RC=0 107 eject -v > $LTPTMP/tst_eject.res 2>&1 || RC=$? 108 if [ $RC -eq 0 ] 111 > $LTPTMP/tst_eject.out 2>&1 || RC=$? 112 if [ $RC [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | RegisterClassInfo.h | 60 // Compute all information about RC. 61 void compute(const TargetRegisterClass *RC) const; 63 // Return an up-to-date RCInfo for RC. 64 const RCInfo &get(const TargetRegisterClass *RC) const { 65 const RCInfo &RCI = RegClass[RC->getID()]; 67 compute(RC); 79 /// registers in RC in the current function. 80 unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const { 81 return get(RC).NumRegs; 84 /// getOrder - Returns the preferred allocation order for RC [all...] |
H A D | LiveStackAnalysis.cpp | 55 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { argument 61 S2RCMap.insert(std::make_pair(Slot, RC)); 65 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); 77 const TargetRegisterClass *RC = getIntervalRegClass(Slot); local 78 if (RC) 79 OS << " [" << RC->getName() << "]\n";
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/external/ltp/testcases/kernel/numa/ |
H A D | numa01.sh | 61 RC=0 63 which $2 &>$LTPTMP/tst_numa.err || RC=$? 64 if [ $RC -ne 0 ] 68 return $RC 82 RC=0 86 RC=$(awk ' 92 if [ $RC != $1 ] 98 RC=$(awk ' 123 RC=$[$2-$1] 125 RC [all...] |
/external/ltp/testcases/commands/logrotate/ |
H A D | logrotate_tests.sh | 55 RC=0 57 which $2 > $LTPTMP/tst_logrotate.err 2>&1 || RC=$? 58 if [ $RC -ne 0 ] 62 return $RC 77 export RC=0 93 mkdir -p $LTPTMP > /dev/null 2>&1 || RC=$? 94 if [ $RC -ne 0 ] 97 return $RC 101 chk_ifexists INIT tst_resm || return $RC 102 chk_ifexists INIT logrotate || return $RC [all...] |
/external/ltp/testcases/commands/fileutils/mkdir/ |
H A D | mkdir_tests.sh | 38 # - non zero on failure. return value from commands ($RC) 42 RC=0 # Return code from commands. 63 which mkdir > $LTPTMP/tst_mkdir.err 2>&1 || RC=$? 64 if [ $RC -ne 0 ] 68 return $RC 71 mkdir -p $LTPTMP/tst_mkdir.tmp > $LTPTMP/tst_mkdir.err 2>&1 || RC=$? 72 if [ $RC -ne 0 ] 76 return $RC 78 return $RC 91 # - non zero on failure. return value ($RC) fro [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsMachineFunction.cpp | 41 const TargetRegisterClass *RC = local 53 return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC); 58 const TargetRegisterClass *RC = local 63 EhDataRegFI[I] = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 64 RC->getAlignment(), false); 73 const TargetRegisterClass *RC = &Mips::GPR32RegClass; local 77 RC->getSize(), RC->getAlignment(), false); 96 int MipsFunctionInfo::getMoveF64ViaSpillFI(const TargetRegisterClass *RC) { argument 99 RC [all...] |
/external/ltp/testcases/kernel/security/mmc_security/ |
H A D | ask_password.sh | 29 #* - non zero on failure. return value from commands ($RC) *# 47 RC=0 # Exit values of system commands used 65 ask_password || exit $RC
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H A D | assign_password.sh | 45 RC=0 # Exit values of system commands used 70 assign_password || exit $RC
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H A D | remove_password.sh | 45 RC=0 # Exit values of system commands used 64 remove_password || exit $RC
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H A D | change_password.sh | 43 RC=0 # Exit values of system commands used 80 change_password || exit $RC
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H A D | force_erase.sh | 46 RC=0 # Exit values of system commands used 75 force_erase || exit $RC
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/external/linux-kselftest/tools/testing/selftests/powerpc/ |
H A D | instructions.h | 32 #define __PASTE(RA, RB, L, RC) \ 33 (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31)) 34 #define PASTE(RA, RB, L, RC) \ 35 .long __PASTE((RA), (RB), (L), (RC))
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/external/ltp/testcases/kernel/syscalls/ioctl/ |
H A D | test_ioctl | 49 RC=$? 50 if [ $RC -eq 0 ] 72 RC=$? 73 if [ $RC -eq 0 ]
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/external/llvm/lib/CodeGen/GlobalISel/ |
H A D | RegisterBank.cpp | 29 const TargetRegisterClass &RC = *TRI.getRegClass(RCId); local 31 if (!covers(RC)) 37 // RegisterBankInfo to find the subclasses of RC, to make sure 42 if (!RC.hasSubClassEq(&SubRC)) 55 bool RegisterBank::covers(const TargetRegisterClass &RC) const { 57 return ContainedRegClasses.test(RC.getID()); 97 const TargetRegisterClass &RC = *TRI->getRegClass(RCId); local 99 if (!covers(RC)) 104 OS << TRI->getRegClassName(&RC);
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/external/llvm/lib/CodeGen/ |
H A D | LiveStackAnalysis.cpp | 58 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { argument 66 S2RCMap.insert(std::make_pair(Slot, RC)); 70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); 82 const TargetRegisterClass *RC = getIntervalRegClass(Slot); local 83 if (RC) 84 OS << " [" << TRI->getRegClassName(RC) << "]\n";
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H A D | RegisterClassInfo.cpp | 76 /// compute - Compute the preferred allocation order for RC with reserved 79 void RegisterClassInfo::compute(const TargetRegisterClass *RC) const { 80 assert(RC && "no register class given"); 81 RCInfo &RCI = RegClass[RC->getID()]; 84 unsigned NumRegs = RC->getNumRegs(); 97 ArrayRef<MCPhysReg> RawOrder = RC->getRawAllocationOrder(*MF); 133 // Check if RC is a proper sub-class. 135 TRI->getLargestLegalSuperClass(RC, *MF)) 136 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) 143 dbgs() << "AllocationOrder(" << TRI->getRegClassName(RC) << ") 157 const TargetRegisterClass *RC = nullptr; local [all...] |