| /external/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.h | 101 unsigned &FrameReg) const override;
104 unsigned &FrameReg,
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| H A D | X86RegisterInfo.cpp | 665 unsigned FrameReg = getFrameRegister(MF); local
667 FrameReg = getX86SubSuperRegister(FrameReg, 32);
668 return FrameReg;
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| H A D | X86FrameLowering.cpp | 1274 unsigned FrameReg;
1276 int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1278 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
1651 unsigned &FrameReg) const {
1658 FrameReg = TRI->getBaseRegister();
1660 FrameReg = TRI->getStackRegister();
1662 FrameReg = TRI->getFrameRegister(MF);
1736 int FI, unsigned &FrameReg,
1777 return getFrameIndexReference(MF, FI, FrameReg);
1784 return getFrameIndexReference(MF, FI, FrameReg);
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| H A D | TargetFrameLowering.h | 174 /// returned directly, and the base register is returned via FrameReg.
176 unsigned &FrameReg) const;
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 459 unsigned &FrameReg) const {
460 return ResolveFrameIndexReference(MF, FI, FrameReg, 0);
465 int FI, unsigned &FrameReg,
475 FrameReg = ARM::SP;
489 FrameReg = RegInfo->getFrameRegister(MF);
494 FrameReg = RegInfo->getBaseRegister();
505 FrameReg = RegInfo->getFrameRegister(MF);
514 FrameReg = RegInfo->getFrameRegister(MF);
527 FrameReg = RegInfo->getFrameRegister(MF);
532 FrameReg
464 ResolveFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg, int SPAdj) const argument
544 unsigned FrameReg; local
[all...] |
| H A D | Thumb2InstrInfo.cpp | 386 unsigned FrameReg, int &Offset,
404 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
425 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
438 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
474 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
529 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
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| H A D | ARMBaseInstrInfo.h | 375 unsigned FrameReg, int &Offset,
379 unsigned FrameReg, int &Offset,
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| H A D | ARMBaseRegisterInfo.cpp | 1170 unsigned FrameReg;
1172 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);
1176 MI.getOperand(i). ChangeToRegister(FrameReg, false /*isDef*/);
1184 Done = rewriteARMFrameIndex(MI, i, FrameReg, Offset, TII);
1187 Done = rewriteT2FrameIndex(MI, i, FrameReg, Offset, TII);
1207 MI.getOperand(i).ChangeToRegister(FrameReg, false, false, false);
1211 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
1215 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
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| /external/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrInfo.h | 82 // This is to adjust some FrameReg. We return the new register to be used
83 // in place of FrameReg and the adjusted immediate field (&NewImm)
85 unsigned loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB,
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| H A D | Mips16InstrInfo.cpp | 305 unsigned Mips16InstrInfo::loadImmediate(unsigned FrameReg, int64_t Imm, argument
387 if (FrameReg == Mips::SP) {
406 BuildMI(MBB, II, DL, get(Mips:: AdduRxRyRz16), Reg).addReg(FrameReg)
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| H A D | MipsTargetStreamer.h | 183 unsigned FrameReg; member in class:llvm::MipsTargetStreamer
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| H A D | MipsSEFrameLowering.cpp | 756 unsigned &FrameReg) const {
761 FrameReg = hasFP(MF) ? ABI.GetFramePtr() : ABI.GetStackPtr();
763 FrameReg = hasBP(MF) ? ABI.GetBasePtr() : ABI.GetStackPtr();
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 720 unsigned FrameReg; local
722 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);
729 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
744 Done = rewriteARMFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
747 Done = rewriteT2FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
767 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false);
771 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
775 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
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| H A D | Thumb2InstrInfo.cpp | 454 unsigned FrameReg, int &Offset,
472 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
493 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
506 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
542 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
603 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
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| H A D | ARMBaseInstrInfo.h | 507 unsigned FrameReg, int &Offset,
511 unsigned FrameReg, int &Offset,
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| H A D | ARMFrameLowering.cpp | 806 unsigned &FrameReg) const {
807 return ResolveFrameIndexReference(MF, FI, FrameReg, 0);
812 int FI, unsigned &FrameReg,
822 FrameReg = ARM::SP;
834 FrameReg = RegInfo->getFrameRegister(MF);
839 FrameReg = RegInfo->getBaseRegister();
849 FrameReg = RegInfo->getFrameRegister(MF);
858 FrameReg = RegInfo->getFrameRegister(MF);
871 FrameReg = RegInfo->getFrameRegister(MF);
876 FrameReg
811 ResolveFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg, int SPAdj) const argument
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcFrameLowering.cpp | 245 unsigned &FrameReg) const {
280 FrameReg = RegInfo->getFrameRegister(MF);
283 FrameReg = SP::O6; // %sp
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| /external/llvm/lib/CodeGen/ |
| H A D | GCRootLowering.cpp | 322 unsigned FrameReg; // FIXME: surely GCRoot ought to store the local
324 RI->StackOffset = TFI->getFrameIndexReference(MF, RI->Num, FrameReg);
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 786 unsigned &FrameReg) const {
787 return resolveFrameIndexReference(MF, FI, FrameReg);
791 int FI, unsigned &FrameReg,
835 FrameReg = RegInfo->getFrameRegister(MF);
841 FrameReg = RegInfo->getBaseRegister();
843 FrameReg = AArch64::SP;
790 resolveFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg, bool PreferFP) const argument
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| H A D | AArch64InstrInfo.h | 229 unsigned FrameReg, int &Offset,
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 57 unsigned &FrameReg) const override;
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| H A D | HexagonFrameLowering.cpp | 807 unsigned FrameReg; local
808 Offset = getFrameIndexReference(MF, F->getFrameIdx(), FrameReg);
960 int FI, unsigned &FrameReg) const {
1026 FrameReg = FP;
1028 FrameReg = AP;
1030 FrameReg = SP;
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfCompileUnit.cpp | 1250 unsigned FrameReg = 0; local
1255 FrameReg);
1256 MachineLocation Location(FrameReg, Offset);
1293 unsigned FrameReg = 0; local
1296 TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
1297 MachineLocation Location(FrameReg, Offset);
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| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 487 unsigned &FrameReg) const {
491 // Fill in FrameReg output argument.
492 FrameReg = RI->getFrameRegister(MF);
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfCompileUnit.cpp | 549 unsigned FrameReg = 0; local
551 int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
554 FrameReg, Offset);
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