/external/syslinux/com32/hdt/ |
H A D | Makefile | 55 $(LD) $(LDFLAGS) -o $@ $^
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/external/v8/src/arm/ |
H A D | constants-arm.h | 232 LD = 0xd, enumerator in enum:v8::internal::BarrierOption
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/external/webp/src/dsp/ |
H A D | msa_macro.h | 102 #define LD(psrc) MSA_LOAD(psrc, msa_ld) macro 104 #define LD(psrc) ((((uint64_t)MSA_LOAD(psrc + 4, msa_lw)) << 32) | \ macro 121 #define LD(psrc) MSA_LOAD(psrc, msa_uld) macro 123 #define LD(psrc) ((((uint64_t)MSA_LOAD(psrc + 4, msa_ulw)) << 32) | \ macro
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/external/e2fsprogs/resize/ |
H A D | Makefile.in | 46 $(E) " LD $@" 50 $(E) " LD $@" 51 $(Q) $(LD) $(LDFLAGS_STATIC) -o resize2fs.static \ 59 $(E) " LD $@"
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypes.h | 648 LoadSDNode *LD); 656 LoadSDNode *LD, ISD::LoadExtType ExtType);
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/external/v8/src/mips64/ |
H A D | constants-mips64.h | 369 LD = ((6U << 3) + 7) << kOpcodeShift, 948 OpcodeToBitNumber(LD) | OpcodeToBitNumber(LBU) | OpcodeToBitNumber(LHU) |
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/external/llvm/lib/Transforms/Scalar/ |
H A D | GVN.cpp | 1322 if (LoadInst *LD = dyn_cast<LoadInst>(DepInst)) { 1326 if (LD->getType() != LI->getType() && 1327 !CanCoerceMustAliasedValueToLoad(LD, LI->getType(), DL)) 1331 if (LD->isAtomic() < LI->isAtomic()) 1334 Res = AvailableValue::getLoad(LD);
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 4569 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) 4570 return DAG.getLoad(LD->getMemoryVT(), N->getDebugLoc(), LD->getChain(), 4571 LD->getBasePtr(), LD->getPointerInfo(), LD->isVolatile(), 4572 LD->isNonTemporal(), LD->getAlignment()); 6922 LoadSDNode *LD = cast<LoadSDNode>(InNode); local 6925 DebugLoc DL = LD [all...] |
/external/libyuv/files/source/ |
H A D | row_msa.cc | 45 y_m = LD(psrc_y); \ 280 y_m = LD(psrc_y); \ 281 u_m = LD(psrc_u); \ 282 v_m = LD(psrc_v); \ 453 data_a = LD(src_a); 495 data_u = LD(src_u); 496 data_v = LD(src_v); 2238 val0 = LD(src_y); 2239 val1 = LD(src_uv); 2274 val0 = LD(src_ [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 1088 LoadSDNode *LD = cast<LoadSDNode>(N); local 1089 if (LD->getExtensionType() != ISD::NON_EXTLOAD) 1092 EVT VT = LD->getMemoryVT();
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 950 unsigned LoadOpcode = Op0IsGPR ? SystemZ::LG : SystemZ::LD; 1045 splitMove(MI, SystemZ::LD); 1277 LoadOpcode = SystemZ::LD;
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
H A D | AlphaISelLowering.cpp | 622 SDValue LD; local 624 LD = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op.getOperand(0)); 626 isDouble?MVT::f64:MVT::f32, LD);
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 946 LoadSDNode *LD = cast<LoadSDNode>(N); local 947 if (LD->getExtensionType() != ISD::NON_EXTLOAD) 950 EVT VT = LD->getMemoryVT();
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1064 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 1065 Ptr = LD->getBasePtr(); 1066 VT = LD->getMemoryVT(); 1091 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 1094 if (LD->getValueType(0) == MVT::i64 && LD->getMemoryVT() == MVT::i32 && 1095 LD->getExtensionType() == ISD::SEXTLOAD && 5309 LoadSDNode *LD = cast<LoadSDNode>(Load); local 5312 LD->getChain(), // Chain 5313 LD [all...] |
H A D | PPCAsmPrinter.cpp | 349 // Change the opcode to LD, and the global address operand to be a 351 TmpInst.setOpcode(PPC::LD);
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/external/libvpx/libvpx/ |
H A D | configure | 712 enabled webm_io && LD=${CXX}
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/external/llvm/lib/Target/Mips/ |
H A D | MipsLongBranch.cpp | 410 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64)
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/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
H A D | GVN.cpp | 1400 if (LoadInst *LD = dyn_cast<LoadInst>(DepInst)) { 1402 if (LD->getType() != LI->getType()) { 1405 if (TD == 0 || !CanCoerceMustAliasedValueToLoad(LD, LI->getType(),*TD)){ 1410 ValuesPerBlock.push_back(AvailableValueInBlock::getLoad(DepBB, LD));
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/external/v8/src/ppc/ |
H A D | assembler-ppc-inl.h | 469 const int kLoadIntptrOpcode = LD;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypes.h | 760 LoadSDNode *LD); 768 LoadSDNode *LD, ISD::LoadExtType ExtType);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1041 LoadSDNode *LD = cast<LoadSDNode>(N); local 1042 if (LD->isUnindexed()) 1044 EVT VT = LD->getMemoryVT(); 1046 ISD::MemIndexedMode AM = LD->getAddressingMode(); 1054 ISD::LoadExtType ExtType = LD->getExtensionType(); 1106 SDValue Chain = LD->getChain(); 1107 SDValue Base = LD->getBasePtr(); 1108 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset());
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/external/clang/lib/Sema/ |
H A D | SemaOpenMP.cpp | 11540 Decl *LD = nullptr; 11542 LD = cast<TagDecl>(D)->getDefinition(); 11544 LD = cast<VarDecl>(D)->getDefinition(); 11560 LD = const_cast<FunctionDecl *>(FD); 11565 if (LD == D) { 11574 if (!LD) 11575 LD = D; 11576 if (LD && !LD->hasAttr<OMPDeclareTargetDeclAttr>() && 11577 (isa<VarDecl>(LD) || is [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 268 case PPC::LD: 1105 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), DestReg), 1869 MI.setDesc(get(Subtarget.isPPC64() ? PPC::LD : PPC::LWZ));
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/external/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 3003 /// \param LD load to expand 3005 SDValue scalarizeVectorLoad(LoadSDNode *LD, SelectionDAG &DAG) const; 3014 std::pair<SDValue, SDValue> expandUnalignedLoad(LoadSDNode *LD,
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenInsert.cpp | 852 // Look for a register whose prefix could patch the range [FD..LD] 854 uint16_t FD = FDi, LD = LDi; // Switch to unsigned type. 855 uint16_t MinL = LD-FD+1;
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