/external/mesa3d/src/glsl/ |
H A D | opt_function_inlining.cpp | 38 do_sampler_replacement(exec_list *instructions, 68 do_function_inlining(exec_list *instructions) argument 72 v.run(instructions); 191 /* Now push those new instructions in. */ 365 do_sampler_replacement(exec_list *instructions, argument 371 visit_list_elements(&v, instructions);
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H A D | lower_output_reads.cpp | 153 lower_output_reads(exec_list *instructions) argument 156 visit_list_elements(&v, instructions);
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H A D | lower_vec_index_to_swizzle.cpp | 168 do_vec_index_to_swizzle(exec_list *instructions) argument 172 v.run(instructions);
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H A D | opt_constant_propagation.cpp | 114 void handle_if_block(exec_list *instructions); 221 * block. Any instructions at global scope will be shuffled into 309 ir_constant_propagation_visitor::handle_if_block(exec_list *instructions) argument 325 visit_list_elements(this, instructions); 462 do_constant_propagation(exec_list *instructions) argument 466 visit_list_elements(&v, instructions);
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H A D | opt_copy_propagation_elements.cpp | 39 * This should reduce the number of MOV instructions in the generated 120 void handle_if_block(exec_list *instructions); 146 * block. Any instructions at global scope will be shuffled into 316 ir_copy_propagation_elements_visitor::handle_if_block(exec_list *instructions) argument 332 visit_list_elements(this, instructions); 488 do_copy_propagation_elements(exec_list *instructions) argument 492 visit_list_elements(&v, instructions);
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/external/smali/dexlib2/src/main/java/org/jf/dexlib2/util/ |
H A D | SyntheticAccessorResolver.java | 128 List<Instruction> instructions = ImmutableList.copyOf(matchedMethodImpl.getInstructions()); 131 int accessType = syntheticAccessorFSM.test(instructions); 135 new AccessedMember(accessType, ((ReferenceInstruction)instructions.get(0)).getReference());
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/external/llvm/lib/Transforms/Scalar/ |
H A D | ADCE.cpp | 11 // optimistically assumes that all instructions are dead until proven otherwise, 36 STATISTIC(NumRemoved, "Number of instructions removed"); 80 // Collect the set of "root" instructions that are known live. 81 for (Instruction &I : instructions(F)) { 109 // The inverse of the live set is the dead set. These are those instructions 113 for (Instruction &I : instructions(F)) {
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H A D | BDCE.cpp | 11 // instructions (shifts, some ands, ors, etc.) kill some of their input bits. 12 // We track these dead bits and remove instructions that compute only these 35 STATISTIC(NumRemoved, "Number of instructions removed (unused)"); 36 STATISTIC(NumSimplified, "Number of instructions trivialized (dead bits)"); 41 for (Instruction &I : instructions(F)) { 44 // For live instructions that have all dead bits, first make them dead by
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H A D | ConstantProp.cpp | 13 // * Converts instructions like "add int 1, 2" into 3 34 STATISTIC(NumInstKilled, "Number of instructions killed"); 67 // Initialize the worklist to all of the instructions ready to process... 69 for (Instruction &I: instructions(&F)) 81 if (!I->use_empty()) // Don't muck with dead instructions...
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/external/llvm/test/MC/Sparc/ |
H A D | sparc-little-endian.s | 7 ! Ensure instructions are emitted in reversed byte order:
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_lower_texture_gradients.cpp | 148 brw_lower_texture_gradients(struct exec_list *instructions) argument 152 visit_list_elements(&v, instructions);
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H A D | brw_vec4_reg_allocate.cpp | 59 foreach_iter(exec_list_iterator, iter, this->instructions) { 81 foreach_iter(exec_list_iterator, iter, this->instructions) { 233 foreach_list(node, &this->instructions) { 261 foreach_list(node, &this->instructions) { 326 /* Generate spill/unspill instructions for the objects being spilled. */ 327 foreach_list(node, &this->instructions) {
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/external/valgrind/exp-bbv/tests/amd64-linux/ |
H A D | clone_test.S | 1 # count for ~1 million instructions thread 1 2 # count for ~2 million instructions thread 2
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H A D | fldcw_check.S | 18 # these are instructions with similar encodings to fldcw
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/external/valgrind/exp-bbv/tests/x86-linux/ |
H A D | clone_test.S | 1 # count for ~1 million instructions thread 1 2 # count for ~2 million instructions thread 2
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/external/llvm/lib/Analysis/ |
H A D | MemDerefPrinter.cpp | 56 for (auto &I: instructions(F)) {
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/external/llvm/test/MC/ARM/AlignedBundling/ |
H A D | group-bundle-arm.s | 5 # instructions should not be inserted. However, for bundle-locked groups
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/external/llvm/test/MC/ARM/ |
H A D | arm-thumb-trustzone.s | 8 @ Check that the assembler processes SMC instructions when TrustZone support is
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H A D | arm-trustzone.s | 8 @ Check that the assembler processes SMC instructions when TrustZone support is
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/external/llvm/test/MC/Mips/ |
H A D | mips-memory-instructions.s | 5 # Memory store instructions 23 # Memory load instructions
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/external/llvm/test/MC/X86/AlignedBundling/ |
H A D | pad-bundle-groups.s | 12 # Each of these callq instructions is 5 bytes long
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H A D | relax-in-bundle-group.s | 6 # Test that instructions inside bundle-locked groups are relaxed even if their
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/external/valgrind/exp-bbv/tests/x86/ |
H A D | fldcw_check.S | 20 # these are instructions with similar encodings to fldcw
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H A D | million.S | 4 # count for 1 million instructions
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/external/llvm/test/MC/AArch64/ |
H A D | arm64-branch-encoding.s | 6 ; Unconditional branch (register) instructions. 26 ; Contitional branch instructions. 90 ; Compare-and-branch instructions. 110 ; Bit-test-and-branch instructions. 131 ; Exception generation instructions.
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