Searched refs:mask (Results 101 - 125 of 2225) sorted by relevance

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/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_swizzle.h54 void (*Split)(struct rc_src_register reg, unsigned int mask, struct rc_swizzle_split * split);
/external/mesa3d/src/glsl/
H A Dopt_noop_swizzle.cpp64 if (swiz->mask.x != 0)
66 if (elems >= 2 && swiz->mask.y != 1)
68 if (elems >= 3 && swiz->mask.z != 2)
70 if (elems >= 4 && swiz->mask.w != 3)
/external/minijail/
H A Dsignal_handler.c55 sigset_t mask; local
61 sigemptyset(&mask);
62 sigaddset(&mask, SIGSYS);
68 ret = sigprocmask(SIG_UNBLOCK, &mask, NULL);
/external/skia/src/core/
H A DSkMaskCache.h21 * On success, return a ref to the SkCachedData that holds the pixels, and have mask
27 const SkRRect& rrect, SkMask* mask,
30 const SkRect rects[], int count, SkMask* mask,
34 * Add a mask and its pixel-data to the cache.
37 const SkRRect& rrect, const SkMask& mask, SkCachedData* data,
40 const SkRect rects[], int count, const SkMask& mask, SkCachedData* data,
H A DSkBlitBWMaskTemplate.h18 SK_BLITBWMASK_NAME name of function(const SkBitmap& bitmap, const SkMask& mask, const SkIRect& clip, SK_BLITBWMASK_ARGS)
49 U8CPU mask = *bits++; local
50 SK_BLITBWMASK_BLIT8(mask, dst);
65 rite_mask &= 0xFF; // only want low-8 bits of mask
68 // check for empty right mask, so we don't read off the end (or go slower than we need to)
87 U8CPU mask = *bits & left_mask; local
88 SK_BLITBWMASK_BLIT8(mask, device);
99 U8CPU mask; local
101 mask = *b++ & left_mask;
102 SK_BLITBWMASK_BLIT8(mask, ds
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/external/strace/
H A Dioprio.c50 #define IOPRIO_PRIO_CLASS(mask) ((mask) >> IOPRIO_CLASS_SHIFT)
51 #define IOPRIO_PRIO_DATA(mask) ((mask) & IOPRIO_PRIO_MASK)
/external/strace/tests/
H A Derestartsys.c60 sigset_t mask; local
61 sigemptyset(&mask);
62 sigaddset(&mask, SIGALRM);
63 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dkill.c52 sigset_t mask; local
53 sigemptyset(&mask);
54 sigaddset(&mask, SIGALRM);
55 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dqual_inject-error-signal.c57 sigset_t mask; local
58 sigemptyset(&mask);
59 sigaddset(&mask, SIGUSR1);
60 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dqual_signal.c53 sigset_t mask; local
54 sigemptyset(&mask);
55 sigaddset(&mask, signo);
56 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dsignal_receive.c24 sigset_t mask; local
25 sigemptyset(&mask);
30 sigaddset(&mask, sig);
33 sigprocmask(SIG_UNBLOCK, &mask, NULL);
/external/strace/tests-m32/
H A Derestartsys.c60 sigset_t mask; local
61 sigemptyset(&mask);
62 sigaddset(&mask, SIGALRM);
63 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dkill.c52 sigset_t mask; local
53 sigemptyset(&mask);
54 sigaddset(&mask, SIGALRM);
55 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dqual_inject-error-signal.c57 sigset_t mask; local
58 sigemptyset(&mask);
59 sigaddset(&mask, SIGUSR1);
60 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dqual_signal.c53 sigset_t mask; local
54 sigemptyset(&mask);
55 sigaddset(&mask, signo);
56 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dsignal_receive.c24 sigset_t mask; local
25 sigemptyset(&mask);
30 sigaddset(&mask, sig);
33 sigprocmask(SIG_UNBLOCK, &mask, NULL);
/external/strace/tests-mx32/
H A Derestartsys.c60 sigset_t mask; local
61 sigemptyset(&mask);
62 sigaddset(&mask, SIGALRM);
63 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dkill.c52 sigset_t mask; local
53 sigemptyset(&mask);
54 sigaddset(&mask, SIGALRM);
55 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dqual_inject-error-signal.c57 sigset_t mask; local
58 sigemptyset(&mask);
59 sigaddset(&mask, SIGUSR1);
60 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dqual_signal.c53 sigset_t mask; local
54 sigemptyset(&mask);
55 sigaddset(&mask, signo);
56 if (sigprocmask(SIG_UNBLOCK, &mask, NULL))
H A Dsignal_receive.c24 sigset_t mask; local
25 sigemptyset(&mask);
30 sigaddset(&mask, sig);
33 sigprocmask(SIG_UNBLOCK, &mask, NULL);
/external/fio/os/
H A Dos-solaris.h104 #define fio_cpu_clear(mask, cpu) pset_assign(PS_NONE, (cpu), NULL)
105 #define fio_cpu_set(mask, cpu) pset_assign(*(mask), (cpu), NULL)
107 static inline int fio_cpu_isset(os_cpu_mask_t *mask, int cpu) argument
116 if (pset_info(*mask, NULL, &num_cpus, cpus) < 0) {
133 static inline int fio_cpu_count(os_cpu_mask_t *mask) argument
137 if (pset_info(*mask, NULL, &num_cpus, NULL) < 0)
143 static inline int fio_cpuset_init(os_cpu_mask_t *mask) argument
145 if (pset_create(mask) < 0)
151 static inline int fio_cpuset_exit(os_cpu_mask_t *mask) argument
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/external/ltp/testcases/kernel/syscalls/sched_setaffinity/
H A Dsched_setaffinity01.c25 * 2) EINVAL, if the mask doesn't contain at least one
50 static cpu_set_t *mask, *emask; variable
62 cpu_set_t **mask; member in struct:test_case_t
67 {&free_pid, &mask_size, &mask, ESRCH},
68 {&privileged_pid, &mask_size, &mask, EPERM},
75 if (mask != NULL) {
76 CPU_FREE(mask);
77 mask = NULL;
100 /* Current mask */
101 mask
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/external/mesa3d/src/glx/
H A Dclientattrib.c70 __indirect_glPushClientAttrib(GLuint mask) argument
81 sp->mask = mask;
83 if (mask & GL_CLIENT_PIXEL_STORE_BIT) {
87 if (mask & GL_CLIENT_VERTEX_ARRAY_BIT) {
103 GLuint mask; local
109 mask = sp->mask;
112 if (mask & GL_CLIENT_PIXEL_STORE_BIT) {
116 if (mask
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/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_clear.c65 debug_mask(const char *name, GLbitfield mask) argument
72 if (mask & (1 << i))
208 brw_clear(struct gl_context *ctx, GLbitfield mask) argument
215 if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
221 if (mask & BUFFER_BIT_DEPTH) {
224 mask &= ~BUFFER_BIT_DEPTH;
228 GLbitfield tri_mask = mask & (BUFFER_BITS_COLOR |
234 mask &= ~tri_mask;
244 if (mask) {
245 debug_mask("swrast", mask);
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