Searched refs:V4L2_DV_BT_DMT_1440X900P120_RB (Results 51 - 75 of 150) sorted by relevance

123456

/prebuilts/ndk/r10/platforms/android-23/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-3/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-3/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-3/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-4/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-4/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-4/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-5/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-5/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-5/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-6/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-6/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-6/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-7/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-7/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-7/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-8/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-8/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-8/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-9/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-9/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r10/platforms/android-9/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r11/platforms/android-10/arch-arm64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r11/platforms/android-10/arch-mips64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro
/prebuilts/ndk/r11/platforms/android-10/arch-x86_64/usr/include/linux/
H A Dv4l2-dv-timings.h114 #define V4L2_DV_BT_DMT_1440X900P120_RB { .type = V4L2_DV_BT_656_1120, V4L2_INIT_BT_TIMINGS(1440, 900, 0, V4L2_DV_HSYNC_POS_POL, 182750000, 48, 32, 80, 3, 6, 44, 0, 0, 0, V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT, V4L2_DV_FL_REDUCED_BLANKING) } macro

Completed in 1806 milliseconds

123456