Searched refs:index_reg (Results 1 - 10 of 10) sorted by relevance

/art/runtime/arch/mips/
H A Dquick_entrypoints_mips.S849 .macro LOAD_WORD_TO_REG reg, next_arg, index_reg, label
852 addiu $\index_reg, 16
856 .macro LOAD_LONG_TO_REG reg1, reg2, next_arg, index_reg, next_index, label
860 li $\index_reg, \next_index
864 .macro LOAD_FLOAT_TO_REG reg, next_arg, index_reg, label
867 addiu $\index_reg, 16
872 // LDu expands into 3 instructions for 64-bit FPU, so index_reg cannot be updated here.
873 .macro LOAD_DOUBLE_TO_REG reg1, reg2, next_arg, index_reg, tmp, label
882 // LDu expands into 2 instructions for 32-bit FPU, so index_reg is updated here.
883 .macro LOAD_DOUBLE_TO_REG reg1, reg2, next_arg, index_reg, tm
[all...]
/art/compiler/optimizing/
H A Dcode_generator_mips64.cc761 GpuRegister index_reg = index_.AsRegister<GpuRegister>(); variable
762 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg));
763 if (codegen->IsCoreCalleeSaveRegister(index_reg)) {
764 // We are about to change the value of `index_reg` (see the
774 // register, `index_reg` _would_ eventually be saved onto
787 __ Move(free_reg, index_reg);
788 index_reg = free_reg;
789 index = Location::RegisterLocation(index_reg);
796 // Shifting the index value contained in `index_reg` by the scale
800 __ Sll(index_reg, index_re
[all...]
H A Dcode_generator_mips.cc825 Register index_reg = index_.AsRegister<Register>(); variable
826 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg));
827 if (codegen->IsCoreCalleeSaveRegister(index_reg)) {
828 // We are about to change the value of `index_reg` (see the
838 // register, `index_reg` _would_ eventually be saved onto
851 __ Move(free_reg, index_reg);
852 index_reg = free_reg;
853 index = Location::RegisterLocation(index_reg);
860 // Shifting the index value contained in `index_reg` by the scale
864 __ Sll(index_reg, index_re
[all...]
H A Dcode_generator_arm.cc1162 Register index_reg = index_.AsRegister<Register>(); variable
1163 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg));
1164 if (codegen->IsCoreCalleeSaveRegister(index_reg)) {
1165 // We are about to change the value of `index_reg` (see the
1175 // register, `index_reg` _would_ eventually be saved onto
1188 __ Mov(free_reg, index_reg);
1189 index_reg = free_reg;
1190 index = Location::RegisterLocation(index_reg);
1197 // Shifting the index value contained in `index_reg` by the scale
1201 __ Lsl(index_reg, index_re
8144 Register index_reg = index.IsRegisterPair() local
[all...]
H A Dcode_generator_arm_vixl.cc1204 vixl32::Register index_reg = RegisterFrom(index_); variable
1205 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg.GetCode()));
1206 if (codegen->IsCoreCalleeSaveRegister(index_reg.GetCode())) {
1207 // We are about to change the value of `index_reg` (see the
1217 // register, `index_reg` _would_ eventually be saved onto
1230 __ Mov(free_reg, index_reg);
1231 index_reg = free_reg;
1232 index = LocationFrom(index_reg);
1239 // Shifting the index value contained in `index_reg` by the scale
1243 __ Lsl(index_reg, index_re
8229 vixl32::Register index_reg = index.IsRegisterPair() local
[all...]
H A Dcode_generator_arm64.cc1206 Register index_reg = RegisterFrom(index_, Primitive::kPrimInt); variable
1209 // We are about to change the value of `index_reg` (see the
1219 // register, `index_reg` _would_ eventually be saved onto
1232 __ Mov(free_reg.W(), index_reg);
1233 index_reg = free_reg;
1234 index = LocationFrom(index_reg);
1241 // Shifting the index value contained in `index_reg` by the scale
1245 __ Lsl(index_reg, index_reg, Primitive::ComponentSizeShift(type));
1249 __ Add(index_reg, index_re
[all...]
H A Dcode_generator_x86.cc747 Register index_reg = index_.AsRegister<Register>(); variable
748 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg));
749 if (codegen->IsCoreCalleeSaveRegister(index_reg)) {
750 // We are about to change the value of `index_reg` (see the
760 // register, `index_reg` _would_ eventually be saved onto
773 __ movl(free_reg, index_reg);
774 index_reg = free_reg;
775 index = Location::RegisterLocation(index_reg);
782 // Shifting the index value contained in `index_reg` by the scale
786 __ shll(index_reg, Immediat
5672 Register index_reg = index_loc.AsRegister<Register>(); local
[all...]
H A Dcode_generator_x86_64.cc768 Register index_reg = index_.AsRegister<CpuRegister>().AsRegister(); variable
769 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg));
770 if (codegen->IsCoreCalleeSaveRegister(index_reg)) {
771 // We are about to change the value of `index_reg` (see the
781 // register, `index_reg` _would_ eventually be saved onto
794 __ movl(CpuRegister(free_reg), CpuRegister(index_reg));
795 index_reg = free_reg;
796 index = Location::RegisterLocation(index_reg);
803 // Shifting the index value contained in `index_reg` by the
807 __ shll(CpuRegister(index_reg), Immediat
5105 CpuRegister index_reg = index_loc.AsRegister<CpuRegister>(); local
[all...]
H A Dinstruction_builder.cc1481 uint8_t index_reg = instruction.VRegC_23x(); local
1486 HInstruction* index = LoadLocal(index_reg, Primitive::kPrimInt);
/art/runtime/arch/arm64/
H A Dquick_entrypoints_arm64.S2557 .macro INTROSPECTION_ARRAY_LOAD index_reg
2558 ldr wIP0, [xIP0, \index_reg, lsl #2]

Completed in 847 milliseconds