/art/disassembler/ |
H A D | disassembler_arm64.cc | 44 void CustomDisassembler::AppendRegisterNameToOutput(const Instruction* instr, argument 46 USE(instr); 58 Disassembler::AppendRegisterNameToOutput(instr, reg); 61 void CustomDisassembler::VisitLoadLiteral(const Instruction* instr) { argument 62 Disassembler::VisitLoadLiteral(instr); 71 void* data_address = instr->GetLiteralAddress<void*>(); 78 Instr op = instr->Mask(LoadLiteralMask); 100 void CustomDisassembler::VisitLoadStoreUnsignedOffset(const Instruction* instr) { argument 101 Disassembler::VisitLoadStoreUnsignedOffset(instr); 103 if (instr 112 const Instruction* instr = reinterpret_cast<const Instruction*>(begin); local [all...] |
H A D | disassembler_x86.cc | 164 RegFile dst_reg_file, const uint8_t** instr, 169 *address_bits = *reinterpret_cast<const uint32_t*>(*instr); 172 address << StringPrintf("[RIP + 0x%x]", *reinterpret_cast<const uint32_t*>(*instr)); 174 (*instr) += 4; 176 uint8_t sib = **instr; 177 (*instr)++; 209 address << StringPrintf(" + %d", *reinterpret_cast<const int32_t*>(*instr)); 212 *address_bits = *reinterpret_cast<const uint32_t*>(*instr); 215 (*instr) += 4; 218 address << StringPrintf(" + %d", *reinterpret_cast<const int8_t*>(*instr)); 161 DumpAddress(uint8_t mod, uint8_t rm, uint8_t rex64, uint8_t rex_w, bool no_ops, bool byte_operand, bool byte_second_operand, uint8_t* prefix, bool load, RegFile src_reg_file, RegFile dst_reg_file, const uint8_t** instr, uint32_t* address_bits) argument 247 DumpNops(std::ostream& os, const uint8_t* instr) argument 273 DumpInstruction(std::ostream& os, const uint8_t* instr) argument [all...] |
/art/compiler/optimizing/ |
H A D | common_arm.h | 96 inline vixl::aarch32::SRegister OutputSRegister(HInstruction* instr) { argument 97 Primitive::Type type = instr->GetType(); 99 return SRegisterFrom(instr->GetLocations()->Out()); 102 inline vixl::aarch32::DRegister OutputDRegister(HInstruction* instr) { argument 103 Primitive::Type type = instr->GetType(); 105 return DRegisterFrom(instr->GetLocations()->Out()); 108 inline vixl::aarch32::VRegister OutputVRegister(HInstruction* instr) { argument 109 Primitive::Type type = instr->GetType(); 111 return OutputSRegister(instr); 113 return OutputDRegister(instr); 117 InputSRegisterAt(HInstruction* instr, int input_index) argument 123 InputDRegisterAt(HInstruction* instr, int input_index) argument 129 InputVRegisterAt(HInstruction* instr, int input_index) argument 139 InputVRegister(HInstruction* instr) argument 144 OutputRegister(HInstruction* instr) argument 148 InputRegisterAt(HInstruction* instr, int input_index) argument 153 InputRegister(HInstruction* instr) argument 164 Int32ConstantFrom(HInstruction* instr) argument 183 HConstant* instr = location.GetConstant(); local 194 Uint64ConstantFrom(HInstruction* instr) argument 207 InputOperandAt(HInstruction* instr, int input_index) argument [all...] |
H A D | reference_type_propagation.cc | 86 void VisitLoadString(HLoadString* instr) OVERRIDE; 87 void VisitLoadException(HLoadException* instr) OVERRIDE; 88 void VisitNewArray(HNewArray* instr) OVERRIDE; 89 void VisitParameterValue(HParameterValue* instr) OVERRIDE; 90 void UpdateFieldAccessTypeInfo(HInstruction* instr, const FieldInfo& info); 91 void SetClassAsTypeInfo(HInstruction* instr, ObjPtr<mirror::Class> klass, bool is_exact) 93 void VisitInstanceFieldGet(HInstanceFieldGet* instr) OVERRIDE; 94 void VisitStaticFieldGet(HStaticFieldGet* instr) OVERRIDE; 95 void VisitUnresolvedInstanceFieldGet(HUnresolvedInstanceFieldGet* instr) OVERRIDE; 96 void VisitUnresolvedStaticFieldGet(HUnresolvedStaticFieldGet* instr) OVERRID 135 HInstruction* instr = iti.Current(); local 350 HInstruction* instr = it.Current(); local 512 SetClassAsTypeInfo(HInstruction* instr, ObjPtr<mirror::Class> klass, bool is_exact) argument 550 VisitDeoptimize(HDeoptimize* instr) argument 554 UpdateReferenceTypeInfo(HInstruction* instr, dex::TypeIndex type_idx, const DexFile& dex_file, bool is_exact) argument 567 VisitNewInstance(HNewInstance* instr) argument 572 VisitNewArray(HNewArray* instr) argument 577 VisitParameterValue(HParameterValue* instr) argument 587 UpdateFieldAccessTypeInfo(HInstruction* instr, const FieldInfo& info) argument 604 VisitInstanceFieldGet(HInstanceFieldGet* instr) argument 608 VisitStaticFieldGet(HStaticFieldGet* instr) argument 612 VisitUnresolvedInstanceFieldGet( HUnresolvedInstanceFieldGet* instr) argument 620 VisitUnresolvedStaticFieldGet( HUnresolvedStaticFieldGet* instr) argument 628 VisitLoadClass(HLoadClass* instr) argument 639 VisitClinitCheck(HClinitCheck* instr) argument 643 VisitLoadString(HLoadString* instr) argument 648 VisitLoadException(HLoadException* instr) argument 663 VisitNullCheck(HNullCheck* instr) argument 670 VisitBoundType(HBoundType* instr) argument 800 UpdateArrayGet(HArrayGet* instr, HandleCache* handle_cache) argument 820 UpdateReferenceTypeInfo(HInstruction* instr) argument 844 VisitInvoke(HInvoke* instr) argument 855 VisitArrayGet(HArrayGet* instr) argument 867 UpdateBoundType(HBoundType* instr) argument 891 UpdatePhi(HPhi* instr) argument 936 UpdateNullability(HInstruction* instr) argument [all...] |
H A D | instruction_simplifier_shared.h | 41 inline bool HasShifterOperand(HInstruction* instr, InstructionSet isa) { argument 44 bool res = instr->IsAdd() || instr->IsAnd() || (isa == kArm64 && instr->IsNeg()) || 45 instr->IsOr() || instr->IsSub() || instr->IsXor();
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H A D | common_arm64.h | 81 inline vixl::aarch64::Register OutputRegister(HInstruction* instr) { argument 82 return RegisterFrom(instr->GetLocations()->Out(), instr->GetType()); 85 inline vixl::aarch64::Register InputRegisterAt(HInstruction* instr, int input_index) { argument 86 return RegisterFrom(instr->GetLocations()->InAt(input_index), 87 instr->InputAt(input_index)->GetType()); 115 inline vixl::aarch64::FPRegister OutputFPRegister(HInstruction* instr) { argument 116 return FPRegisterFrom(instr->GetLocations()->Out(), instr->GetType()); 119 inline vixl::aarch64::FPRegister InputFPRegisterAt(HInstruction* instr, in argument 130 OutputCPURegister(HInstruction* instr) argument 136 InputCPURegisterAt(HInstruction* instr, int index) argument 142 InputCPURegisterOrZeroRegAt(HInstruction* instr, int index) argument 155 HConstant* instr = location.GetConstant(); local 174 InputOperandAt(HInstruction* instr, int input_index) argument 237 CanEncodeConstantAsImmediate(HConstant* constant, HInstruction* instr) argument 276 ARM64EncodableConstantOrRegister(HInstruction* constant, HInstruction* instr) argument [all...] |
/art/runtime/interpreter/mterp/arm/ |
H A D | op_nop.S | 1 FETCH_ADVANCE_INST 1 @ advance to next instr, load rINST
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/art/runtime/interpreter/mterp/arm64/ |
H A D | funopNarrow.S | 4 * "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg". 14 $instr // d0<- op
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H A D | funopNarrower.S | 4 * "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg". 13 $instr // d0<- op
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H A D | funopWide.S | 4 * "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg". 13 $instr // d0<- op
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H A D | funopWider.S | 4 * "instr" line that specifies an instruction that performs "$tgtreg = op $srcreg". 13 $instr // d0<- op
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H A D | unop.S | 2 * Generic 32-bit unary operation. Provide an "instr" line that 14 $instr // w0<- op, w0-w3 changed
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H A D | unopWide.S | 1 %default {"instr":"sub x0, xzr, x0"} 3 * Generic 64-bit unary operation. Provide an "instr" line that 13 $instr
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H A D | binop2addr.S | 3 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 26 $instr // $result<- op, w0-w3 changed
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H A D | binopLit16.S | 3 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 24 $instr // $result<- op, w0-w3 changed
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H A D | binopLit8.S | 3 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 10 * can be omitted completely if the shift is embedded in "instr". 30 $instr // $result<- op, w0-w3 changed
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H A D | binopWide2addr.S | 1 %default {"preinstr":"", "instr":"add x0, x0, x1", "r0":"x0", "r1":"x1", "chkzero":"0"} 3 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line 25 $instr // result<- op
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H A D | fbinop.S | 14 $instr // s0<- op
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H A D | fbinop2addr.S | 3 * an "instr" line that specifies an instruction that performs 13 $instr // s2<- op
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/art/runtime/ |
H A D | instrumentation_test.cc | 155 instrumentation::Instrumentation* instr = Runtime::Current()->GetInstrumentation(); local 161 instr->ConfigureStubs(key, level); 175 instrumentation::Instrumentation* instr = Runtime::Current()->GetInstrumentation(); local 180 instr->AddListener(&listener, instrumentation_event); 188 EXPECT_TRUE(HasEventListener(instr, instrumentation_event)); 190 ReportEvent(instr, instrumentation_event, soa.Self(), event_method, event_obj, event_dex_pc); 197 instr->RemoveListener(&listener, instrumentation_event); 201 EXPECT_FALSE(HasEventListener(instr, instrumentation_event)); 203 ReportEvent(instr, instrumentation_event, soa.Self(), event_method, event_obj, event_dex_pc); 293 static bool HasEventListener(const instrumentation::Instrumentation* instr, uint32_ 396 instrumentation::Instrumentation* instr = Runtime::Current()->GetInstrumentation(); local 458 instrumentation::Instrumentation* instr = runtime->GetInstrumentation(); local 487 instrumentation::Instrumentation* instr = runtime->GetInstrumentation(); local 505 instrumentation::Instrumentation* instr = runtime->GetInstrumentation(); local 551 instrumentation::Instrumentation* instr = runtime->GetInstrumentation(); local 570 instrumentation::Instrumentation* instr = runtime->GetInstrumentation(); local [all...] |
/art/runtime/interpreter/mterp/x86/ |
H A D | binop.S | 3 * Generic 32-bit binary operation. Provide an "instr" line that 15 $instr # ex: addl (rFP,%ecx,4),%eax
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H A D | binop2addr.S | 3 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 17 $instr # for ex: addl %eax,(rFP,%ecx,4)
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H A D | binopLit8.S | 3 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 16 $instr # ex: addl %ecx,%eax
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H A D | unop.S | 1 %default {"instr":""} 3 * Generic 32-bit unary operation. Provide an "instr" line that 11 $instr
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/art/runtime/interpreter/mterp/x86_64/ |
H A D | binop.S | 3 * Generic 32-bit binary operation. Provide an "instr" line that 15 $instr # ex: addl (rFP,%rcx,4),%eax
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