Searched refs:t0 (Results 1 - 25 of 225) sorted by relevance

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/bionic/libc/tzcode/
H A Ddifftime.c25 double t1 = time1, t0 = time0; local
26 return t1 - t0;
38 uintmax_t t1 = time1, t0 = time0; local
39 return time0 <= time1 ? t1 - t0 : dminus(t0 - t1);
55 long double t1 = time1, t0 = time0; local
56 return t1 - t0;
/bionic/libc/arch-mips/string/
H A Dstrncmp.S131 srl t0, a2, (2 + NSIZE / 4)
132 beqz t0, L(byteloop) #process by bytes if less than (2 * NSIZE)
135 or t0, zero, NSIZE
136 SUBU t1, t0, t1 #process (NSIZE - 1) bytes at max
155 dsll t0, t8, 32
156 or t8, t0
167 andi t0, a0, (NSIZE - 1)
168 bne t0, zero, L(byteloop)
170 andi t0, a0, (NSIZE - 1)
171 bne t0, zer
[all...]
H A Dstrcmp.S131 or t0, zero, NSIZE
132 SUBU t1, t0, t1 #process (NSIZE - 1) bytes at max
157 SUBU t3, t0, t2 #t3 will be used as shifter
164 SUBU t0, v0, t8; \
167 and t0, t0, t1; \
168 bne t0, zero, L(returnzero);\
192 SUBU t0, v0, t8; \
194 and t0, t0, t
[all...]
/bionic/linker/arch/mips/
H A Dbegin.S45 la $t0, 1f
47 1: subu $t0, $ra, $t0
54 addu $t1, $t0
63 addu $s0, $t0
90 addu $t1, $t0
/bionic/libc/arch-mips/bionic/
H A Dsetjmp.S215 li t0, ~7
216 and a0, t0 # round jmpbuf addr DOWN to 8-byte boundary
227 andi t0, v0, 1 # extract savesigs flag
229 beqz t0, 1f # do saving of signal mask?
240 REG_L t0, SC_FLAG_OFFSET(a0) # move cookie to temp reg
246 m_mangle_reg_and_store ra, t0, t1, SC_REGS+0*REGSZ(a0)
247 m_mangle_reg_and_store s0, t0, t2, SC_REGS+1*REGSZ(a0)
248 m_mangle_reg_and_store s1, t0, t3, SC_REGS+2*REGSZ(a0)
249 m_mangle_reg_and_store s2, t0, t1, SC_REGS+3*REGSZ(a0)
250 m_mangle_reg_and_store s3, t0, t
[all...]
/bionic/libc/arch-mips64/bionic/
H A Dsetjmp.S215 li t0, ~7
216 and a0, t0 # round jmpbuf addr DOWN to 8-byte boundary
227 andi t0, v0, 1 # extract savesigs flag
229 beqz t0, 1f # do saving of signal mask?
240 REG_L t0, SC_FLAG_OFFSET(a0) # move cookie to temp reg
246 m_mangle_reg_and_store ra, t0, t1, SC_REGS+0*REGSZ(a0)
247 m_mangle_reg_and_store s0, t0, t2, SC_REGS+1*REGSZ(a0)
248 m_mangle_reg_and_store s1, t0, t3, SC_REGS+2*REGSZ(a0)
249 m_mangle_reg_and_store s2, t0, t1, SC_REGS+3*REGSZ(a0)
250 m_mangle_reg_and_store s3, t0, t
[all...]
/bionic/linker/arch/mips64/
H A Dbegin.S64 LA t0, 1b
65 PTR_SUBU t0, ra, t0
72 PTR_ADDU t1, t0
81 PTR_ADDU s0, t0
107 PTR_ADDU t1, t0
/bionic/libc/arch-mips64/syscalls/
H A D___clock_nanosleep.S15 move t0, ra
23 move ra, t0
H A D___close.S15 move t0, ra
23 move ra, t0
H A D___faccessat.S15 move t0, ra
23 move ra, t0
H A D___fchmod.S15 move t0, ra
23 move ra, t0
H A D___fchmodat.S15 move t0, ra
23 move ra, t0
H A D___fgetxattr.S15 move t0, ra
23 move ra, t0
H A D___flistxattr.S15 move t0, ra
23 move ra, t0
H A D___fsetxattr.S15 move t0, ra
23 move ra, t0
H A D___mremap.S15 move t0, ra
23 move ra, t0
H A D___rt_sigqueueinfo.S15 move t0, ra
23 move ra, t0
H A D__accept4.S15 move t0, ra
23 move ra, t0
H A D__brk.S15 move t0, ra
23 move ra, t0
H A D__connect.S15 move t0, ra
23 move ra, t0
H A D__epoll_pwait.S15 move t0, ra
23 move ra, t0
H A D__exit.S15 move t0, ra
23 move ra, t0
H A D__fadvise64.S15 move t0, ra
23 move ra, t0
H A D__fstatfs.S15 move t0, ra
23 move ra, t0
H A D__getcpu.S15 move t0, ra
23 move ra, t0

Completed in 209 milliseconds

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