Searched refs:LSUCNT (Results 1 - 4 of 4) sorted by relevance

/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
H A Dcore_cm3.h768 __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ member in struct:__anon228
856 #define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
857 #define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */
H A Dcore_cm4.h808 __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ member in struct:__anon246
896 #define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
897 #define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */
H A Dcore_sc300.h748 __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ member in struct:__anon297
836 #define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
837 #define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */
H A Dcore_cm7.h989 __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ member in struct:__anon265
1080 #define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
1081 #define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */

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