Searched refs:MPU (Results 1 - 7 of 7) sorted by relevance

/device/google/contexthub/firmware/os/platform/stm32/
H A Dmpu.c32 #define MPU ((struct CortexMpu*)0xE000ED94UL) macro
87 MPU->RNR = regionNo;
88 MPU->RASR = 0; /* disable region before changing it */
89 MPU->RBAR = proposedStart;
90 MPU->RASR = MPU_SRD_BITS | MPU_BIT_ENABLE | attrs | (lenVal << 1);
109 MPU->CTRL = 0x07; //MPU on, even during faults, supervisor default: allow, user default: default deny
/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
H A Dcore_cm0plus.h221 - Core MPU Register
503 \defgroup CMSIS_MPU Memory Protection Unit (MPU)
504 \brief Type definitions for the Memory Protection Unit (MPU)
508 /** \brief Structure type to access the Memory Protection Unit (MPU).
512 __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
513 __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
514 __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
515 __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
516 __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
519 /* MPU Typ
616 #define MPU macro
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H A Dcore_sc000.h216 - Core MPU Register
522 \defgroup CMSIS_MPU Memory Protection Unit (MPU)
523 \brief Type definitions for the Memory Protection Unit (MPU)
527 /** \brief Structure type to access the Memory Protection Unit (MPU).
531 __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
532 __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
533 __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
534 __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
535 __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
538 /* MPU Typ
636 #define MPU macro
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H A Dcore_cm3.h217 - Core MPU Register
1053 \defgroup CMSIS_MPU Memory Protection Unit (MPU)
1054 \brief Type definitions for the Memory Protection Unit (MPU)
1058 /** \brief Structure type to access the Memory Protection Unit (MPU).
1062 __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
1063 __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
1064 __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
1065 __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
1066 __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
1067 __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia
1274 #define MPU macro
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H A Dcore_cm4.h263 - Core MPU Register
1093 \defgroup CMSIS_MPU Memory Protection Unit (MPU)
1094 \brief Type definitions for the Memory Protection Unit (MPU)
1098 /** \brief Structure type to access the Memory Protection Unit (MPU).
1102 __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
1103 __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
1104 __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
1105 __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
1106 __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
1107 __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia
1420 #define MPU macro
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H A Dcore_sc300.h217 - Core MPU Register
1033 \defgroup CMSIS_MPU Memory Protection Unit (MPU)
1034 \brief Type definitions for the Memory Protection Unit (MPU)
1038 /** \brief Structure type to access the Memory Protection Unit (MPU).
1042 __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
1043 __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
1044 __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
1045 __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
1046 __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
1047 __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia
1254 #define MPU macro
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H A Dcore_cm7.h278 - Core MPU Register
1277 \defgroup CMSIS_MPU Memory Protection Unit (MPU)
1278 \brief Type definitions for the Memory Protection Unit (MPU)
1282 /** \brief Structure type to access the Memory Protection Unit (MPU).
1286 __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
1287 __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
1288 __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
1289 __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
1290 __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
1291 __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia
1607 #define MPU macro
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