Searched refs:LiveIn (Results 1 - 22 of 22) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/CodeGen/
H A DLiveRangeCalc.cpp25 LiveIn.clear();
29 // Transfer information from the LiveIn vector to the live ranges.
31 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveIn.begin(),
32 E = LiveIn.end(); I != E; ++I) {
53 LiveIn.clear();
156 LiveIn.clear();
157 LiveIn.reserve(WorkList.size());
162 assert(LiveIn.back().DomNode->getBlock() == KillMBB);
163 LiveIn.back().Kill = Kill;
183 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveIn
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H A DLiveRangeCalc.h92 /// LiveIn - Work list of blocks where the live-in value has yet to be
96 SmallVector<LiveInBlock, 16> LiveIn; member in class:llvm::LiveRangeCalc
100 /// to be live-in are added to LiveIn. If a unique reaching def is found,
110 /// blocks in LiveIn. Create PHI-def values as required to preserve SSA form.
118 /// updateLiveIns - Add liveness as specified in the LiveIn vector, using VNI
119 /// as a wildcard value for LiveIn entries without a value.
209 LiveIn.push_back(LiveInBlock(LI, DomNode, Kill));
H A DSplitKit.h74 bool LiveIn; ///< Current reg is live in. member in struct:llvm::SplitAnalysis::BlockInfo
H A DRegAllocGreedy.cpp685 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare;
696 if (BI.LiveIn) {
885 if (BI.LiveIn && BI.LiveOut && BI.FirstDef)
906 if (BI.LiveIn)
966 if (BI.LiveIn) {
1276 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr;
1390 const bool LiveBefore = SplitBefore != 0 || BI.LiveIn;
1483 bool LiveBefore = BestBefore != 0 || BI.LiveIn;
H A DSplitKit.cpp190 BI.LiveIn = LVI->start <= Start;
193 if (!BI.LiveIn) {
220 BI.LiveIn = false;
1119 if (BI.LiveIn && BI.LiveOut)
1270 assert(BI.LiveIn && "Must be live-in");
1359 << (BI.LiveIn ? ", stack-in" : ", defined in block"));
1367 if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) {
/external/llvm/lib/CodeGen/
H A DLiveRangeCalc.h98 /// LiveIn - Work list of blocks where the live-in value has yet to be
102 SmallVector<LiveInBlock, 16> LiveIn; member in class:llvm::LiveRangeCalc
111 /// live in are added to the LiveIn array, and the function returns false.
118 /// blocks in LiveIn. Create PHI-def values as required to preserve SSA form.
124 /// Transfer information from the LiveIn vector to the live ranges and update
233 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
H A DLiveRangeCalc.cpp39 LiveIn.clear();
215 for (const LiveInBlock &I : LiveIn) {
235 LiveIn.clear();
347 LiveIn.clear();
371 // Multiple values were found, so transfer the work list to the LiveIn array
373 LiveIn.reserve(WorkList.size());
379 LiveIn.back().Kill = Use;
398 for (LiveInBlock &I : LiveIn) {
H A DSafeStackColoring.cpp99 BlockInfo.LiveIn.resize(NumAllocas);
156 // Compute LiveIn by unioning together the LiveOut sets of all preds.
175 // Update block LiveIn set, noting whether it has changed.
176 if (LocalLiveIn.test(BlockInfo.LiveIn)) {
178 BlockInfo.LiveIn |= LocalLiveIn;
203 // LiveIn ranges start at the first instruction.
205 if (BlockInfo.LiveIn.test(AllocaNo)) {
251 << ", livein " << BlockInfo.LiveIn << ", liveout "
H A DSafeStackColoring.h41 BitVector LiveIn; member in struct:llvm::safestack::StackColoring::BlockLifetimeInfo
H A DStackColoring.cpp261 BitVector LiveIn; member in struct:__anon12647::StackColoring::BlockLifetimeInfo
405 dumpBV("LIVE_IN", BlockInfo.LiveIn);
640 // Compute LiveIn by unioning together the LiveOut sets of all preds.
660 // Update block LiveIn set, noting whether it has changed.
661 if (LocalLiveIn.test(BlockInfo.LiveIn)) {
663 BlockInfo.LiveIn |= LocalLiveIn;
710 for (int pos = MBBLiveness.LiveIn.find_first(); pos != -1;
711 pos = MBBLiveness.LiveIn.find_next(pos)) {
H A DMachineCSE.cpp626 unsigned LiveIn = PhysDefs.pop_back_val(); local
627 if (!MBB->isLiveIn(LiveIn))
628 MBB->addLiveIn(LiveIn);
H A DMIRPrinter.cpp232 yaml::MachineFunctionLiveIn LiveIn; local
233 printReg(I->first, LiveIn.Register, TRI);
235 printReg(I->second, LiveIn.VirtualRegister, TRI);
236 MF.LiveIns.push_back(LiveIn);
H A DSplitKit.h107 bool LiveIn; ///< Current reg is live in. member in struct:llvm::SplitAnalysis::BlockInfo
H A DSplitKit.cpp228 BI.LiveIn = LVI->start <= Start;
231 if (!BI.LiveIn) {
258 BI.LiveIn = false;
1234 if (BI.LiveIn && BI.LiveOut)
1385 assert(BI.LiveIn && "Must be live-in");
1474 << (BI.LiveIn ? ", stack-in" : ", defined in block"));
1482 if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) {
H A DRegisterPressure.cpp873 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask;
874 if (LiveIn != 0) {
875 discoverLiveIn(RegisterMaskPair(Reg, LiveIn));
876 increaseRegPressure(Reg, LiveMask, LiveMask | LiveIn);
877 LiveRegs.insert(RegisterMaskPair(Reg, LiveIn));
1292 /// This assumes that the current LiveIn set is sufficient.
H A DRegAllocGreedy.cpp947 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare;
958 if (BI.LiveIn) {
1151 if (BI.LiveIn && BI.LiveOut && BI.FirstDef)
1172 if (BI.LiveIn)
1234 if (BI.LiveIn) {
1656 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr;
1832 const bool LiveBefore = SplitBefore != 0 || BI.LiveIn;
1927 bool LiveBefore = BestBefore != 0 || BI.LiveIn;
H A DMachineBasicBlock.cpp372 bool LiveIn = isLiveIn(PhysReg); local
378 if (LiveIn)
391 if (!LiveIn)
/external/llvm/lib/Target/Hexagon/
H A DRDFLiveness.cpp626 RefMap LiveIn; local
627 traverse(&MF.front(), LiveIn);
680 BitVector LiveIn(TRI.getNumRegs()), Live(TRI.getNumRegs());
681 CopyLiveIns(B, LiveIn);
775 void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) { argument
776 // The LiveIn map, for each (physical) register, contains the set of live
807 LiveIn[S.first].insert(S.second.begin(), S.second.end());
815 dbgs() << "\n LiveIn: " << Print<RefMap>(LiveIn, DFG);
822 LiveIn[
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H A DRDFLiveness.h104 void traverse(MachineBasicBlock *B, RefMap &LiveIn);
/external/llvm/include/llvm/CodeGen/
H A DMIRYamlMapping.h168 static void mapping(IO &YamlIO, MachineFunctionLiveIn &LiveIn) { argument
169 YamlIO.mapRequired("reg", LiveIn.Register);
171 "virtual-reg", LiveIn.VirtualRegister,
/external/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp406 for (const auto &LiveIn : YamlMF.LiveIns) {
408 if (parseNamedRegisterReference(PFS, Reg, LiveIn.Register.Value, Error))
409 return error(Error, LiveIn.Register.SourceRange);
411 if (!LiveIn.VirtualRegister.Value.empty()) {
412 if (parseVirtualRegisterReference(PFS, VReg, LiveIn.VirtualRegister.Value,
414 return error(Error, LiveIn.VirtualRegister.SourceRange);
/external/llvm/lib/Transforms/Scalar/
H A DRewriteStatepointsForGC.cpp148 MapVector<BasicBlock *, SetVector<Value *>> LiveIn; member in struct:__anon13404::GCPtrLivenessData
2387 // KILL/Def - Remove this definition from LiveIn
2395 // USE - Add to the LiveIn set for this instruction
2465 checkBasicSSA(DT, Data.LiveIn[&BB], BB.getTerminator());
2486 Data.LiveIn[&BB] = Data.LiveSet[&BB];
2487 Data.LiveIn[&BB].set_union(Data.LiveOut[&BB]);
2488 Data.LiveIn[&BB].set_subtract(Data.KillSet[&BB]);
2489 if (!Data.LiveIn[&BB].empty())
2502 assert(Data.LiveIn.count(Succ));
2503 LiveOut.set_union(Data.LiveIn[Suc
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