Searched refs:OpReg (Results 1 - 11 of 11) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86FastISel.cpp | 1091 unsigned OpReg = getRegForValue(TI->getOperand(0)); local 1092 if (OpReg == 0) return false; 1094 .addReg(OpReg).addImm(1); 1114 unsigned OpReg = getRegForValue(BI->getCondition()); local 1115 if (OpReg == 0) return false; 1118 .addReg(OpReg).addImm(1); 1127 unsigned CReg = 0, OpReg = 0; local 1133 case Instruction::LShr: OpReg = X86::SHR8rCL; break; 1134 case Instruction::AShr: OpReg = X86::SAR8rCL; break; 1135 case Instruction::Shl: OpReg 1240 unsigned OpReg = getRegForValue(V); local 1259 unsigned OpReg = getRegForValue(V); local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 1654 unsigned OpReg = getRegForValue(TI->getOperand(0)); local 1655 if (OpReg == 0) return false; 1657 .addReg(OpReg).addImm(1); 1690 unsigned OpReg = getRegForValue(BI->getCondition()); local 1691 if (OpReg == 0) return false; 1694 .addReg(OpReg).addImm(1); 1702 unsigned CReg = 0, OpReg = 0; local 1708 case Instruction::LShr: OpReg = X86::SHR8rCL; break; 1709 case Instruction::AShr: OpReg = X86::SAR8rCL; break; 1710 case Instruction::Shl: OpReg 2240 unsigned OpReg = getRegForValue(Opnd); local 2281 unsigned OpReg = getRegForValue(I->getOperand(0)); local 2316 unsigned OpReg = getRegForValue(I->getOperand(0)); local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 306 unsigned OpReg = MI->getOperand(I).getReg(); local 308 if (!TRI->isVirtualRegister(OpReg)) 311 MachineInstr *Def = MRI->getVRegDef(OpReg);
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H A D | ARMFastISel.cpp | 1277 unsigned OpReg = getRegForValue(TI->getOperand(0)); local 1278 OpReg = constrainOperandRegClass(TII.get(TstOpc), OpReg, 0); 1281 .addReg(OpReg).addImm(1));
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | FastISel.cpp | 796 unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); local 797 if (OpReg == 0) return false; 804 ISD::FNEG, OpReg, OpRegIsKill); 818 ISD::BITCAST, OpReg, OpRegIsKill);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FastISel.cpp | 1478 unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); local 1479 if (!OpReg) 1486 OpReg, OpRegIsKill); 1501 ISD::BITCAST, OpReg, OpRegIsKill);
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/external/llvm/lib/CodeGen/ |
H A D | MachineInstr.cpp | 2013 unsigned OpReg = MO.getReg(); 2014 if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg)
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 3968 unsigned OpReg = Inst.getOperand(i).getReg(); local 3969 if (OpReg == Reg) 3972 if (!isARMLowRegister(OpReg) && (!HiReg || OpReg != HiReg)) 3982 unsigned OpReg = Inst.getOperand(i).getReg(); local 3983 if (OpReg == Reg)
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/external/llvm/lib/Target/X86/InstPrinter/ |
H A D | X86InstComments.cpp | 176 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); local 178 getVectorRegSize(OpReg)/ScalarVT.getSizeInBits());
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1168 unsigned OpReg = getRegForValue(TI->getOperand(0)); local 1171 .addReg(OpReg).addImm(1));
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 6106 unsigned OpReg = Inst.getOperand(i).getReg(); local 6107 if (OpReg == Reg) 6110 if (!isARMLowRegister(OpReg) && (!HiReg || OpReg != HiReg)) 6120 unsigned OpReg = Inst.getOperand(i).getReg(); local 6121 if (OpReg == Reg)
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