/external/clang/test/SemaCXX/ |
H A D | PR20705.cpp | 14 class PC { class 19 static typename PC<T, Invalid>::Type Foo();
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/external/llvm/unittests/MC/ |
H A D | Disassembler.cpp | 40 unsigned PC = 0; local 42 InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString, 46 PC += InstSize; 50 InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString, 54 PC += InstSize; 58 InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString,
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/external/clang/unittests/AST/ |
H A D | CommentParser.cpp | 438 ParagraphComment *PC; local 441 ::testing::AssertionResult AR = GetChildAt(C, Idx, PC); 447 ::testing::AssertionResult AR = HasChildCount(PC, 1); 453 ::testing::AssertionResult AR = HasTextAt(PC, 0, Text); 622 ParagraphComment *PC; local 623 ASSERT_TRUE(GetChildAt(FC, 0, PC)); 625 ASSERT_TRUE(HasChildCount(PC, 2)); 626 ASSERT_TRUE(HasTextWithNewlineAt(PC, 0, " Aaa")); 627 ASSERT_TRUE(HasTextAt(PC, 1, " Bbb")); 690 ParagraphComment *PC; local 707 ParagraphComment *PC; local 714 ParagraphComment *PC; local 734 ParagraphComment *PC; local 744 ParagraphComment *PC; local 760 ParagraphComment *PC; local 779 ParagraphComment *PC; local 789 ParagraphComment *PC; local 813 ParagraphComment *PC; local 843 ParagraphComment *PC; local 873 ParagraphComment *PC; local 904 ParagraphComment *PC; local 925 ParagraphComment *PC; local 959 ParagraphComment *PC; local 977 ParagraphComment *PC; local 984 ParagraphComment *PC; local 998 ParagraphComment *PC; local 1015 ParagraphComment *PC; local 1033 ParagraphComment *PC; local 1050 ParagraphComment *PC; local 1068 ParagraphComment *PC; local 1091 ParagraphComment *PC; local 1113 ParagraphComment *PC; local 1137 ParagraphComment *PC; local 1159 ParagraphComment *PC; local 1182 ParagraphComment *PC; local 1204 ParagraphComment *PC; local 1436 ParagraphComment *PC; local [all...] |
/external/libcxx/test/std/containers/associative/multimap/multimap.ops/ |
H A D | count.pass.cpp | 145 typedef PrivateConstructor PC; typedef 146 typedef std::multimap<PC, double, std::less<>> M; 150 m.insert ( std::make_pair<PC, double> ( PC::make(5), 1 )); 151 m.insert ( std::make_pair<PC, double> ( PC::make(5), 2 )); 152 m.insert ( std::make_pair<PC, double> ( PC::make(5), 3 )); 153 m.insert ( std::make_pair<PC, double> ( PC [all...] |
H A D | find.pass.cpp | 195 typedef PrivateConstructor PC; typedef 196 typedef std::multimap<PC, double, std::less<>> M; 200 m.insert ( std::make_pair<PC, double> ( PC::make(5), 1 )); 201 m.insert ( std::make_pair<PC, double> ( PC::make(5), 2 )); 202 m.insert ( std::make_pair<PC, double> ( PC::make(5), 3 )); 203 m.insert ( std::make_pair<PC, double> ( PC [all...] |
H A D | lower_bound.pass.cpp | 206 typedef PrivateConstructor PC; typedef 207 typedef std::multimap<PC, double, std::less<>> M; 211 m.insert ( std::make_pair<PC, double> ( PC::make(5), 1 )); 212 m.insert ( std::make_pair<PC, double> ( PC::make(5), 2 )); 213 m.insert ( std::make_pair<PC, double> ( PC::make(5), 3 )); 214 m.insert ( std::make_pair<PC, double> ( PC [all...] |
H A D | upper_bound.pass.cpp | 205 typedef PrivateConstructor PC; typedef 206 typedef std::multimap<PC, double, std::less<>> M; 210 m.insert ( std::make_pair<PC, double> ( PC::make(5), 1 )); 211 m.insert ( std::make_pair<PC, double> ( PC::make(5), 2 )); 212 m.insert ( std::make_pair<PC, double> ( PC::make(5), 3 )); 213 m.insert ( std::make_pair<PC, double> ( PC [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.h | 79 return Instr->getOperand(2).getReg() != ARM::PC; 80 // ADD PC, SP and BLX PC were always unpredictable, 84 return Instr->getOperand(0).getReg() != ARM::PC; 86 return Instr->getOperand(0).getReg() != ARM::PC && 87 Instr->getOperand(2).getReg() != ARM::PC; 90 return Instr->getOperand(0).getReg() != ARM::PC && 91 Instr->getOperand(1).getReg() != ARM::PC;
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/external/compiler-rt/lib/esan/ |
H A D | working_set.h | 27 void processRangeAccessWorkingSet(uptr PC, uptr Addr, SIZE_T Size,
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H A D | esan.h | 45 void processRangeAccess(uptr PC, uptr Addr, int Size, bool IsWrite);
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/external/llvm/lib/MC/ |
H A D | MCInstrDesc.cpp | 37 unsigned PC = RI.getProgramCounter(); local 38 if (PC == 0) 40 if (hasDefOfPhysReg(MI, PC, RI)) 42 // A variadic instruction may define PC in the variable operand list. 48 RI.isSubRegisterEq(PC, MI.getOperand(i).getReg()))
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/external/llvm/test/MC/ARM/ |
H A D | misaligned-blx.s | 23 @ "Align(PC, 4)" during blx operation. 29 blx _misaligned @ PC=0 (mod 4) 31 blx _misaligned @ PC=2 (mod 4) 33 blx _aligned @ PC=0 (mod 4) 35 blx _aligned @ PC=2 (mod 4)
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H A D | arm-load-store-multiple-deprecated.s | 14 @ CHECK: warning: use of SP or PC in the list is deprecated 18 @ CHECK: warning: use of SP or PC in the list is deprecated 22 @ CHECK: warning: use of SP or PC in the list is deprecated 26 @ CHECK: warning: use of SP or PC in the list is deprecated 30 @ CHECK: warning: use of SP or PC in the list is deprecated 34 @ CHECK: warning: use of SP or PC in the list is deprecated 42 @ CHECK: warning: use of SP or PC in the list is deprecated 46 @ CHECK: warning: use of SP or PC in the list is deprecated 50 @ CHECK: warning: use of SP or PC in the list is deprecated 54 @ CHECK: warning: use of SP or PC i [all...] |
H A D | aligned-blx.s | 19 @ "Align(PC, 4)" during blx operation. 26 blx _aligned @ PC=0 (mod 4) 27 blx _aligned @ PC=0 (mod 4) 29 blx _aligned @ PC=2 (mod 4)
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H A D | thumb-load-store-multiple.s | 19 @ CHECK: error: PC and LR may not be in the register list simultaneously 35 @ error: PC and LR may not be in the register list simultaneously 49 @ CHECK: error: PC may not be in the register list 51 @ CHECK: error: SP and PC may not be in the register list 59 @ CHECK: error: PC may not be in the register list 61 @ CHECK: error: SP and PC may not be in the register list 69 @ CHECK: error: PC may not be in the register list 71 @ CHECK: error: SP and PC may not be in the register list 79 @ CHECK: error: PC and LR may not be in the register list simultaneously
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H A D | thumb2-ldrb-ldrh.s | 4 @ Thumb2 LDRS?[BH] are not valid when Rt == PC (these encodings are used for
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/external/llvm/test/MC/PowerPC/ |
H A D | pr24686.s | 7 # CHECK: LLVM ERROR: Invalid PC-relative half16ds relocation
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/external/strace/linux/sparc/ |
H A D | gen.pl | 3 open PC, "../i386/syscallent.h" || die "no puedo abrir PC\n"; 20 while (<PC>){
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/external/compiler-rt/lib/sanitizer_common/tests/ |
H A D | sanitizer_stacktrace_test.cc | 41 static uptr PC(uptr idx) { function in namespace:__sanitizer 57 fake_stack[i+1] = PC(i + 1); // retaddr 66 start_pc = PC(0); 81 EXPECT_EQ(PC(i*2 - 1), trace.trace[i]); 95 EXPECT_EQ(PC(i*2 - 1), trace.trace[i]); 108 EXPECT_EQ(PC(i*2 - 1), trace.trace[i]); 131 fake_stack[1] = PC(1); 135 EXPECT_EQ(PC(0), trace.trace[0]); 136 EXPECT_EQ(PC(1), trace.trace[1]); 148 EXPECT_EQ(PC( [all...] |
/external/swiftshader/third_party/LLVM/include/llvm-c/ |
H A D | Disassembler.h | 32 * is at the PC parameter. For some instruction sets, there can be more than 43 typedef int (*LLVMOpInfoCallback)(void *DisInfo, uint64_t PC, 57 * including any PC adjustment, is passed in to the call back in the Value 93 * disassembler for things like adding a comment for a PC plus a constant 98 * instruction is passed indirectly as is the PC of the instruction in 116 /* The input reference is from a PC relative load instruction. */ 150 * instruction is at the address specified by the PC parameter. If a valid 157 uint64_t BytesSize, uint64_t PC,
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetObjectFile.cpp | 46 const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext()); local 47 return MCBinaryExpr::createSub(Res, PC, getContext()); 64 "Arch64 does not support GOT PC rel with extra offset"); 71 const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext()); local 72 return MCBinaryExpr::createSub(Res, PC, getContext());
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/external/libcxx/test/std/containers/associative/map/map.ops/ |
H A D | count.pass.cpp | 160 typedef PrivateConstructor PC; typedef 161 typedef std::map<PC, double, std::less<>> M; 165 m [ PC::make(5) ] = 5; 166 m [ PC::make(6) ] = 6; 167 m [ PC::make(7) ] = 7; 168 m [ PC::make(8) ] = 8; 169 m [ PC::make(9) ] = 9; 170 m [ PC::make(10) ] = 10; 171 m [ PC::make(11) ] = 11; 172 m [ PC [all...] |
/external/llvm/test/ExecutionEngine/RuntimeDyld/X86/ |
H A D | ELF_x86-64_PIC-small-relocations.s | 12 # Test PC-rel branch.
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/external/llvm/lib/Fuzzer/ |
H A D | FuzzerTracePC.cpp | 1 //===- FuzzerTracePC.cpp - PC tracing--------------------------------------===// 51 static void HandlePC(uint32_t PC) { argument 52 // We take 12 bits of PC and mix it with the previous PCs. 53 uintptr_t Next = (Prev << 5) ^ (PC & 4095);
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCAsmInfo.cpp | 64 const MCExpr *PC = MCSymbolRefExpr::create(PCSym, Context); local 65 return MCBinaryExpr::createSub(Res, PC, Context);
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