/external/valgrind/memcheck/tests/amd64-linux/ |
H A D | int3-amd64.stdout.exp | 2 in int_handler, RIP is ...
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/external/strace/linux/x86_64/ |
H A D | userent.h | 17 XLAT(8*RIP),
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/external/kernel-headers/original/uapi/asm-x86/asm/ |
H A D | ptrace-abi.h | 54 #define RIP 128 macro
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/external/libunwind/src/x86_64/ |
H A D | init.h | 65 c->dwarf.loc[RIP] = REG_INIT_LOC(c, rip, RIP); 67 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip); 80 c->dwarf.ret_addr_column = RIP;
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H A D | Gstep.c | 135 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0); 199 c->dwarf.loc[RIP] = rip_loc; 202 c->dwarf.ret_addr_column = RIP; 210 if (!DWARF_IS_NULL_LOC (c->dwarf.loc[RIP])) 212 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip); 213 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n", 214 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
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H A D | Gos-freebsd.c | 51 /* Check if RIP points at sigreturn sequence. 74 /* Check if RIP points at standard syscall sequence. 127 c->dwarf.loc[RIP] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RIP, 0); 136 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0); 137 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip); 138 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n", 139 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
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H A D | unwind_i.h | 55 #define RIP 16 macro
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H A D | Gregs.c | 77 c->dwarf.ip = *valp; /* also update the RIP cache */ 78 loc = c->dwarf.loc[RIP];
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H A D | Gstash_frame.c | 80 /* Later we are going to fish out {RBP,RSP,RIP} from sigcontext via 87 assert (DWARF_GET_LOC(d->loc[RIP]) - uc == UC_MCONTEXT_GREGS_RIP);
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/external/llvm/lib/Analysis/ |
H A D | RegionPrinter.cpp | 146 static RegionInfo *getGraph(RegionInfoPass *RIP) { argument 147 return &RIP->getRegionInfo();
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/external/valgrind/coregrind/m_sigframe/ |
H A D | sigframe-amd64-darwin.c | 109 SC2(__rip,RIP); 137 SC2(RIP,__rip); 226 "next RIP=%#lx, next RSP=%#lx\n", 269 "valid magic; next RIP=%#llx\n",
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H A D | sigframe-amd64-linux.c | 362 SC2(rip,RIP); 496 "next %%RIP = %#llx, status=%d\n", 597 "VG_(signal_return) (thread %u): isRT=%d valid magic; RIP=%#llx\n",
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 51 : X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP), 54 (TT.isArch64Bit() ? X86::RIP : X86::EIP)) { 181 // NOSP does not contain RIP, so no special case here. 190 // NOSP does not contain RIP, so no special case here. 442 for (MCSubRegIterator I(X86::RIP, this, /*IncludeSelf=*/true); I.isValid(); 521 for (auto Reg : {X86::EFLAGS, X86::RIP, X86::EIP, X86::IP})
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/external/google-breakpad/src/common/android/ |
H A D | breakpad_getcontext_unittest.cc | 137 CHECK_REG(RIP);
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/external/llvm/lib/Transforms/ObjCARC/ |
H A D | ObjCARCOpts.cpp | 1606 for (Instruction *RIP : NewRetainReleaseRRI.ReverseInsertPts) { 1607 if (ReleasesToMove.ReverseInsertPts.insert(RIP).second) { 1610 const BBState &RIPBBState = BBStates[RIP->getParent()]; 1663 for (Instruction *RIP : NewReleaseRetainRRI.ReverseInsertPts) { 1664 if (RetainsToMove.ReverseInsertPts.insert(RIP).second) { 1667 const BBState &RIPBBState = BBStates[RIP->getParent()];
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/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCTargetDesc.cpp | 285 ? X86::RIP // Should have dwarf #16. 323 MachineLocation CSSrc(is64Bit ? X86::RIP : X86::EIP);
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H A D | X86AsmBackend.cpp | 230 // Check if it has an expression and is not RIP relative. 238 if (Op.isReg() && Op.getReg() == X86::RIP)
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86CodeEmitter.cpp | 419 // But it's probably not beneficial. If the MCE supports using RIP directly 474 if (BaseReg == X86::RIP || 475 (Is64BitMode && DispForReloc)) { // [disp32+RIP] in X86-64 mode 485 // while others, unless explicit asked to use RIP, use absolute references. 489 // If no BaseReg, issue a RIP relative instruction only if the MCE can 493 if (BaseReg != 0 && BaseReg != X86::RIP) 503 // byte to emit an addr that is just 'disp32' (the non-RIP relative form). 506 BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
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H A D | X86GenRegisterInfo.inc | 130 RIP = 111,
298 const unsigned EIP_Overlaps[] = { X86::EIP, X86::IP, X86::RIP, 0 };
312 const unsigned IP_Overlaps[] = { X86::IP, X86::EIP, X86::RIP, 0 };
359 const unsigned RIP_Overlaps[] = { X86::RIP, X86::EIP, X86::IP, 0 };
514 const unsigned EIP_SuperRegsSet[] = { X86::RIP, 0 };
517 const unsigned IP_SuperRegsSet[] = { X86::EIP, X86::RIP, 0 };
676 { "RIP", RIP_Overlaps, RIP_SubRegsSet, Empty_SuperRegsSet },
740 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, X86::R14, X86::R15, X86::R12, X86::R13, X86::RBP, X86::RSP, X86::RIP,
860 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11, X86::RIP,
870 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBX, X86::RBP, X86::RSP, X86::RIP,
[all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
H A D | X86Disassembler.cpp | 363 baseReg = MCOperand::CreateReg(X86::RIP); // Section 2.2.1.6
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H A D | X86DisassemblerDecoder.h | 291 ENTRY(RIP)
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCTargetDesc.cpp | 148 ? X86::RIP // Should have dwarf #16. 193 unsigned InstPtr = is64Bit ? X86::RIP : X86::EIP;
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/external/libunwind/src/ptrace/ |
H A D | _UPT_reg_offset.c | 309 UNW_R_OFF(RIP, rip)
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/external/llvm/lib/Target/X86/AsmParser/ |
H A D | X86Operand.h | 409 case X86::RIP: return X86::EIP;
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/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.h | 401 ENTRY(RIP)
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