Searched refs:Shift (Results 1 - 25 of 142) sorted by relevance

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/external/llvm/include/llvm/Support/
H A DLEB128.h83 unsigned Shift = 0; local
85 Value += uint64_t(*p & 0x7f) << Shift;
86 Shift += 7;
97 unsigned Shift = 0; local
101 Value |= ((Byte & 0x7f) << Shift);
102 Shift += 7;
106 Value |= (-1ULL) << Shift;
H A DScaledNumber.h88 // Shift right and round.
89 int Shift = 64 - Width - countLeadingZeros(Digits); local
90 return getRounded<DigitsT>(Digits >> Shift, Scale + Shift,
91 Digits & (UINT64_C(1) << (Shift - 1)));
277 /// scales in place. Shift the digits as necessary to form equivalent numbers,
307 // Shift LDigits left as much as possible, then shift RDigits right.
624 ScaledNumber &operator<<=(int16_t Shift) { argument
625 shiftLeft(Shift);
628 ScaledNumber &operator>>=(int16_t Shift) { argument
701 adjustToWidth(uint64_t N, int32_t Shift) argument
731 operator <<(const ScaledNumber<DigitsT> &L, int16_t Shift) argument
737 operator >>(const ScaledNumber<DigitsT> &L, int16_t Shift) argument
834 shiftLeft(int32_t Shift) argument
861 Digits <<= Shift; local
864 shiftRight(int32_t Shift) argument
887 Digits >>= Shift; local
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H A DMathExtras.h54 T Shift = std::numeric_limits<T>::digits >> 1; local
55 T Mask = std::numeric_limits<T>::max() >> Shift;
56 while (Shift) {
58 Val >>= Shift; local
59 ZeroBits |= Shift;
61 Shift >>= 1;
62 Mask >>= Shift; local
126 for (T Shift = std::numeric_limits<T>::digits >> 1; Shift; Shift >>
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/external/llvm/lib/Support/
H A DScaledNumber.cpp47 // Shift as little as possible to maximize precision.
49 int Shift = 64 - LeadingZeros; local
51 Upper = Upper << LeadingZeros | Lower >> Shift;
52 return getRounded(Upper, Shift,
53 Shift && (Lower & UINT64_C(1) << (Shift - 1)));
65 int Shift = 0; local
67 Shift -= Zeros;
75 return getAdjusted<uint32_t>(Quotient, Shift);
78 return getRounded<uint32_t>(Quotient, Shift, Remainde
87 int Shift = 0; local
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/external/clang/include/clang/Basic/
H A DOperatorPrecedence.h39 Shift = 11, // <<, >> enumerator in enum:clang::prec::Level
/external/lzma/C/
H A DPpmd.h38 Byte Shift; /* Speed of Freq change; low Shift is for fast change */ member in struct:__anon14033
39 Byte Count; /* Count to next change of Shift */
42 #define Ppmd_See_Update(p) if ((p)->Shift < PPMD_PERIOD_BITS && --(p)->Count == 0) \
43 { (p)->Summ <<= 1; (p)->Count = (Byte)(3 << (p)->Shift++); }
/external/llvm/include/llvm/ADT/
H A DPointerEmbeddedInt.h42 Shift = sizeof(uintptr_t) * CHAR_BIT - Bits,
67 Value = static_cast<uintptr_t>(I) << Shift;
75 return static_cast<IntT>(static_cast<intptr_t>(Value) >> Shift);
76 return static_cast<IntT>(Value >> Shift);
97 enum { NumLowBitsAvailable = T::Shift };
/external/llvm/lib/Target/AMDGPU/Utils/
H A DAMDKernelCodeTInfo.h39 #define PRINTCOMP(GetMacro, Shift) \
42 (int)GetMacro(C.compute_pgm_resource_registers >> Shift); \
44 #define PARSECOMP(SetMacro, Shift) \
49 C.compute_pgm_resource_registers |= SetMacro(Value) << Shift; \
53 #define COMPPGM(name, GetMacro, SetMacro, Shift) \
54 RECORD(name, PRINTCOMP(GetMacro, Shift), PARSECOMP(SetMacro, Shift))
/external/swiftshader/third_party/LLVM/include/llvm/Support/
H A DMathExtras.h158 for (unsigned Shift = 32 >> 1; Shift; Shift >>= 1) {
159 uint32_t Tmp = Value >> Shift;
163 Count |= Shift;
195 for (unsigned Shift = 64 >> 1; Shift; Shift >>= 1) {
196 uint64_t Tmp = Value >> Shift;
200 Count |= Shift;
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/external/clang/lib/Basic/
H A DOperatorPrecedence.cpp38 return prec::Shift;
66 case tok::lessless: return prec::Shift;
/external/pdfium/xfa/fxfa/parser/
H A Dcscript_eventpseudomodel.h26 Shift, member in class:XFA_Event
54 void Shift(CFXJSE_Value* pValue, bool bSetting, XFA_ATTRIBUTE eAttribute);
H A Dcscript_eventpseudomodel.cpp108 case XFA_Event::Shift:
183 void CScript_EventPseudoModel::Shift(CFXJSE_Value* pValue, function in class:CScript_EventPseudoModel
186 Property(pValue, XFA_Event::Shift, bSetting);
/external/clang/lib/Format/
H A DWhitespaceManager.cpp169 int Shift = 0; local
173 Shift = 0;
181 Shift = Column - Changes[i].StartOfTokenColumn;
182 Changes[i].Spaces += Shift;
185 assert(Shift >= 0);
186 Changes[i].StartOfTokenColumn += Shift;
188 Changes[i + 1].PreviousEndOfTokenColumn += Shift;
424 int Shift = 0; local
426 Shift = Column - Changes[i].StartOfTokenColumn;
429 Shift
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/external/vulkan-validation-layers/libs/glm/gtx/
H A Dbit.hpp94 GLM_FUNC_DECL genType bitRotateRight(genType const & In, std::size_t Shift);
99 GLM_FUNC_DECL genType bitRotateLeft(genType const & In, std::size_t Shift);
/external/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp37 ConstantInt *Shift; local
40 Shift = Builder.getInt64(63);
43 Shift = Builder.getInt32(31);
58 Value *DividendSign = Builder.CreateAShr(Dividend, Shift);
59 Value *DivisorSign = Builder.CreateAShr(Divisor, Shift);
109 ConstantInt *Shift; local
112 Shift = Builder.getInt64(63);
115 Shift = Builder.getInt32(31);
131 Value *Tmp = Builder.CreateAShr(Dividend, Shift);
132 Value *Tmp1 = Builder.CreateAShr(Divisor, Shift);
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/external/vixl/src/aarch32/
H A Dinstructions-aarch32.cc45 bool Shift::IsValidAmount(uint32_t amount) const {
420 const char* Shift::GetName() const {
584 : Shift(shift_value) {
723 uint32_t TypeEncodingValue(Shift shift) {
728 uint32_t AmountEncodingValue(Shift shift, uint32_t amount) {
H A Doperands-aarch32.h85 Operand(Register rm, Shift shift)
95 Operand(Register rm, Shift shift, uint32_t amount)
123 Operand(Register rm, Shift shift, Register rs)
185 Shift GetShift() const {
229 Shift shift_;
728 Shift shift,
745 MemOperand(Register rn, Register rm, Shift shift, AddrMode addrmode = Offset)
766 Shift shift,
787 Shift shift,
811 Shift GetShif
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp919 SDNode *VecOp0, *SelMask, *ZeroFill, *Shift = 0; local
939 Shift =
946 Shift =
948 SDValue((Shift != 0 ? Shift : VecOp0), 0),
960 Shift =
963 Shift =
965 SDValue(Shift, 0), SDValue(Bits, 0));
969 OpVT, SDValue(Shift, 0), getRC(MVT::i64));
987 SDNode *VecOp0, *Shift local
1081 SDNode *Shift = 0; local
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/external/llvm/lib/Target/AArch64/
H A DAArch64ExpandPseudoInsts.cpp446 for (unsigned Shift = 0; Shift < BitSize; Shift += 16) {
447 const unsigned Chunk = (Imm >> Shift) & Mask;
543 unsigned Shift = 0; // LSL amount for high bits with MOVZ/MOVN
548 Shift = ((63 - LZ) / 16) * 16;
551 unsigned Imm16 = (Imm >> Shift) & Mask;
556 getDeadRegState(DstIsDead && Shift == LastShift))
558 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, Shift));
565 if (Shift
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/external/llvm/lib/Transforms/InstCombine/
H A DInstCombinePHI.cpp634 unsigned Shift; // The amount shifted. member in struct:__anon13308::PHIUsageRecord
638 : PHIId(pn), Shift(Sh), Inst(User) {}
643 if (Shift < RHS.Shift) return true;
644 if (Shift > RHS.Shift) return false;
652 unsigned Shift; // The amount shifted. member in struct:__anon13308::LoweredPHIRecord
656 : PN(pn), Shift(Sh), Width(Ty->getPrimitiveSizeInBits()) {}
660 : PN(pn), Shift(Sh), Width(0) {}
674 return DenseMapInfo<PHINode*>::getHashValue(Val.PN) ^ (Val.Shift>>
750 unsigned Shift = cast<ConstantInt>(UserI->getOperand(1))->getZExtValue(); local
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/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
H A DInstCombinePHI.cpp558 unsigned Shift; // The amount shifted. member in struct:__anon18910::PHIUsageRecord
562 : PHIId(pn), Shift(Sh), Inst(User) {}
567 if (Shift < RHS.Shift) return true;
568 if (Shift > RHS.Shift) return false;
576 unsigned Shift; // The amount shifted. member in struct:__anon18910::LoweredPHIRecord
580 : PN(pn), Shift(Sh), Width(Ty->getPrimitiveSizeInBits()) {}
584 : PN(pn), Shift(Sh), Width(0) {}
598 return DenseMapInfo<PHINode*>::getHashValue(Val.PN) ^ (Val.Shift>>
678 unsigned Shift = cast<ConstantInt>(User->getOperand(1))->getZExtValue(); local
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/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h757 for (int Shift = 0; Shift <= RegWidth - 16; Shift += 16)
758 if ((Value & ~(0xffffULL << Shift)) == 0)
764 inline static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth) { argument
769 if (Value == 0 && Shift != 0)
772 return (Value & ~(0xffffULL << Shift)) == 0;
775 inline static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth) { argument
784 return isMOVZMovAlias(Value, Shift, RegWidth);
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp85 /// isRotateAndMask - Returns true if Mask and Shift can be folded into a
339 unsigned Shift = 32; local
343 !isInt32Immediate(N->getOperand(1).getNode(), Shift) || (Shift > 31))
348 if (isShiftMask) Mask = Mask << Shift;
350 Indeterminant = ~(0xFFFFFFFFu << Shift);
353 if (isShiftMask) Mask = Mask >> Shift;
355 Indeterminant = ~(0xFFFFFFFFu >> Shift);
357 Shift = 32 - Shift;
751 unsigned Shift = 0; local
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/external/llvm/test/MC/ARM/
H A Darm-aliases.s4 @ Shift-by-zero should canonicalize to no shift at all (lsl #0 encoding)
/external/llvm/lib/Analysis/
H A DBlockFrequencyInfoImpl.cpp185 static uint64_t shiftRightAndRound(uint64_t N, int Shift) {
186 assert(Shift >= 0);
187 assert(Shift < 64);
188 if (!Shift)
190 return (N >> Shift) + (UINT64_C(1) & N >> (Shift - 1));
213 int Shift = 0; local
215 Shift = 33;
217 Shift = 33 - countLeadingZeros(Total);
220 if (!Shift) {
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