Searched refs:TGSI_OPCODE_DDX (Results 1 - 16 of 16) sorted by relevance
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_util.c | 206 case TGSI_OPCODE_DDX:
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| H A D | tgsi_info.c | 77 { 1, 1, 0, 0, 0, 0, COMP, "DDX", TGSI_OPCODE_DDX },
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| H A D | tgsi_exec.c | 3588 case TGSI_OPCODE_DDX:
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| /external/mesa3d/src/gallium/include/pipe/ |
| H A D | p_shader_tokens.h | 294 #define TGSI_OPCODE_DDX 37 macro
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| /external/mesa3d/src/gallium/drivers/r300/ |
| H A D | r300_tgsi_to_rc.c | 70 case TGSI_OPCODE_DDX: return RC_OPCODE_DDX;
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| /external/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_llvm.c | 235 bld_base->op_actions[TGSI_OPCODE_DDX].emit = llvm_emit_tex;
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| H A D | r600_shader.c | 5280 {TGSI_OPCODE_DDX, 0, SQ_TEX_INST_GET_GRADIENTS_H, tgsi_tex},
5454 {TGSI_OPCODE_DDX, 0, SQ_TEX_INST_GET_GRADIENTS_H, tgsi_tex},
5628 {TGSI_OPCODE_DDX, 0, SQ_TEX_INST_GET_GRADIENTS_H, tgsi_tex},
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | radeon_setup_tgsi_llvm.c | 1076 bld_base->op_actions[TGSI_OPCODE_DDX].intr_name = "llvm.AMDGPU.ddx";
1077 bld_base->op_actions[TGSI_OPCODE_DDX].fetch_args = tex_fetch_args;
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_tgsi_aos.c | 662 case TGSI_OPCODE_DDX:
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| H A D | lp_bld_tgsi_soa.c | 2111 bld.bld_base.op_actions[TGSI_OPCODE_DDX].emit = ddx_emit;
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| /external/mesa3d/src/mesa/state_tracker/ |
| H A D | st_mesa_to_tgsi.c | 553 return TGSI_OPCODE_DDX;
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| H A D | st_glsl_to_tgsi.cpp | 1457 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
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| /external/mesa3d/src/gallium/drivers/i915/ |
| H A D | i915_fpc_translate.c | 584 case TGSI_OPCODE_DDX:
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| /external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_tgsi_insn.c | 1862 case TGSI_OPCODE_DDX:
2542 case TGSI_OPCODE_DDX:
3143 emit->info.opcode_count[TGSI_OPCODE_DDX] >= 1 ||
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| /external/mesa3d/src/gallium/drivers/nv30/ |
| H A D | nvfx_fragprog.c | 558 case TGSI_OPCODE_DDX:
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_from_tgsi.cpp | 1800 case TGSI_OPCODE_DDX:
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