Searched refs:TGSI_OPCODE_SSG (Results 1 - 16 of 16) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_util.c212 case TGSI_OPCODE_SSG:
H A Dtgsi_info.c105 { 1, 1, 0, 0, 0, 0, COMP, "SSG", TGSI_OPCODE_SSG },
H A Dtgsi_exec.c3805 case TGSI_OPCODE_SSG:
/external/mesa3d/src/gallium/include/pipe/
H A Dp_shader_tokens.h322 #define TGSI_OPCODE_SSG 65 /* SGN */ macro
/external/mesa3d/src/gallium/drivers/r300/
H A Dr300_tgsi_to_rc.c98 case TGSI_OPCODE_SSG: return RC_OPCODE_SSG;
/external/mesa3d/src/gallium/drivers/radeon/
H A Dradeon_setup_tgsi_llvm.c1070 bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
1154 bld_base->op_actions[TGSI_OPCODE_SSG].emit = build_tgsi_intrinsic_nomem;
1155 bld_base->op_actions[TGSI_OPCODE_SSG].intr_name = "llvm.AMDGPU.ssg";
/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_tgsi_aos.c801 case TGSI_OPCODE_SSG:
H A Dlp_bld_tgsi_action.c1383 /* TGSI_OPCODE_SSG (CPU Only) */
1608 bld_base->op_actions[TGSI_OPCODE_SSG].emit = ssg_emit_cpu;
/external/mesa3d/src/mesa/state_tracker/
H A Dst_mesa_to_tgsi.c645 return TGSI_OPCODE_SSG;
H A Dst_glsl_to_tgsi.cpp1427 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
/external/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc_translate.c1022 case TGSI_OPCODE_SSG:
/external/mesa3d/src/gallium/drivers/nv30/
H A Dnvfx_fragprog.c748 case TGSI_OPCODE_SSG:
H A Dnvfx_vertprog.c677 case TGSI_OPCODE_SSG:
/external/mesa3d/src/gallium/drivers/svga/
H A Dsvga_tgsi_insn.c2693 case TGSI_OPCODE_SSG:
3114 emit->info.opcode_count[TGSI_OPCODE_SSG] >= 1 ||
/external/mesa3d/src/gallium/drivers/r600/
H A Dr600_shader.c5308 {TGSI_OPCODE_SSG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg},
5482 {TGSI_OPCODE_SSG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg},
5656 {TGSI_OPCODE_SSG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg},
/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_from_tgsi.cpp1948 case TGSI_OPCODE_SSG:

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