| /external/mesa3d/src/gallium/auxiliary/util/ |
| H A D | u_simple_shaders.c | 210 ureg_writemask(depth, TGSI_WRITEMASK_Z),
261 ureg_writemask(depth, TGSI_WRITEMASK_Z),
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| /external/mesa3d/src/gallium/drivers/i915/ |
| H A D | i915_fpc_optimize.c | 81 if ( write_mask & TGSI_WRITEMASK_Z && r->Register.SwizzleZ != TGSI_SWIZZLE_Z)
137 if ( write_mask & TGSI_WRITEMASK_Z )
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| H A D | i915_fpc_translate.c | 338 if (writeMask & TGSI_WRITEMASK_Z)
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| /external/mesa3d/src/gallium/include/pipe/ |
| H A D | p_shader_tokens.h | 89 #define TGSI_WRITEMASK_Z 0x04 macro
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| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| H A D | lp_setup_point.c | 191 if (usage_mask & TGSI_WRITEMASK_Z) {
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| H A D | lp_setup_line.c | 150 if (usage_mask & TGSI_WRITEMASK_Z) {
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| H A D | lp_state_fs.c | 1385 usage_mask & TGSI_WRITEMASK_Z ? "z" : "",
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| /external/mesa3d/src/gallium/auxiliary/vl/ |
| H A D | vl_idct.c | 420 ureg_MUL(shader, ureg_writemask(tex, TGSI_WRITEMASK_Z),
428 ureg_MOV(shader, ureg_writemask(o_r_addr[0], TGSI_WRITEMASK_Z), ureg_src(tex));
429 ureg_MOV(shader, ureg_writemask(o_r_addr[1], TGSI_WRITEMASK_Z), ureg_src(tex));
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| H A D | vl_mc.c | 270 ureg_MUL(shader, ureg_writemask(o_flags, TGSI_WRITEMASK_Z),
281 ureg_MUL(shader, ureg_writemask(t_vtex, TGSI_WRITEMASK_Z),
284 ureg_FRC(shader, ureg_writemask(t_vtex, TGSI_WRITEMASK_Z), ureg_src(t_vtex));
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| H A D | vl_compositor.c | 109 ureg_MAD(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
117 ureg_MAD(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
213 ureg_MUL(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_Z),
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| H A D | vl_zscan.c | 156 ureg_MOV(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_Z), vpos);
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| /external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_tgsi_insn.c | 2137 if (dst.mask & TGSI_WRITEMASK_Z) {
2139 writemask( dst, TGSI_WRITEMASK_Z ),
2192 if (dst.mask & TGSI_WRITEMASK_Z) {
2299 if (dst.mask & TGSI_WRITEMASK_Z)
2325 writemask( log2_abs, TGSI_WRITEMASK_Z ),
2371 if (!(dst.mask & TGSI_WRITEMASK_Z))
2785 writemask( emit->ps_temp_pos, TGSI_WRITEMASK_Z ),
2899 writemask(depth, TGSI_WRITEMASK_Z),
2918 writemask(temp_pos, TGSI_WRITEMASK_Z),
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| /external/mesa3d/src/gallium/auxiliary/draw/ |
| H A D | draw_pipe_aapoint.c | 334 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
350 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
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| /external/mesa3d/src/gallium/state_trackers/xa/ |
| H A D | xa_tgsi.c | 161 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
212 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
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| /external/mesa3d/src/gallium/state_trackers/xorg/ |
| H A D | xorg_exa_tgsi.c | 140 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
201 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_exec.c | 588 writemask == TGSI_WRITEMASK_Z ||
2771 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
2812 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
2861 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
2909 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
2929 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
2942 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
2968 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
2992 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
3010 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
[all...] |
| H A D | tgsi_dump.c | 199 if (writemask & TGSI_WRITEMASK_Z)
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| H A D | tgsi_text.c | 356 *writemask |= TGSI_WRITEMASK_Z;
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| /external/mesa3d/src/gallium/state_trackers/vega/ |
| H A D | asm_fill.h | 57 ureg_writemask(temp[0], TGSI_WRITEMASK_Z), \
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| H A D | renderer.c | 214 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Z), src[0]);
273 ureg_MOV(ureg, ureg_writemask(out, TGSI_WRITEMASK_Z), imm);
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| /external/mesa3d/src/mesa/state_tracker/ |
| H A D | st_mesa_to_tgsi.c | 1090 TGSI_WRITEMASK_Z );
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| H A D | st_glsl_to_tgsi.cpp | 4594 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
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| /external/mesa3d/src/gallium/drivers/nv30/ |
| H A D | nvfx_fragprog.c | 434 if (tgsi & TGSI_WRITEMASK_Z) mask |= NVFX_FP_MASK_Z;
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| H A D | nvfx_vertprog.c | 452 if (tgsi & TGSI_WRITEMASK_Z) mask |= NVFX_VP_MASK_Z;
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| /external/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_shader.c | 2164 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
|