Searched refs:UMUL (Results 1 - 17 of 17) sorted by relevance
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_opcode_tmp.h | 160 OP12(UMUL)
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUISelLowering.h | 110 UMUL, // 32bit unsigned multiplication enumerator in enum:llvm::AMDGPUISD::__anon14641
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| H A D | AMDGPUISelLowering.cpp | 337 NODE_NAME_CASE(UMUL);
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| H A D | AMDILISelLowering.cpp | 728 r20 = DAG.getNode(AMDGPUISD::UMUL, DL, OVT, r20, r1);
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| /external/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.h | 223 UMUL, // 32bit unsigned multiplication
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| H A D | AMDGPUISelLowering.cpp | 2799 NODE_NAME_CASE(UMUL);
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| /external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
| H A D | sm4_to_tgsi.cpp | 496 OP2_(IMUL, UMUL);
510 OP2(UMUL);
557 OP2_(UMUL, MUL);
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 240 UMUL, // LOW, HI, FLAGS = umul LHS, RHS enumerator in enum:llvm::X86ISD::NodeType
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| H A D | X86ISelDAGToDAG.cpp | 1834 case X86ISD::UMUL: {
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| H A D | X86ISelLowering.cpp | 8602 Opc == X86ISD::UMUL ||
8610 if (Op.getResNo() == 2 && Opc == X86ISD::UMUL)
8793 Cond.getOpcode() == X86ISD::UMUL)
10094 SDValue Sum = DAG.getNode(X86ISD::UMUL, DL, VTs, LHS, RHS);
10702 case X86ISD::UMUL: return "X86ISD::UMUL";
12319 case X86ISD::UMUL:
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| /external/pcre/dist2/src/sljit/ |
| H A D | sljitNativeSPARC_common.c | 178 #define UMUL (OPC1(0x2) | OPC3(0x0a)) macro
779 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? UMUL : SMUL) | D(SLJIT_R0) | S1(SLJIT_R0) | S2(SLJIT_R1), DR(SLJIT_R0)));
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 349 UMUL,
351 // 8-bit SMUL/UMUL - AX, FLAGS = smul8/umul8 AL, RHS.
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| H A D | X86FastISel.cpp | 2742 BaseOpc = X86ISD::UMUL; CondOpc = X86::SETOr; break;
2782 if (BaseOpc == X86ISD::UMUL && !ResultReg) {
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| H A D | X86ISelDAGToDAG.cpp | 2133 case X86ISD::UMUL: {
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| H A D | X86ISelLowering.cpp | 15687 Opc == X86ISD::UMUL ||
15695 if (Op.getResNo() == 2 && Opc == X86ISD::UMUL)
15917 case ISD::UMULO: X86Opcode = X86ISD::UMUL; X86Cond = X86::COND_O; break;
16563 Cond.getOpcode() == X86ISD::UMUL)
16627 case ISD::UMULO: X86Opcode = X86ISD::UMUL; X86Cond = X86::COND_O; break;
20528 SDValue Sum = DAG.getNode(X86ISD::UMUL, DL, VTs, LHS, RHS);
22207 case X86ISD::UMUL: return "X86ISD::UMUL";
24622 case X86ISD::UMUL:
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_from_tgsi.cpp | 539 NV50_IR_OPCODE_CASE(UMUL, MUL);
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| /external/mesa3d/src/mesa/state_tracker/ |
| H A D | st_glsl_to_tgsi.cpp | 658 case2fi(MUL, UMUL);
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