| /external/deqp/framework/common/ |
| H A D | tcuVectorType.hpp | 38 typedef Vector<float, 1> Vec1; typedef in namespace:tcu
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| /external/spirv-llvm/lib/SPIRV/libSPIRV/ |
| H A D | SPIRVModule.cpp | 290 virtual SPIRVValue *addVectorShuffleInst(SPIRVType *Type, SPIRVValue *Vec1,
1037 SPIRVModuleImpl::addVectorShuffleInst(SPIRVType * Type, SPIRVValue *Vec1, argument
1040 return addInstruction(new SPIRVVectorShuffle(getId(), Type, Vec1, Vec2,
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| H A D | SPIRVModule.h | 301 virtual SPIRVValue *addVectorShuffleInst(SPIRVType *Type, SPIRVValue *Vec1,
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| /external/llvm/test/Bindings/OCaml/ |
| H A D | core.ml | 1063 * CHECK: %build_extractelement = extractelement <4 x i32> %Vec1, i32 %P2
1064 * CHECK: %build_insertelement = insertelement <4 x i32> %Vec1, i32 %P1, i32 %P2
1065 * CHECK: %build_shufflevector = shufflevector <4 x i32> %Vec1, <4 x i32> %Vec2, <4 x i32> <i32 1, i32 1, i32 0, i32 0>
1092 let vec1 = build_insertelement t1 p1 p2 "Vec1" atentry in
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| /external/swiftshader/third_party/LLVM/test/Bindings/Ocaml/ |
| H A D | vmcore.ml | 1171 * RUN: grep {%build_extractelement = extractelement <4 x i32> %Vec1, i32 %P2} < %t.ll
1172 * RUN: grep {%build_insertelement = insertelement <4 x i32> %Vec1, i32 %P1, i32 %P2} < %t.ll
1173 * RUN: grep {%build_shufflevector = shufflevector <4 x i32> %Vec1, <4 x i32> %Vec2, <4 x i32> <i32 1, i32 1, i32 0, i32 0>} < %t.ll
1200 let vec1 = build_insertelement t1 p1 p2 "Vec1" atentry in
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| /external/swiftshader/third_party/LLVM/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 2342 Value *Vec1, *Vec2, *Mask; local
2343 if (getValueTypePair(Record, OpNum, NextValueNo, Vec1) ||
2344 getValue(Record, OpNum, Vec1->getType(), Vec2))
2349 I = new ShuffleVectorInst(Vec1, Vec2, Mask);
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| /external/clang/lib/AST/ |
| H A D | ASTImporter.cpp | 606 const DependentSizedExtVectorType *Vec1 local
611 Vec1->getSizeExpr(), Vec2->getSizeExpr()))
614 Vec1->getElementType(),
622 const VectorType *Vec1 = cast<VectorType>(T1); local
625 Vec1->getElementType(),
628 if (Vec1->getNumElements() != Vec2->getNumElements())
630 if (Vec1->getVectorKind() != Vec2->getVectorKind())
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| /external/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 4782 Value *Vec1, *Vec2, *Mask; local
4783 if (getValueTypePair(Record, OpNum, NextValueNo, Vec1) ||
4784 popValue(Record, OpNum, NextValueNo, Vec1->getType(), Vec2))
4789 if (!Vec1->getType()->isVectorTy() || !Vec2->getType()->isVectorTy())
4791 I = new ShuffleVectorInst(Vec1, Vec2, Mask);
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| /external/clang/lib/Sema/ |
| H A D | SemaOverload.cpp | 7766 Vec1 = CandidateTypes[0].vector_begin(),
7768 Vec1 != Vec1End; ++Vec1) {
7773 QualType LandR[2] = { *Vec1, *Vec2 };
7776 if ((*Vec1)->isExtVectorType() || !(*Vec2)->isExtVectorType())
7777 Result = *Vec1;
8014 Vec1 = CandidateTypes[0].vector_begin(),
8016 Vec1 != Vec1End; ++Vec1) {
8024 ParamTypes[0] = S.Context.getLValueReferenceType(*Vec1);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1799 SDValue Vec1 = IntermedVals[0].first;
1813 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec);
1914 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1);
1922 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec);
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 2552 SDValue Vec1 = Op.getOperand(1); local
2556 SDValue B1 = DAG.getNode(ISD::BITCAST, dl, OpTy, Vec1);
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2171 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1);
2179 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec.data());
|