Searched refs:asr (Results 1 - 25 of 115) sorted by relevance

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/external/compiler-rt/lib/builtins/arm/
H A Ddivmodsi4.S59 eor ip, r0, r0, asr #31
60 eor lr, r1, r1, asr #31
61 sub r0, ip, r0, asr #31
62 sub r1, lr, r1, asr #31
67 eor r0, r0, r4, asr #31
68 eor r1, r1, r5, asr #31
69 sub r0, r0, r4, asr #31
70 sub r1, r1, r5, asr #31
H A Ddivsi3.S54 eor r2, r0, r0, asr #31
55 eor r3, r1, r1, asr #31
56 sub r0, r2, r0, asr #31
57 sub r1, r3, r1, asr #31
61 eor r0, r0, r4, asr #31
62 sub r0, r0, r4, asr #31
H A Dmodsi3.S52 eor r2, r0, r0, asr #31
53 eor r3, r1, r1, asr #31
54 sub r0, r2, r0, asr #31
55 sub r1, r3, r1, asr #31
59 eor r0, r0, r4, asr #31
60 sub r0, r0, r4, asr #31
H A Dcomparesf2.S80 mvnlo r0, r1, asr #31
87 movhi r0, r1, asr #31
122 mvnlo r0, r1, asr #31
124 movhi r0, r1, asr #31
/external/valgrind/none/tests/arm/
H A Dv6intThumb.stdout.exp2153 adds.w r1, r2, r3, asr #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000
2154 adds.w r1, r2, r3, asr #1 :: rd 0x44cd64bb rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000
2155 adds.w r1, r2, r3, asr #15 :: rd 0x3141a757 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000
2156 adds.w r1, r2, r3, asr #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000
2165 add.w r1, r2, r3, asr #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ
2166 add.w r1, r2, r3, asr #1 :: rd 0x44cd64bb rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ
2167 add.w r1, r2, r3, asr #15 :: rd 0x3141a757 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ
2168 add.w r1, r2, r3, asr #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ
2177 adds.w r1, r2, r3, asr #0 :: rd 0xc859704f rm 0x31415927, rn 0x97181728, c:v-in 0, cpsr 0x80000000 N
2178 adds.w r1, r2, r3, asr #
[all...]
/external/llvm/test/MC/ARM/
H A Darm-shift-encoding.s8 ldr r0, [r0, r0, asr #32]
9 ldr r0, [r0, r0, asr #16]
18 @ CHECK: ldr r0, [r0, r0, asr #32] @ encoding: [0x40,0x00,0x90,0xe7]
19 @ CHECK: ldr r0, [r0, r0, asr #16] @ encoding: [0x40,0x08,0x90,0xe7]
28 pld [r0, r0, asr #32]
29 pld [r0, r0, asr #16]
38 @ CHECK: [r0, r0, asr #32] @ encoding: [0x40,0xf0,0xd0,0xf7]
39 @ CHECK: [r0, r0, asr #16] @ encoding: [0x40,0xf8,0xd0,0xf7]
48 str r0, [r0, r0, asr #32]
49 str r0, [r0, r0, asr #1
[all...]
H A Dthumb-shift-encoding.s12 sbc.w r5, r4, r11, asr #32
13 sbc.w r6, r3, r12, asr #16
22 @ CHECK: sbc.w r5, r4, r11, asr #32 @ encoding: [0x64,0xeb,0x2b,0x05]
23 @ CHECK: sbc.w r6, r3, r12, asr #16 @ encoding: [0x63,0xeb,0x2c,0x46]
32 and.w r5, r4, r11, asr #32
33 and.w r6, r3, r12, asr #16
42 @ CHECK: and.w r5, r4, r11, asr #32 @ encoding: [0x04,0xea,0x2b,0x05]
43 @ CHECK: and.w r6, r3, r12, asr #16 @ encoding: [0x03,0xea,0x2c,0x46]
H A Dbasic-thumb2-instructions-v8.s28 sbc.w r6, r3, sp, asr #16
29 and.w r6, r3, sp, asr #16
31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46]
32 @ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
H A Dbasic-arm-instructions.s75 adc r4, r5, r6, asr #1
76 adc r4, r5, r6, asr #31
77 adc r4, r5, r6, asr #32
84 adc r6, r7, r8, asr r9
95 adc r4, r5, asr #1
96 adc r4, r5, asr #31
97 adc r4, r5, asr #32
103 adc r6, r7, asr r9
114 @ CHECK: adc r4, r5, r6, asr #1 @ encoding: [0xc6,0x40,0xa5,0xe0]
115 @ CHECK: adc r4, r5, r6, asr #3
[all...]
/external/llvm/test/MC/AArch64/
H A Darm64-logical-encoding.s56 and w1, w2, w3, asr #2
57 and x1, x2, x3, asr #2
67 ; CHECK: and w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x0a]
68 ; CHECK: and x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0x8a]
78 ands w1, w2, w3, asr #2
79 ands x1, x2, x3, asr #2
89 ; CHECK: ands w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x6a]
90 ; CHECK: ands x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0xea]
100 bic w1, w2, w3, asr #3
101 bic x1, x2, x3, asr #
[all...]
H A Dbasic-a64-diagnostics.s40 // CHECK-ERROR: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 63]
58 // CHECK-ERROR: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 63]
185 add x4, sp, x9, asr #5
191 // CHECK-ERROR-NEXT: add x4, sp, x9, asr #5
201 add w1, w2, w3, asr #-1
202 add w1, w2, w3, asr #32
207 add x1, x2, x3, asr #-1
208 add x1, x2, x3, asr #64
222 // CHECK-ERROR-NEXT: add w1, w2, w3, asr #-1
225 // CHECK-ERROR-NEXT: add w1, w2, w3, asr #3
[all...]
H A Darm64-aliases.s46 tst x2, x20, asr #0
55 ; CHECK: tst x2, x20, asr #0 ; encoding: [0x5f,0x00,0x94,0xea]
64 cmn w8, w9, asr #3
73 ; CHECK: cmn w8, w9, asr #3 ; encoding: [0x1f,0x0d,0x89,0x2b]
86 cmp w8, w9, asr #3
99 ; CHECK: cmp w8, w9, asr #3 ; encoding: [0x1f,0x0d,0x89,0x6b]
119 neg x0, x1, asr #1
120 ; CHECK: neg x0, x1, asr #1
127 negs x0, x1, asr #1
128 ; CHECK: negs x0, x1, asr #
[all...]
H A Dbasic-a64-instructions.s388 add w2, w3, w4, asr #0
389 add w5, w6, w7, asr #21
390 add w8, w9, w10, asr #31
391 add w8, w9, w10, asr #(31-2)
392 // CHECK: add w2, w3, w4, asr #0 // encoding: [0x62,0x00,0x84,0x0b]
393 // CHECK: add w5, w6, w7, asr #21 // encoding: [0xc5,0x54,0x87,0x0b]
394 // CHECK: add w8, w9, w10, asr #31 // encoding: [0x28,0x7d,0x8a,0x0b]
395 // CHECK: add w8, w9, w10, asr #29 // encoding: [0x28,0x75,0x8a,0x0b]
424 add x2, x3, x4, asr #0
425 add x5, x6, x7, asr #2
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A DARMSelectionDAGInfo.h28 case ISD::SRA: return ARM_AM::asr;
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-arm-instructions.s55 adc r4, r5, r6, asr #1
56 adc r4, r5, r6, asr #31
57 adc r4, r5, r6, asr #32
64 adc r6, r7, r8, asr r9
75 adc r4, r5, asr #1
76 adc r4, r5, asr #31
77 adc r4, r5, asr #32
83 adc r6, r7, asr r9
94 @ CHECK: adc r4, r5, r6, asr #1 @ encoding: [0xc6,0x40,0xa5,0xe0]
95 @ CHECK: adc r4, r5, r6, asr #3
[all...]
H A Ddiagnostics.s18 adc r4, r5, r6, asr #-1
19 adc r4, r5, r6, asr #33
39 @ CHECK-ERRORS: adc r4, r5, r6, asr #-1
42 @ CHECK-ERRORS: adc r4, r5, r6, asr #33
124 pkhtb r2, r2, r3, asr #0
125 pkhtb r2, r2, r3, asr #33
126 pkhbt r2, r2, r3, asr #3
136 @ CHECK-ERRORS: pkhtb r2, r2, r3, asr #0
139 @ CHECK-ERRORS: pkhtb r2, r2, r3, asr #33
142 @ CHECK-ERRORS: pkhbt r2, r2, r3, asr #
[all...]
/external/libhevc/common/arm/
H A Dihevc_deblk_luma_vert.s69 asr r3,r3,#1
80 asr r2,r2,#1
196 asr r10,r5,#2
224 cmp r8,r5,asr #3
237 cmp r7,r10,asr #1
245 asr r10,r5,#2
277 cmp r8,r5,asr #3
288 cmp r7,r10,asr #1
326 add r8,r11,r11,asr #1
328 asr r
[all...]
H A Dihevc_deblk_luma_horz.s66 asr r3,r3,#1
76 asr r2,r2,#1
191 asr r10,r5,#2
220 cmp r8,r5,asr #3
232 cmp r7,r10,asr #1
241 asr r10,r5,#2
274 cmp r8,r5,asr #3
288 cmp r7,r10,asr #1
326 add r8,r11,r11,asr #1
328 asr r
[all...]
H A Dihevc_deblk_chroma_horz.s73 adds r1,r10,r2,asr #1
84 adds r2,r7,r2,asr #1
/external/libhevc/common/arm64/
H A Dihevc_deblk_luma_vert.s66 asr x3,x3,#1
79 asr x2,x2,#1
204 asr x10,x5,#2
233 cmp x8,x5,asr #3
246 cmp x7,x10,asr #1
254 asr x10,x5,#2
287 cmp x8,x5,asr #3
298 cmp x7,x10,asr #1
338 add x8,x11,x11,asr #1
340 asr x
[all...]
H A Dihevc_deblk_luma_horz.s66 asr x3,x3,#1
78 asr x2,x2,#1
204 asr x10,x5,#2
235 cmp x8,x5,asr #3
247 cmp x7,x10,asr #1
256 asr x10,x5,#2
292 cmp x8,x5,asr #3
306 cmp x7,x10,asr #1
346 add x8,x11,x11,asr #1
348 asr x
[all...]
/external/libvpx/libvpx/build/make/
H A Dthumb.pm34 # "ldrb r4, [r9, lr, asr #1]" into "add r9, r9, lr, asr #1",
35 # "ldrb r9, [r9]", "sub r9, r9, lr, asr #1".
36 s/^(\s*)(ldrb)(\s+)(r\d+),\s*\[(\w+),\s*(\w+),\s*(asr #\d+)\]/$1add $3$5, $5, $6, $7\n$1$2$3$4, [$5]\n$1sub $3$5, $5, $6, $7/g;
/external/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h29 case ISD::SRA: return ARM_AM::asr;
/external/webrtc/webrtc/common_audio/signal_processing/
H A Dfilter_ar_fast_q12_armv7.S89 ssat r7, #16, r6, asr #12
92 ssat r6, #16, r6, asr #12
100 ssat r7, #16, r6, asr #12
103 ssat r6, #16, r6, asr #12
143 ssat r7, #16, r6, asr #12
146 ssat r6, #16, r6, asr #12
/external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/
H A Dpitch_filter_armv6.S91 asr r2, #1
93 ssat r7, #16, r4, asr #13
99 asr r7, #12 @ Get the value for inputState[0].
118 asr r2, #1
120 ssat r10, #16, r10, asr #14

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