/external/libvpx/libvpx/vpx_dsp/x86/ |
H A D | highbd_quantize_intrin_sse2.c | 47 __m128i coeffs, cmp1, cmp2; local 50 cmp1 = _mm_cmplt_epi32(coeffs, zbins[i != 0]); 52 cmp1 = _mm_and_si128(cmp1, cmp2); 53 test = _mm_movemask_epi8(cmp1); 122 __m128i coeffs, cmp1, cmp2; local 125 cmp1 = _mm_cmplt_epi32(coeffs, zbins[i != 0]); 127 cmp1 = _mm_and_si128(cmp1, cmp2); 128 test = _mm_movemask_epi8(cmp1); [all...] |
H A D | fwd_txfm_sse2.h | 42 __m128i cmp1 = _mm_or_si128(_mm_cmpeq_epi16(*preg1, max_overflow), local 44 cmp0 = _mm_or_si128(cmp0, cmp1); 56 __m128i cmp1 = _mm_or_si128(_mm_cmpeq_epi16(*preg1, max_overflow), local 62 cmp0 = _mm_or_si128(_mm_or_si128(cmp0, cmp1), _mm_or_si128(cmp2, cmp3));
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H A D | fwd_txfm_impl_sse2.h | 80 __m128i cmp0, cmp1; local 97 cmp1 = _mm_xor_si128(_mm_cmpgt_epi16(in1, _mm_set1_epi16(0x3ff)), 99 test = _mm_movemask_epi8(_mm_or_si128(cmp0, cmp1));
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/external/libvpx/libvpx/vp9/encoder/x86/ |
H A D | vp9_highbd_block_error_intrin_sse2.c | 21 __m128i max, min, cmp0, cmp1, cmp2, cmp3; local 37 cmp1 = _mm_xor_si128(_mm_cmpgt_epi32(mm_coeff2, max), 44 _mm_or_si128(_mm_or_si128(cmp0, cmp1), _mm_or_si128(cmp2, cmp3)));
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/external/libavc/common/x86/ |
H A D | ih264_resi_trans_quant_sse42.c | 114 __m128i sum0, sum1, sum2, cmp0, cmp1; local 290 cmp1 = _mm_cmpeq_epi16(temp2, zero_8x16b); 293 mask1 = _mm_movemask_epi8(cmp1); 314 cmp1 = _mm_and_si128(temp_1, cmp1); 315 sum0 = _mm_hadd_epi16(cmp1, zero_8x16b); 388 __m128i cmp0, cmp1, sum0, sum1, sum2; local 575 cmp1 = _mm_cmpeq_epi16(temp2, zero_8x16b); 578 mask1 = _mm_movemask_epi8(cmp1); 599 cmp1 673 __m128i cmp0, cmp1, sum0, sum1, sum2; local 901 __m128i cmp, cmp0, cmp1; local [all...] |
/external/v8/src/mips/ |
H A D | macro-assembler-mips.h | 897 FPURegister cmp1, FPURegister cmp2, 899 BranchFCommon(S, target, nan, cc, cmp1, cmp2, bd); 903 FPURegister cmp1, FPURegister cmp2, 905 BranchFCommon(D, target, nan, cc, cmp1, cmp2, bd); 910 Condition cc, FPURegister cmp1, FPURegister cmp2) { 911 BranchF64(target, nan, cc, cmp1, cmp2, bd); 915 Condition cc, FPURegister cmp1, FPURegister cmp2) { 916 BranchF32(target, nan, cc, cmp1, cmp2, bd); 920 inline void BranchF(Label* target, Label* nan, Condition cc, FPURegister cmp1, argument 922 BranchF64(target, nan, cc, cmp1, cmp 896 BranchF32(Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2, BranchDelaySlot bd = PROTECT) argument 902 BranchF64(Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2, BranchDelaySlot bd = PROTECT) argument 909 BranchF64(BranchDelaySlot bd, Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2) argument 914 BranchF32(BranchDelaySlot bd, Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2) argument 925 BranchF(BranchDelaySlot bd, Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2) argument [all...] |
H A D | macro-assembler-mips.cc | 2003 Label* nan, Condition cond, FPURegister cmp1, 2023 c(UN, sizeField, cmp1, cmp2); 2029 c(UN, sizeField, cmp1, cmp2); 2038 DCHECK(!cmp1.is(kDoubleCompareReg) && !cmp2.is(kDoubleCompareReg)); 2041 cmp(UN, sizeField, kDoubleCompareReg, cmp1, cmp2); 2047 cmp(UN, sizeField, kDoubleCompareReg, cmp1, cmp2); 2062 BranchShortF(sizeField, &skip, neg_cond, cmp1, cmp2, bd); 2066 BranchShortF(sizeField, target, cond, cmp1, cmp2, bd); 2073 Condition cc, FPURegister cmp1, 2082 c(OLT, sizeField, cmp1, cmp [all...] |
/external/v8/src/mips64/ |
H A D | macro-assembler-mips64.h | 955 FPURegister cmp1, FPURegister cmp2, 957 BranchFCommon(S, target, nan, cc, cmp1, cmp2, bd); 961 FPURegister cmp1, FPURegister cmp2, 963 BranchFCommon(D, target, nan, cc, cmp1, cmp2, bd); 968 Condition cc, FPURegister cmp1, FPURegister cmp2) { 969 BranchF64(target, nan, cc, cmp1, cmp2, bd); 973 Condition cc, FPURegister cmp1, FPURegister cmp2) { 974 BranchF32(target, nan, cc, cmp1, cmp2, bd); 978 inline void BranchF(Label* target, Label* nan, Condition cc, FPURegister cmp1, argument 980 BranchF64(target, nan, cc, cmp1, cmp 954 BranchF32(Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2, BranchDelaySlot bd = PROTECT) argument 960 BranchF64(Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2, BranchDelaySlot bd = PROTECT) argument 967 BranchF64(BranchDelaySlot bd, Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2) argument 972 BranchF32(BranchDelaySlot bd, Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2) argument 983 BranchF(BranchDelaySlot bd, Label* target, Label* nan, Condition cc, FPURegister cmp1, FPURegister cmp2) argument [all...] |
H A D | macro-assembler-mips64.cc | 2230 Label* nan, Condition cond, FPURegister cmp1, 2250 c(UN, sizeField, cmp1, cmp2); 2256 c(UN, sizeField, cmp1, cmp2); 2266 DCHECK(!cmp1.is(kDoubleCompareReg) && !cmp2.is(kDoubleCompareReg)); 2269 cmp(UN, sizeField, kDoubleCompareReg, cmp1, cmp2); 2275 cmp(UN, sizeField, kDoubleCompareReg, cmp1, cmp2); 2290 BranchShortF(sizeField, &skip, neg_cond, cmp1, cmp2, bd); 2294 BranchShortF(sizeField, target, cond, cmp1, cmp2, bd); 2301 Condition cc, FPURegister cmp1, 2310 c(OLT, sizeField, cmp1, cmp [all...] |
/external/deqp/framework/common/ |
H A D | tcuTexCompareVerifier.cpp | 206 const CmpResultSet cmp1 = execCompare(compareMode, d1, cmpReference, prec.referenceBits, isFixedPointDepth); 209 | (deUint32(cmp1.isTrue)<<1); 211 | (deUint32(cmp1.isFalse)<<1); 272 const CmpResultSet cmp1 = execCompare(compareMode, d1, cmpReference, prec.referenceBits, isFixedPointDepth); 276 const bool canBeTrue = cmp0.isTrue || cmp1.isTrue || cmp2.isTrue || cmp3.isTrue; 277 const bool canBeFalse = cmp0.isFalse || cmp1.isFalse || cmp2.isFalse || cmp3.isFalse; 306 const CmpResultSet cmp1 = execCompare(compareMode, d1, cmpReference, prec.referenceBits, isFixedPointDepth); 311 | (deUint32(cmp1.isTrue)<<1) 315 | (deUint32(cmp1.isFalse)<<1)
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/external/v8/src/crankshaft/mips/ |
H A D | lithium-codegen-mips.h | 297 // Returns two registers in cmp1 and cmp2 that can be used in the 303 Register* cmp1,
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H A D | lithium-codegen-mips.cc | 5049 Register cmp1 = no_reg; local 5056 &cmp1, 5059 DCHECK(cmp1.is_valid()); 5063 EmitBranch(instr, final_branch_condition, cmp1, cmp2); 5072 Register* cmp1, 5084 *cmp1 = input; 5091 *cmp1 = scratch; 5098 *cmp1 = scratch; 5106 *cmp1 = at; 5120 *cmp1 5068 EmitTypeofIs(Label* true_label, Label* false_label, Register input, Handle<String> type_name, Register* cmp1, Operand* cmp2) argument [all...] |
/external/v8/src/crankshaft/mips64/ |
H A D | lithium-codegen-mips64.h | 300 // Returns two registers in cmp1 and cmp2 that can be used in the 306 Register* cmp1,
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H A D | lithium-codegen-mips64.cc | 5257 Register cmp1 = no_reg; local 5264 &cmp1, 5267 DCHECK(cmp1.is_valid()); 5271 EmitBranch(instr, final_branch_condition, cmp1, cmp2); 5280 Register* cmp1, 5292 *cmp1 = input; 5299 *cmp1 = scratch; 5306 *cmp1 = scratch; 5314 *cmp1 = at; 5328 *cmp1 5276 EmitTypeofIs(Label* true_label, Label* false_label, Register input, Handle<String> type_name, Register* cmp1, Operand* cmp2) argument [all...] |
/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/util/ |
H A D | ULocaleTest.java | 4588 int cmp1 = locales[i].compareTo(locales[j]); 4591 if ((cmp1 == 0) != eqls1) { 4595 if (cmp1 < 0 && cmp2 <= 0 || cmp1 > 0 && cmp2 >= 0 || cmp1 == 0 && cmp2 != 0) {
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/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/util/ |
H A D | ULocaleTest.java | 4587 int cmp1 = locales[i].compareTo(locales[j]); 4590 if ((cmp1 == 0) != eqls1) { 4594 if (cmp1 < 0 && cmp2 <= 0 || cmp1 > 0 && cmp2 >= 0 || cmp1 == 0 && cmp2 != 0) {
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