Searched refs:createQuadDRegsNode (Results 1 - 1 of 1) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 264 SDNode *createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
1655 SDNode *ARMDAGToDAGISel::createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, function in class:ARMDAGToDAGISel
2012 SrcReg = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0);
2180 SuperReg = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0);
2316 RegSeq = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0);
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