/external/libunwind/src/ia64/ |
H A D | getcontext.S | 51 st8.spill [r2] = r1, (SC_FLAGS - GR(1)) // M3 66 st8.spill [r2] = r12, (GR(4) - GR(12)) // M3 70 stf.spill [r3] = f2 // M2 71 stf.spill [r8] = f16 // M3 76 stf.spill [r9] = f24, (FR(31) - FR(24)) // M2 80 stf.spill [r9] = f31 // M2 81 st8.spill [r2] = r4, (GR(5) - GR(4)) // M3, bank 1 85 .mem.offset 0,0; st8.spill [r2] = r5, (GR(6) - GR(5)) // M4, bank 0 86 .mem.offset 8,0; st8.spill [r3] = r7, (BR(0) - GR(7)) // M3, bank 0 90 st8.spill [r [all...] |
/external/llvm/lib/CodeGen/ |
H A D | Spiller.h | 23 /// Implementations are utility classes which insert spill or remat code on 30 /// spill - Spill the LRE.getParent() live interval. 31 virtual void spill(LiveRangeEdit &LRE) = 0; 35 /// Create and return a spiller that will insert spill code directly instead
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H A D | RegAllocBasic.cpp | 57 /// algorithm. It prioritizes live virtual registers by spill weight and spills 203 spiller().spill(LRE); 222 // Populate a list of physical register spill candidates. 235 // Only virtual registers in the way, we may be able to spill them. 245 // Try to spill another interfering reg with less spill weight. 252 "Interference after spill."); 257 // No other spill candidates were found, so spill the current VirtReg. 262 spiller().spill(LR [all...] |
H A D | InlineSpiller.cpp | 55 static cl::opt<bool> DisableHoisting("disable-spill-hoist", cl::Hidden, 56 cl::desc("Disable inline spill hoisting")); 85 /// siblings. To hoist a spill to another BB, we need to find out a live 86 /// sibling there and use it as the source of the new spill. 144 // Variables that are valid during spill(), but used by multiple methods. 150 // All registers to spill to StackSlot, including the main register. 181 void spill(LiveRangeEdit &) override; 229 // When spilling a virtual register, we also spill any snippets it is connected 235 // spill slots which can be important in tight loops. 321 DEBUG(dbgs() << "\talso spill snippe 1020 void InlineSpiller::spill(LiveRangeEdit &edit) { function in class:InlineSpiller [all...] |
H A D | RegAllocPBQP.cpp | 14 // register assignment. If any variables are selected for spilling then spill 160 /// @brief Set spill costs for each node in the PBQP reg-alloc graph. 166 // A minimum spill costs, so that register constraints can can be set 643 VRegSpiller.spill(LRE); 655 assert(!LI.empty() && "Empty spill range."); 736 // All intervals have a spill weight that is mostly proportional to the number
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H A D | RegAllocGreedy.cpp | 60 "split-spill-mode", cl::Hidden, 234 float MaxWeight; ///< Maximum spill weight evicted. 756 // Never evict spill products. They cannot split or spill. 760 // register for it. This is indicated by an infinite spill weight. These 871 // hints, and only evict smaller spill weights. 954 // Number of spill code instructions to insert. 983 // Accumulate the total frequency of inserted spill code. 1111 // Use the spill placer to determine the live bundles. GrowRegion pretends 1147 // We normally only need one spill instructio [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | Spiller.h | 22 /// Implementations are utility classes which insert spill or remat code on 28 /// spill - Spill the LRE.getParent() live interval. 29 virtual void spill(LiveRangeEdit &LRE) = 0; 38 /// Create and return a spiller that will insert spill code directly instead
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H A D | Spiller.cpp | 73 /// Add spill ranges for every use/def of the live interval, inserting loads 81 "Attempting to spill already spilled value."); 84 "Trying to spill a stack slot."); 86 DEBUG(dbgs() << "Trivial spill everywhere of reg" << li->reg << "\n"); 174 /// Spills any live range using the spill-everywhere method with no attempt at 183 void spill(LiveRangeEdit &LRE) { function in class:__anon18595::TrivialSpiller 211 void spill(LiveRangeEdit &LRE) { function in class:__anon18596::StandardSpiller
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H A D | RegAllocBasic.cpp | 79 /// algorithm. It prioritizes live virtual registers by spill weight and spills 395 spiller().spill(LRE); 484 // Populate a list of physical register spill candidates. 506 // must have less spill weight. 511 // Try to spill another interfering reg with less spill weight. 518 "Interference after spill."); 523 // No other spill candidates were found, so spill the current VirtReg. 528 spiller().spill(LR [all...] |
H A D | RenderMachineFunction.cpp | 973 const LiveInterval *spill = *siItr; local 974 spillIntervals[li].insert(spill); 975 spillFor[spill] = li;
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H A D | InlineSpiller.cpp | 49 static cl::opt<bool> DisableHoisting("disable-spill-hoist", cl::Hidden, 50 cl::desc("Disable inline spill hoisting")); 67 // Variables that are valid during spill(), but used by multiple methods. 73 // All registers to spill to StackSlot, including the main register. 87 // True when all reaching defs were reloads: No spill is necessary. 96 // The preferred register to spill. 152 void spill(LiveRangeEdit &); 201 // When spilling a virtual register, we also spill any snippets it is connected 207 // spill slots which can be important in tight loops. 291 DEBUG(dbgs() << "\talso spill snippe 1251 void InlineSpiller::spill(LiveRangeEdit &edit) { function in class:InlineSpiller [all...] |
H A D | RegAllocLinearScan.cpp | 262 /// is available, or spill. 269 /// findIntervalsToSpill - Determine the intervals to spill for the 270 /// specified interval. It's passed the physical registers whose spill 539 // Rewrite spill code and update the PhysRegsUsed set. 612 // physical register or spill an interval (possibly this one) in order to 677 // register allocator had to spill other registers in its register class. 769 /// updateSpillWeights - updates the spill weights of the specifed physical 792 // e.g. allocating for GR32, bh is not used, updating bl spill weight. 793 // bl should get the same spill weight otherwise it will be chosen 794 // as a spill candidat [all...] |
H A D | RegAllocGreedy.cpp | 55 SplitSpillMode("split-spill-mode", cl::Hidden, 160 float MaxWeight; ///< Maximum spill weight evicted. 546 // Never evict spill products. They cannot split or spill. 550 // register for it. This is indicated by an infinite spill weight. These 624 // hints, and only evict smaller spill weights. 692 // Number of spill code instructions to insert. 715 // Accumulate the total frequency of inserted spill code. 845 // Use the spill placer to determine the live bundles. GrowRegion pretends 881 // We normally only need one spill instructio [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86CompilationCallback_Win64.asm | 24 ; WARNING: We cannot use register spill area - we're generating stubs by hands! 33 ; Save all XMM arg registers. Also allocate reg spill area.
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/external/libunwind/tests/ |
H A D | ia64-test-nat-asm.S | 108 stf.spill [sp] = f2, -16 188 st8.spill [sp] = r4, -16 225 st8.spill [sp] = r6, -16;; 263 st8.spill [sp] = r6, -16;; 305 st8.spill [sp] = r6, -16;; 348 st8.spill [sp] = r6, -16;; 392 st8.spill [sp] = r7 // save r7 in the scratch stack space
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_ra.cpp | 285 void spill(Instruction *defi, Value *slot, LValue *); 707 SpillCodeInserter& spill; member in class:nv50_ir::GCRA 993 GCRA::GCRA(Function *fn, SpillCodeInserter& spill) : argument 996 spill(spill) 1153 (node->degree < node->degreeLimit) ? "" : "(spill)"); 1171 // spill candidate 1180 ERROR("no viable spill candidates left\n"); 1282 INFO_DBG(prog->dbgFlags, REG_ALLOC, "must spill: %%%i (size %u)\n", 1286 slot = spill 1436 SpillCodeInserter::spill(Instruction *defi, Value *slot, LValue *lval) function in class:nv50_ir::SpillCodeInserter [all...] |
/external/v8/src/compiler/ |
H A D | register-allocator.cc | 136 // Normally, spilled ranges do not need connecting moves, because the spill 539 // We cannot spill a live range that has a use requiring a register 1661 // This value is produced on the stack, we never need to spill it. 1726 // This value is produced on the stack, we never need to spill it. 2424 SpillRange* spill = range->HasSpillRange() local 2427 spill->set_assigned_slot(slot_id); 2568 TRACE("Live range %d:%d is defined by a spill operand.\n", 2581 // If the range already has a spill operand and it doesn't need a 2582 // register immediately, split it and spill the first part of the range. 2586 // Do not spill liv [all...] |