Searched refs:teq (Results 1 - 25 of 63) sorted by relevance

123

/external/llvm/test/MC/Mips/
H A Dmacro-div.s61 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
66 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4]
70 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
75 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4]
79 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
88 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
93 # CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4]
97 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
100 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
H A Dmacro-ddivu.s58 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
63 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
68 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
73 # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4]
78 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
83 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
88 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
93 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
H A Dmacro-ddiv.s74 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
80 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4]
84 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
90 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4]
94 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
97 # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4]
103 # CHECK-TRAP: teq $zero, $1, 6 # encoding: [0x00,0x01,0x01,0xb4]
107 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
110 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
116 # CHECK-TRAP: teq
[all...]
H A Dmicromips-trap-instructions.s12 # CHECK-EL: teq $8, $9 # encoding: [0x28,0x01,0x3c,0x00]
27 # CHECK-EB: teq $8, $9 # encoding: [0x01,0x28,0x00,0x3c]
39 teq $8, $9, 0
H A Dmacro-divu.s52 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
57 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
62 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
73 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
78 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
83 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
H A Dmips-control-instructions.s18 # CHECK32: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
19 # CHECK32: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74]
49 # CHECK64: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
50 # CHECK64: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74]
83 teq $0,$3
84 teq $0,$3,1
/external/llvm/test/MC/Mips/micromips32r6/
H A Dinvalid-wrong-error.s10 teq $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
11 teq $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
12 teq $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/micromips64r6/
H A Dinvalid-wrong-error.s18 teq $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
19 teq $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
20 teq $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips2.s28 teq $0,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29 teq $5,$7,620 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips2/
H A Dvalid.s151 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
152 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/boringssl/src/crypto/sha/asm/
H A Dsha1-armv4-large.pl219 teq $Xi,sp
238 teq $Xi,sp @ preserve carry
250 teq $Xi,sp
266 teq $inp,$len
459 &teq ($inp,$len);
/external/llvm/test/MC/Mips/mips3/
H A Dvalid.s215 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
216 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips32/
H A Dvalid.s181 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
182 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s218 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
219 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips32r3/
H A Dvalid.s218 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
219 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips32r5/
H A Dvalid.s219 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
220 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips4/
H A Dvalid.s244 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
245 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips5/
H A Dvalid.s246 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
247 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s3123 teq r5, #0xf000
3124 teq r5, $0xf000
3125 teq r5, 0xf000
3126 teq r7, #(0xff << 16)
3127 teq r7, #-2147483638
3128 teq r7, #42, #2
3129 teq r7, #40, #2
3130 teq r7, $40, $2
3131 teq r7, 40, 2
3132 teq r
[all...]
/external/boringssl/linux-arm/crypto/aes/
H A Daes-armv4.S423 teq r0,#0
429 teq r2,#0
436 teq r1,#128
438 teq r1,#192
440 teq r1,#256
508 teq lr,#128
571 teq lr,#192
726 teq r0,#0
767 teq r7,r8
/external/boringssl/src/crypto/aes/asm/
H A Daes-armv4.pl452 teq r0,#0
458 teq r2,#0
465 teq r1,#128
467 teq r1,#192
469 teq r1,#256
537 teq lr,#128
600 teq lr,#192
754 teq r0,#0
794 teq $i1,$i2
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-arm-instructions.s2241 teq r5, #0xf000
2242 teq r4, r5
2243 teq r4, r5, lsl #5
2244 teq r4, r5, lsr #5
2245 teq r4, r5, lsr #5
2246 teq r4, r5, asr #5
2247 teq r4, r5, ror #5
2248 teq r6, r7, lsl r9
2249 teq r6, r7, lsr r9
2250 teq r
[all...]
/external/llvm/test/MC/Mips/mips64/
H A Dvalid.s265 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
266 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips64r2/
H A Dvalid.s291 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
292 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
/external/llvm/test/MC/Mips/mips64r3/
H A Dvalid.s291 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
292 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]

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