Searched refs:PCI_BRIDGE_CTL_BUS_RESET (Results 1 - 25 of 260) sorted by relevance

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/prebuilts/ndk/r10/platforms/android-10/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-10/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-10/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-11/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-11/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-11/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-12/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-12/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-12/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-13/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-13/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-13/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-14/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-14/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-14/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-15/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-15/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-15/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-16/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-16/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-16/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-17/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-17/arch-mips/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-17/arch-x86/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro
/prebuilts/ndk/r10/platforms/android-18/arch-arm/usr/include/linux/
H A Dpci_regs.h128 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 macro

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