| /external/vixl/src/aarch64/ |
| H A D | operands-aarch64.h | 41 // Some CPURegister methods can return Register or VRegister types, so we need
46 class CPURegister { class in namespace:vixl::aarch64
58 CPURegister() : code_(0), size_(0), type_(kNoRegister) { function in class:vixl::aarch64::CPURegister
63 CPURegister(unsigned code, unsigned size, RegisterType type) function in class:vixl::aarch64::CPURegister
168 bool Aliases(const CPURegister& other) const {
173 bool Is(const CPURegister& other) const {
219 bool IsSameType(const CPURegister& other) const {
223 bool IsSameSizeAndType(const CPURegister& other) const {
237 class Register : public CPURegister {
239 Register() : CPURegister() {}
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| H A D | macro-assembler-aarch64.h | 53 V(Ldr, CPURegister&, rt, LoadOpFor(rt)) \
54 V(Str, CPURegister&, rt, StoreOpFor(rt)) \
59 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
60 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
61 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
735 void LoadStoreMacro(const CPURegister& rt,
744 void LoadStorePairMacro(const CPURegister& rt,
745 const CPURegister& rt2,
777 void Push(const CPURegister& src0,
778 const CPURegister
799 PushSizeRegList( RegList registers, unsigned reg_size, CPURegister::RegisterType type = CPURegister::kRegister) argument
805 PopSizeRegList(RegList registers, unsigned reg_size, CPURegister::RegisterType type = CPURegister::kRegister) argument
858 PeekSizeRegList( RegList registers, int64_t offset, unsigned reg_size, CPURegister::RegisterType type = CPURegister::kRegister) argument
865 PokeSizeRegList( RegList registers, int64_t offset, unsigned reg_size, CPURegister::RegisterType type = CPURegister::kRegister) argument
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| /external/vixl/src/aarch32/ |
| H A D | instructions-aarch32.h | 60 class CPURegister { class in namespace:vixl::aarch32
83 CPURegister(RegisterType type, uint32_t code, int size) function in class:vixl::aarch32::CPURegister
129 bool IsSameFormat(CPURegister reg) {
132 bool Is(CPURegister ref) const { return GetReg() == ref.GetReg(); }
136 class Register : public CPURegister {
138 Register() : CPURegister(kNoRegister, 0, kRegSizeInBits) {}
140 : CPURegister(kRRegister, code % kNumberOfRegisters, kRegSizeInBits) {
177 class VRegister : public CPURegister {
179 VRegister() : CPURegister(kNoRegister, 0, 0) {}
181 : CPURegister(typ
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| /external/v8/src/arm64/ |
| H A D | assembler-arm64.h | 69 // Some CPURegister methods can return Register and FPRegister types, so we
75 struct CPURegister { struct in namespace:v8::internal
93 static CPURegister Create(int code, int size, RegisterType type) {
94 CPURegister r = {code, size, type};
110 bool Is(const CPURegister& other) const;
111 bool Aliases(const CPURegister& other) const;
124 bool IsSameSizeAndType(const CPURegister& other) const;
127 bool is(const CPURegister& other) const { return Is(other); }
136 struct Register : public CPURegister {
138 return Register(CPURegister
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| H A D | macro-assembler-arm64.h | 62 V(Ldr, CPURegister&, rt, LoadOpFor(rt)) \
63 V(Str, CPURegister&, rt, StoreOpFor(rt)) \
67 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
68 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
69 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
301 void LoadStoreMacro(const CPURegister& rt,
310 void LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2,
479 inline void Ldnp(const CPURegister& rt,
480 const CPURegister
636 PushSizeRegList(RegList registers, unsigned reg_size, CPURegister::RegisterType type = CPURegister::kRegister) argument
640 PopSizeRegList(RegList registers, unsigned reg_size, CPURegister::RegisterType type = CPURegister::kRegister) argument
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