code_generator_arm.cc revision 68c981fad87720fae9c799b240141ce3c12cd5bf 
1/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "code_generator_arm.h"
18
19#include "arch/arm/instruction_set_features_arm.h"
20#include "art_method.h"
21#include "code_generator_utils.h"
22#include "compiled_method.h"
23#include "entrypoints/quick/quick_entrypoints.h"
24#include "gc/accounting/card_table.h"
25#include "intrinsics.h"
26#include "intrinsics_arm.h"
27#include "mirror/array-inl.h"
28#include "mirror/class-inl.h"
29#include "thread.h"
30#include "utils/arm/assembler_arm.h"
31#include "utils/arm/managed_register_arm.h"
32#include "utils/assembler.h"
33#include "utils/stack_checks.h"
34
35namespace art {
36
37template<class MirrorType>
38class GcRoot;
39
40namespace arm {
41
42static bool ExpectedPairLayout(Location location) {
43  // We expected this for both core and fpu register pairs.
44  return ((location.low() & 1) == 0) && (location.low() + 1 == location.high());
45}
46
47static constexpr int kCurrentMethodStackOffset = 0;
48static constexpr Register kMethodRegisterArgument = R0;
49
50static constexpr Register kCoreAlwaysSpillRegister = R5;
51static constexpr Register kCoreCalleeSaves[] =
52    { R5, R6, R7, R8, R10, R11, LR };
53static constexpr SRegister kFpuCalleeSaves[] =
54    { S16, S17, S18, S19, S20, S21, S22, S23, S24, S25, S26, S27, S28, S29, S30, S31 };
55
56// D31 cannot be split into two S registers, and the register allocator only works on
57// S registers. Therefore there is no need to block it.
58static constexpr DRegister DTMP = D31;
59
60static constexpr uint32_t kPackedSwitchCompareJumpThreshold = 7;
61
62// NOLINT on __ macro to suppress wrong warning/fix (misc-macro-parentheses) from clang-tidy.
63#define __ down_cast<ArmAssembler*>(codegen->GetAssembler())->  // NOLINT
64#define QUICK_ENTRY_POINT(x) QUICK_ENTRYPOINT_OFFSET(kArmPointerSize, x).Int32Value()
65
66class NullCheckSlowPathARM : public SlowPathCode {
67 public:
68  explicit NullCheckSlowPathARM(HNullCheck* instruction) : SlowPathCode(instruction) {}
69
70  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
71    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
72    __ Bind(GetEntryLabel());
73    if (instruction_->CanThrowIntoCatchBlock()) {
74      // Live registers will be restored in the catch block if caught.
75      SaveLiveRegisters(codegen, instruction_->GetLocations());
76    }
77    arm_codegen->InvokeRuntime(
78        QUICK_ENTRY_POINT(pThrowNullPointer), instruction_, instruction_->GetDexPc(), this);
79    CheckEntrypointTypes<kQuickThrowNullPointer, void, void>();
80  }
81
82  bool IsFatal() const OVERRIDE { return true; }
83
84  const char* GetDescription() const OVERRIDE { return "NullCheckSlowPathARM"; }
85
86 private:
87  DISALLOW_COPY_AND_ASSIGN(NullCheckSlowPathARM);
88};
89
90class DivZeroCheckSlowPathARM : public SlowPathCode {
91 public:
92  explicit DivZeroCheckSlowPathARM(HDivZeroCheck* instruction) : SlowPathCode(instruction) {}
93
94  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
95    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
96    __ Bind(GetEntryLabel());
97    if (instruction_->CanThrowIntoCatchBlock()) {
98      // Live registers will be restored in the catch block if caught.
99      SaveLiveRegisters(codegen, instruction_->GetLocations());
100    }
101    arm_codegen->InvokeRuntime(
102        QUICK_ENTRY_POINT(pThrowDivZero), instruction_, instruction_->GetDexPc(), this);
103    CheckEntrypointTypes<kQuickThrowDivZero, void, void>();
104  }
105
106  bool IsFatal() const OVERRIDE { return true; }
107
108  const char* GetDescription() const OVERRIDE { return "DivZeroCheckSlowPathARM"; }
109
110 private:
111  DISALLOW_COPY_AND_ASSIGN(DivZeroCheckSlowPathARM);
112};
113
114class SuspendCheckSlowPathARM : public SlowPathCode {
115 public:
116  SuspendCheckSlowPathARM(HSuspendCheck* instruction, HBasicBlock* successor)
117      : SlowPathCode(instruction), successor_(successor) {}
118
119  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
120    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
121    __ Bind(GetEntryLabel());
122    arm_codegen->InvokeRuntime(
123        QUICK_ENTRY_POINT(pTestSuspend), instruction_, instruction_->GetDexPc(), this);
124    CheckEntrypointTypes<kQuickTestSuspend, void, void>();
125    if (successor_ == nullptr) {
126      __ b(GetReturnLabel());
127    } else {
128      __ b(arm_codegen->GetLabelOf(successor_));
129    }
130  }
131
132  Label* GetReturnLabel() {
133    DCHECK(successor_ == nullptr);
134    return &return_label_;
135  }
136
137  HBasicBlock* GetSuccessor() const {
138    return successor_;
139  }
140
141  const char* GetDescription() const OVERRIDE { return "SuspendCheckSlowPathARM"; }
142
143 private:
144  // If not null, the block to branch to after the suspend check.
145  HBasicBlock* const successor_;
146
147  // If `successor_` is null, the label to branch to after the suspend check.
148  Label return_label_;
149
150  DISALLOW_COPY_AND_ASSIGN(SuspendCheckSlowPathARM);
151};
152
153class BoundsCheckSlowPathARM : public SlowPathCode {
154 public:
155  explicit BoundsCheckSlowPathARM(HBoundsCheck* instruction)
156      : SlowPathCode(instruction) {}
157
158  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
159    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
160    LocationSummary* locations = instruction_->GetLocations();
161
162    __ Bind(GetEntryLabel());
163    if (instruction_->CanThrowIntoCatchBlock()) {
164      // Live registers will be restored in the catch block if caught.
165      SaveLiveRegisters(codegen, instruction_->GetLocations());
166    }
167    // We're moving two locations to locations that could overlap, so we need a parallel
168    // move resolver.
169    InvokeRuntimeCallingConvention calling_convention;
170    codegen->EmitParallelMoves(
171        locations->InAt(0),
172        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
173        Primitive::kPrimInt,
174        locations->InAt(1),
175        Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
176        Primitive::kPrimInt);
177    uint32_t entry_point_offset = instruction_->AsBoundsCheck()->IsStringCharAt()
178        ? QUICK_ENTRY_POINT(pThrowStringBounds)
179        : QUICK_ENTRY_POINT(pThrowArrayBounds);
180    arm_codegen->InvokeRuntime(entry_point_offset, instruction_, instruction_->GetDexPc(), this);
181    CheckEntrypointTypes<kQuickThrowStringBounds, void, int32_t, int32_t>();
182    CheckEntrypointTypes<kQuickThrowArrayBounds, void, int32_t, int32_t>();
183  }
184
185  bool IsFatal() const OVERRIDE { return true; }
186
187  const char* GetDescription() const OVERRIDE { return "BoundsCheckSlowPathARM"; }
188
189 private:
190  DISALLOW_COPY_AND_ASSIGN(BoundsCheckSlowPathARM);
191};
192
193class LoadClassSlowPathARM : public SlowPathCode {
194 public:
195  LoadClassSlowPathARM(HLoadClass* cls,
196                       HInstruction* at,
197                       uint32_t dex_pc,
198                       bool do_clinit)
199      : SlowPathCode(at), cls_(cls), at_(at), dex_pc_(dex_pc), do_clinit_(do_clinit) {
200    DCHECK(at->IsLoadClass() || at->IsClinitCheck());
201  }
202
203  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
204    LocationSummary* locations = at_->GetLocations();
205
206    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
207    __ Bind(GetEntryLabel());
208    SaveLiveRegisters(codegen, locations);
209
210    InvokeRuntimeCallingConvention calling_convention;
211    __ LoadImmediate(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex());
212    int32_t entry_point_offset = do_clinit_
213        ? QUICK_ENTRY_POINT(pInitializeStaticStorage)
214        : QUICK_ENTRY_POINT(pInitializeType);
215    arm_codegen->InvokeRuntime(entry_point_offset, at_, dex_pc_, this);
216    if (do_clinit_) {
217      CheckEntrypointTypes<kQuickInitializeStaticStorage, void*, uint32_t>();
218    } else {
219      CheckEntrypointTypes<kQuickInitializeType, void*, uint32_t>();
220    }
221
222    // Move the class to the desired location.
223    Location out = locations->Out();
224    if (out.IsValid()) {
225      DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
226      arm_codegen->Move32(locations->Out(), Location::RegisterLocation(R0));
227    }
228    RestoreLiveRegisters(codegen, locations);
229    __ b(GetExitLabel());
230  }
231
232  const char* GetDescription() const OVERRIDE { return "LoadClassSlowPathARM"; }
233
234 private:
235  // The class this slow path will load.
236  HLoadClass* const cls_;
237
238  // The instruction where this slow path is happening.
239  // (Might be the load class or an initialization check).
240  HInstruction* const at_;
241
242  // The dex PC of `at_`.
243  const uint32_t dex_pc_;
244
245  // Whether to initialize the class.
246  const bool do_clinit_;
247
248  DISALLOW_COPY_AND_ASSIGN(LoadClassSlowPathARM);
249};
250
251class LoadStringSlowPathARM : public SlowPathCode {
252 public:
253  explicit LoadStringSlowPathARM(HLoadString* instruction) : SlowPathCode(instruction) {}
254
255  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
256    LocationSummary* locations = instruction_->GetLocations();
257    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg()));
258
259    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
260    __ Bind(GetEntryLabel());
261    SaveLiveRegisters(codegen, locations);
262
263    InvokeRuntimeCallingConvention calling_convention;
264    const uint32_t string_index = instruction_->AsLoadString()->GetStringIndex();
265    __ LoadImmediate(calling_convention.GetRegisterAt(0), string_index);
266    arm_codegen->InvokeRuntime(
267        QUICK_ENTRY_POINT(pResolveString), instruction_, instruction_->GetDexPc(), this);
268    CheckEntrypointTypes<kQuickResolveString, void*, uint32_t>();
269    arm_codegen->Move32(locations->Out(), Location::RegisterLocation(R0));
270
271    RestoreLiveRegisters(codegen, locations);
272    __ b(GetExitLabel());
273  }
274
275  const char* GetDescription() const OVERRIDE { return "LoadStringSlowPathARM"; }
276
277 private:
278  DISALLOW_COPY_AND_ASSIGN(LoadStringSlowPathARM);
279};
280
281class TypeCheckSlowPathARM : public SlowPathCode {
282 public:
283  TypeCheckSlowPathARM(HInstruction* instruction, bool is_fatal)
284      : SlowPathCode(instruction), is_fatal_(is_fatal) {}
285
286  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
287    LocationSummary* locations = instruction_->GetLocations();
288    Location object_class = instruction_->IsCheckCast() ? locations->GetTemp(0)
289                                                        : locations->Out();
290    DCHECK(instruction_->IsCheckCast()
291           || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg()));
292
293    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
294    __ Bind(GetEntryLabel());
295
296    if (!is_fatal_) {
297      SaveLiveRegisters(codegen, locations);
298    }
299
300    // We're moving two locations to locations that could overlap, so we need a parallel
301    // move resolver.
302    InvokeRuntimeCallingConvention calling_convention;
303    codegen->EmitParallelMoves(
304        locations->InAt(1),
305        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
306        Primitive::kPrimNot,
307        object_class,
308        Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
309        Primitive::kPrimNot);
310
311    if (instruction_->IsInstanceOf()) {
312      arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pInstanceofNonTrivial),
313                                 instruction_,
314                                 instruction_->GetDexPc(),
315                                 this);
316      CheckEntrypointTypes<
317          kQuickInstanceofNonTrivial, size_t, const mirror::Class*, const mirror::Class*>();
318      arm_codegen->Move32(locations->Out(), Location::RegisterLocation(R0));
319    } else {
320      DCHECK(instruction_->IsCheckCast());
321      arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pCheckCast),
322                                 instruction_,
323                                 instruction_->GetDexPc(),
324                                 this);
325      CheckEntrypointTypes<kQuickCheckCast, void, const mirror::Class*, const mirror::Class*>();
326    }
327
328    if (!is_fatal_) {
329      RestoreLiveRegisters(codegen, locations);
330      __ b(GetExitLabel());
331    }
332  }
333
334  const char* GetDescription() const OVERRIDE { return "TypeCheckSlowPathARM"; }
335
336  bool IsFatal() const OVERRIDE { return is_fatal_; }
337
338 private:
339  const bool is_fatal_;
340
341  DISALLOW_COPY_AND_ASSIGN(TypeCheckSlowPathARM);
342};
343
344class DeoptimizationSlowPathARM : public SlowPathCode {
345 public:
346  explicit DeoptimizationSlowPathARM(HDeoptimize* instruction)
347    : SlowPathCode(instruction) {}
348
349  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
350    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
351    __ Bind(GetEntryLabel());
352    SaveLiveRegisters(codegen, instruction_->GetLocations());
353    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pDeoptimize),
354                               instruction_,
355                               instruction_->GetDexPc(),
356                               this);
357    CheckEntrypointTypes<kQuickDeoptimize, void, void>();
358  }
359
360  const char* GetDescription() const OVERRIDE { return "DeoptimizationSlowPathARM"; }
361
362 private:
363  DISALLOW_COPY_AND_ASSIGN(DeoptimizationSlowPathARM);
364};
365
366class ArraySetSlowPathARM : public SlowPathCode {
367 public:
368  explicit ArraySetSlowPathARM(HInstruction* instruction) : SlowPathCode(instruction) {}
369
370  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
371    LocationSummary* locations = instruction_->GetLocations();
372    __ Bind(GetEntryLabel());
373    SaveLiveRegisters(codegen, locations);
374
375    InvokeRuntimeCallingConvention calling_convention;
376    HParallelMove parallel_move(codegen->GetGraph()->GetArena());
377    parallel_move.AddMove(
378        locations->InAt(0),
379        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
380        Primitive::kPrimNot,
381        nullptr);
382    parallel_move.AddMove(
383        locations->InAt(1),
384        Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
385        Primitive::kPrimInt,
386        nullptr);
387    parallel_move.AddMove(
388        locations->InAt(2),
389        Location::RegisterLocation(calling_convention.GetRegisterAt(2)),
390        Primitive::kPrimNot,
391        nullptr);
392    codegen->GetMoveResolver()->EmitNativeCode(&parallel_move);
393
394    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
395    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pAputObject),
396                               instruction_,
397                               instruction_->GetDexPc(),
398                               this);
399    CheckEntrypointTypes<kQuickAputObject, void, mirror::Array*, int32_t, mirror::Object*>();
400    RestoreLiveRegisters(codegen, locations);
401    __ b(GetExitLabel());
402  }
403
404  const char* GetDescription() const OVERRIDE { return "ArraySetSlowPathARM"; }
405
406 private:
407  DISALLOW_COPY_AND_ASSIGN(ArraySetSlowPathARM);
408};
409
410// Slow path marking an object during a read barrier.
411class ReadBarrierMarkSlowPathARM : public SlowPathCode {
412 public:
413  ReadBarrierMarkSlowPathARM(HInstruction* instruction, Location obj)
414      : SlowPathCode(instruction), obj_(obj) {
415    DCHECK(kEmitCompilerReadBarrier);
416  }
417
418  const char* GetDescription() const OVERRIDE { return "ReadBarrierMarkSlowPathARM"; }
419
420  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
421    LocationSummary* locations = instruction_->GetLocations();
422    Register reg = obj_.AsRegister<Register>();
423    DCHECK(locations->CanCall());
424    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg));
425    DCHECK(instruction_->IsInstanceFieldGet() ||
426           instruction_->IsStaticFieldGet() ||
427           instruction_->IsArrayGet() ||
428           instruction_->IsArraySet() ||
429           instruction_->IsLoadClass() ||
430           instruction_->IsLoadString() ||
431           instruction_->IsInstanceOf() ||
432           instruction_->IsCheckCast() ||
433           (instruction_->IsInvokeVirtual() && instruction_->GetLocations()->Intrinsified()) ||
434           (instruction_->IsInvokeStaticOrDirect() && instruction_->GetLocations()->Intrinsified()))
435        << "Unexpected instruction in read barrier marking slow path: "
436        << instruction_->DebugName();
437
438    __ Bind(GetEntryLabel());
439    // No need to save live registers; it's taken care of by the
440    // entrypoint. Also, there is no need to update the stack mask,
441    // as this runtime call will not trigger a garbage collection.
442    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
443    DCHECK_NE(reg, SP);
444    DCHECK_NE(reg, LR);
445    DCHECK_NE(reg, PC);
446    // IP is used internally by the ReadBarrierMarkRegX entry point
447    // as a temporary, it cannot be the entry point's input/output.
448    DCHECK_NE(reg, IP);
449    DCHECK(0 <= reg && reg < kNumberOfCoreRegisters) << reg;
450    // "Compact" slow path, saving two moves.
451    //
452    // Instead of using the standard runtime calling convention (input
453    // and output in R0):
454    //
455    //   R0 <- obj
456    //   R0 <- ReadBarrierMark(R0)
457    //   obj <- R0
458    //
459    // we just use rX (the register holding `obj`) as input and output
460    // of a dedicated entrypoint:
461    //
462    //   rX <- ReadBarrierMarkRegX(rX)
463    //
464    int32_t entry_point_offset =
465        CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(reg);
466    // This runtime call does not require a stack map.
467    arm_codegen->InvokeRuntimeWithoutRecordingPcInfo(entry_point_offset, instruction_, this);
468    __ b(GetExitLabel());
469  }
470
471 private:
472  const Location obj_;
473
474  DISALLOW_COPY_AND_ASSIGN(ReadBarrierMarkSlowPathARM);
475};
476
477// Slow path generating a read barrier for a heap reference.
478class ReadBarrierForHeapReferenceSlowPathARM : public SlowPathCode {
479 public:
480  ReadBarrierForHeapReferenceSlowPathARM(HInstruction* instruction,
481                                         Location out,
482                                         Location ref,
483                                         Location obj,
484                                         uint32_t offset,
485                                         Location index)
486      : SlowPathCode(instruction),
487        out_(out),
488        ref_(ref),
489        obj_(obj),
490        offset_(offset),
491        index_(index) {
492    DCHECK(kEmitCompilerReadBarrier);
493    // If `obj` is equal to `out` or `ref`, it means the initial object
494    // has been overwritten by (or after) the heap object reference load
495    // to be instrumented, e.g.:
496    //
497    //   __ LoadFromOffset(kLoadWord, out, out, offset);
498    //   codegen_->GenerateReadBarrierSlow(instruction, out_loc, out_loc, out_loc, offset);
499    //
500    // In that case, we have lost the information about the original
501    // object, and the emitted read barrier cannot work properly.
502    DCHECK(!obj.Equals(out)) << "obj=" << obj << " out=" << out;
503    DCHECK(!obj.Equals(ref)) << "obj=" << obj << " ref=" << ref;
504  }
505
506  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
507    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
508    LocationSummary* locations = instruction_->GetLocations();
509    Register reg_out = out_.AsRegister<Register>();
510    DCHECK(locations->CanCall());
511    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out));
512    DCHECK(instruction_->IsInstanceFieldGet() ||
513           instruction_->IsStaticFieldGet() ||
514           instruction_->IsArrayGet() ||
515           instruction_->IsInstanceOf() ||
516           instruction_->IsCheckCast() ||
517           (instruction_->IsInvokeVirtual()) && instruction_->GetLocations()->Intrinsified())
518        << "Unexpected instruction in read barrier for heap reference slow path: "
519        << instruction_->DebugName();
520
521    __ Bind(GetEntryLabel());
522    SaveLiveRegisters(codegen, locations);
523
524    // We may have to change the index's value, but as `index_` is a
525    // constant member (like other "inputs" of this slow path),
526    // introduce a copy of it, `index`.
527    Location index = index_;
528    if (index_.IsValid()) {
529      // Handle `index_` for HArrayGet and UnsafeGetObject/UnsafeGetObjectVolatile intrinsics.
530      if (instruction_->IsArrayGet()) {
531        // Compute the actual memory offset and store it in `index`.
532        Register index_reg = index_.AsRegister<Register>();
533        DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg));
534        if (codegen->IsCoreCalleeSaveRegister(index_reg)) {
535          // We are about to change the value of `index_reg` (see the
536          // calls to art::arm::Thumb2Assembler::Lsl and
537          // art::arm::Thumb2Assembler::AddConstant below), but it has
538          // not been saved by the previous call to
539          // art::SlowPathCode::SaveLiveRegisters, as it is a
540          // callee-save register --
541          // art::SlowPathCode::SaveLiveRegisters does not consider
542          // callee-save registers, as it has been designed with the
543          // assumption that callee-save registers are supposed to be
544          // handled by the called function.  So, as a callee-save
545          // register, `index_reg` _would_ eventually be saved onto
546          // the stack, but it would be too late: we would have
547          // changed its value earlier.  Therefore, we manually save
548          // it here into another freely available register,
549          // `free_reg`, chosen of course among the caller-save
550          // registers (as a callee-save `free_reg` register would
551          // exhibit the same problem).
552          //
553          // Note we could have requested a temporary register from
554          // the register allocator instead; but we prefer not to, as
555          // this is a slow path, and we know we can find a
556          // caller-save register that is available.
557          Register free_reg = FindAvailableCallerSaveRegister(codegen);
558          __ Mov(free_reg, index_reg);
559          index_reg = free_reg;
560          index = Location::RegisterLocation(index_reg);
561        } else {
562          // The initial register stored in `index_` has already been
563          // saved in the call to art::SlowPathCode::SaveLiveRegisters
564          // (as it is not a callee-save register), so we can freely
565          // use it.
566        }
567        // Shifting the index value contained in `index_reg` by the scale
568        // factor (2) cannot overflow in practice, as the runtime is
569        // unable to allocate object arrays with a size larger than
570        // 2^26 - 1 (that is, 2^28 - 4 bytes).
571        __ Lsl(index_reg, index_reg, TIMES_4);
572        static_assert(
573            sizeof(mirror::HeapReference<mirror::Object>) == sizeof(int32_t),
574            "art::mirror::HeapReference<art::mirror::Object> and int32_t have different sizes.");
575        __ AddConstant(index_reg, index_reg, offset_);
576      } else {
577        // In the case of the UnsafeGetObject/UnsafeGetObjectVolatile
578        // intrinsics, `index_` is not shifted by a scale factor of 2
579        // (as in the case of ArrayGet), as it is actually an offset
580        // to an object field within an object.
581        DCHECK(instruction_->IsInvoke()) << instruction_->DebugName();
582        DCHECK(instruction_->GetLocations()->Intrinsified());
583        DCHECK((instruction_->AsInvoke()->GetIntrinsic() == Intrinsics::kUnsafeGetObject) ||
584               (instruction_->AsInvoke()->GetIntrinsic() == Intrinsics::kUnsafeGetObjectVolatile))
585            << instruction_->AsInvoke()->GetIntrinsic();
586        DCHECK_EQ(offset_, 0U);
587        DCHECK(index_.IsRegisterPair());
588        // UnsafeGet's offset location is a register pair, the low
589        // part contains the correct offset.
590        index = index_.ToLow();
591      }
592    }
593
594    // We're moving two or three locations to locations that could
595    // overlap, so we need a parallel move resolver.
596    InvokeRuntimeCallingConvention calling_convention;
597    HParallelMove parallel_move(codegen->GetGraph()->GetArena());
598    parallel_move.AddMove(ref_,
599                          Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
600                          Primitive::kPrimNot,
601                          nullptr);
602    parallel_move.AddMove(obj_,
603                          Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
604                          Primitive::kPrimNot,
605                          nullptr);
606    if (index.IsValid()) {
607      parallel_move.AddMove(index,
608                            Location::RegisterLocation(calling_convention.GetRegisterAt(2)),
609                            Primitive::kPrimInt,
610                            nullptr);
611      codegen->GetMoveResolver()->EmitNativeCode(&parallel_move);
612    } else {
613      codegen->GetMoveResolver()->EmitNativeCode(&parallel_move);
614      __ LoadImmediate(calling_convention.GetRegisterAt(2), offset_);
615    }
616    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pReadBarrierSlow),
617                               instruction_,
618                               instruction_->GetDexPc(),
619                               this);
620    CheckEntrypointTypes<
621        kQuickReadBarrierSlow, mirror::Object*, mirror::Object*, mirror::Object*, uint32_t>();
622    arm_codegen->Move32(out_, Location::RegisterLocation(R0));
623
624    RestoreLiveRegisters(codegen, locations);
625    __ b(GetExitLabel());
626  }
627
628  const char* GetDescription() const OVERRIDE { return "ReadBarrierForHeapReferenceSlowPathARM"; }
629
630 private:
631  Register FindAvailableCallerSaveRegister(CodeGenerator* codegen) {
632    size_t ref = static_cast<int>(ref_.AsRegister<Register>());
633    size_t obj = static_cast<int>(obj_.AsRegister<Register>());
634    for (size_t i = 0, e = codegen->GetNumberOfCoreRegisters(); i < e; ++i) {
635      if (i != ref && i != obj && !codegen->IsCoreCalleeSaveRegister(i)) {
636        return static_cast<Register>(i);
637      }
638    }
639    // We shall never fail to find a free caller-save register, as
640    // there are more than two core caller-save registers on ARM
641    // (meaning it is possible to find one which is different from
642    // `ref` and `obj`).
643    DCHECK_GT(codegen->GetNumberOfCoreCallerSaveRegisters(), 2u);
644    LOG(FATAL) << "Could not find a free caller-save register";
645    UNREACHABLE();
646  }
647
648  const Location out_;
649  const Location ref_;
650  const Location obj_;
651  const uint32_t offset_;
652  // An additional location containing an index to an array.
653  // Only used for HArrayGet and the UnsafeGetObject &
654  // UnsafeGetObjectVolatile intrinsics.
655  const Location index_;
656
657  DISALLOW_COPY_AND_ASSIGN(ReadBarrierForHeapReferenceSlowPathARM);
658};
659
660// Slow path generating a read barrier for a GC root.
661class ReadBarrierForRootSlowPathARM : public SlowPathCode {
662 public:
663  ReadBarrierForRootSlowPathARM(HInstruction* instruction, Location out, Location root)
664      : SlowPathCode(instruction), out_(out), root_(root) {
665    DCHECK(kEmitCompilerReadBarrier);
666  }
667
668  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
669    LocationSummary* locations = instruction_->GetLocations();
670    Register reg_out = out_.AsRegister<Register>();
671    DCHECK(locations->CanCall());
672    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out));
673    DCHECK(instruction_->IsLoadClass() || instruction_->IsLoadString())
674        << "Unexpected instruction in read barrier for GC root slow path: "
675        << instruction_->DebugName();
676
677    __ Bind(GetEntryLabel());
678    SaveLiveRegisters(codegen, locations);
679
680    InvokeRuntimeCallingConvention calling_convention;
681    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
682    arm_codegen->Move32(Location::RegisterLocation(calling_convention.GetRegisterAt(0)), root_);
683    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pReadBarrierForRootSlow),
684                               instruction_,
685                               instruction_->GetDexPc(),
686                               this);
687    CheckEntrypointTypes<kQuickReadBarrierForRootSlow, mirror::Object*, GcRoot<mirror::Object>*>();
688    arm_codegen->Move32(out_, Location::RegisterLocation(R0));
689
690    RestoreLiveRegisters(codegen, locations);
691    __ b(GetExitLabel());
692  }
693
694  const char* GetDescription() const OVERRIDE { return "ReadBarrierForRootSlowPathARM"; }
695
696 private:
697  const Location out_;
698  const Location root_;
699
700  DISALLOW_COPY_AND_ASSIGN(ReadBarrierForRootSlowPathARM);
701};
702
703#undef __
704// NOLINT on __ macro to suppress wrong warning/fix (misc-macro-parentheses) from clang-tidy.
705#define __ down_cast<ArmAssembler*>(GetAssembler())->  // NOLINT
706
707inline Condition ARMCondition(IfCondition cond) {
708  switch (cond) {
709    case kCondEQ: return EQ;
710    case kCondNE: return NE;
711    case kCondLT: return LT;
712    case kCondLE: return LE;
713    case kCondGT: return GT;
714    case kCondGE: return GE;
715    case kCondB:  return LO;
716    case kCondBE: return LS;
717    case kCondA:  return HI;
718    case kCondAE: return HS;
719  }
720  LOG(FATAL) << "Unreachable";
721  UNREACHABLE();
722}
723
724// Maps signed condition to unsigned condition.
725inline Condition ARMUnsignedCondition(IfCondition cond) {
726  switch (cond) {
727    case kCondEQ: return EQ;
728    case kCondNE: return NE;
729    // Signed to unsigned.
730    case kCondLT: return LO;
731    case kCondLE: return LS;
732    case kCondGT: return HI;
733    case kCondGE: return HS;
734    // Unsigned remain unchanged.
735    case kCondB:  return LO;
736    case kCondBE: return LS;
737    case kCondA:  return HI;
738    case kCondAE: return HS;
739  }
740  LOG(FATAL) << "Unreachable";
741  UNREACHABLE();
742}
743
744inline Condition ARMFPCondition(IfCondition cond, bool gt_bias) {
745  // The ARM condition codes can express all the necessary branches, see the
746  // "Meaning (floating-point)" column in the table A8-1 of the ARMv7 reference manual.
747  // There is no dex instruction or HIR that would need the missing conditions
748  // "equal or unordered" or "not equal".
749  switch (cond) {
750    case kCondEQ: return EQ;
751    case kCondNE: return NE /* unordered */;
752    case kCondLT: return gt_bias ? CC : LT /* unordered */;
753    case kCondLE: return gt_bias ? LS : LE /* unordered */;
754    case kCondGT: return gt_bias ? HI /* unordered */ : GT;
755    case kCondGE: return gt_bias ? CS /* unordered */ : GE;
756    default:
757      LOG(FATAL) << "UNREACHABLE";
758      UNREACHABLE();
759  }
760}
761
762void CodeGeneratorARM::DumpCoreRegister(std::ostream& stream, int reg) const {
763  stream << Register(reg);
764}
765
766void CodeGeneratorARM::DumpFloatingPointRegister(std::ostream& stream, int reg) const {
767  stream << SRegister(reg);
768}
769
770size_t CodeGeneratorARM::SaveCoreRegister(size_t stack_index, uint32_t reg_id) {
771  __ StoreToOffset(kStoreWord, static_cast<Register>(reg_id), SP, stack_index);
772  return kArmWordSize;
773}
774
775size_t CodeGeneratorARM::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) {
776  __ LoadFromOffset(kLoadWord, static_cast<Register>(reg_id), SP, stack_index);
777  return kArmWordSize;
778}
779
780size_t CodeGeneratorARM::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) {
781  __ StoreSToOffset(static_cast<SRegister>(reg_id), SP, stack_index);
782  return kArmWordSize;
783}
784
785size_t CodeGeneratorARM::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) {
786  __ LoadSFromOffset(static_cast<SRegister>(reg_id), SP, stack_index);
787  return kArmWordSize;
788}
789
790CodeGeneratorARM::CodeGeneratorARM(HGraph* graph,
791                                   const ArmInstructionSetFeatures& isa_features,
792                                   const CompilerOptions& compiler_options,
793                                   OptimizingCompilerStats* stats)
794    : CodeGenerator(graph,
795                    kNumberOfCoreRegisters,
796                    kNumberOfSRegisters,
797                    kNumberOfRegisterPairs,
798                    ComputeRegisterMask(reinterpret_cast<const int*>(kCoreCalleeSaves),
799                                        arraysize(kCoreCalleeSaves)),
800                    ComputeRegisterMask(reinterpret_cast<const int*>(kFpuCalleeSaves),
801                                        arraysize(kFpuCalleeSaves)),
802                    compiler_options,
803                    stats),
804      block_labels_(nullptr),
805      location_builder_(graph, this),
806      instruction_visitor_(graph, this),
807      move_resolver_(graph->GetArena(), this),
808      assembler_(graph->GetArena()),
809      isa_features_(isa_features),
810      uint32_literals_(std::less<uint32_t>(),
811                       graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
812      method_patches_(MethodReferenceComparator(),
813                      graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
814      call_patches_(MethodReferenceComparator(),
815                    graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
816      relative_call_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
817      pc_relative_dex_cache_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
818      boot_image_string_patches_(StringReferenceValueComparator(),
819                                 graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
820      pc_relative_string_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
821      boot_image_type_patches_(TypeReferenceValueComparator(),
822                               graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
823      pc_relative_type_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
824      boot_image_address_patches_(std::less<uint32_t>(),
825                                  graph->GetArena()->Adapter(kArenaAllocCodeGenerator)) {
826  // Always save the LR register to mimic Quick.
827  AddAllocatedRegister(Location::RegisterLocation(LR));
828}
829
830void CodeGeneratorARM::Finalize(CodeAllocator* allocator) {
831  // Ensure that we fix up branches and literal loads and emit the literal pool.
832  __ FinalizeCode();
833
834  // Adjust native pc offsets in stack maps.
835  for (size_t i = 0, num = stack_map_stream_.GetNumberOfStackMaps(); i != num; ++i) {
836    uint32_t old_position = stack_map_stream_.GetStackMap(i).native_pc_offset;
837    uint32_t new_position = __ GetAdjustedPosition(old_position);
838    stack_map_stream_.SetStackMapNativePcOffset(i, new_position);
839  }
840  // Adjust pc offsets for the disassembly information.
841  if (disasm_info_ != nullptr) {
842    GeneratedCodeInterval* frame_entry_interval = disasm_info_->GetFrameEntryInterval();
843    frame_entry_interval->start = __ GetAdjustedPosition(frame_entry_interval->start);
844    frame_entry_interval->end = __ GetAdjustedPosition(frame_entry_interval->end);
845    for (auto& it : *disasm_info_->GetInstructionIntervals()) {
846      it.second.start = __ GetAdjustedPosition(it.second.start);
847      it.second.end = __ GetAdjustedPosition(it.second.end);
848    }
849    for (auto& it : *disasm_info_->GetSlowPathIntervals()) {
850      it.code_interval.start = __ GetAdjustedPosition(it.code_interval.start);
851      it.code_interval.end = __ GetAdjustedPosition(it.code_interval.end);
852    }
853  }
854
855  CodeGenerator::Finalize(allocator);
856}
857
858void CodeGeneratorARM::SetupBlockedRegisters() const {
859  // Don't allocate the dalvik style register pair passing.
860  blocked_register_pairs_[R1_R2] = true;
861
862  // Stack register, LR and PC are always reserved.
863  blocked_core_registers_[SP] = true;
864  blocked_core_registers_[LR] = true;
865  blocked_core_registers_[PC] = true;
866
867  // Reserve thread register.
868  blocked_core_registers_[TR] = true;
869
870  // Reserve temp register.
871  blocked_core_registers_[IP] = true;
872
873  if (GetGraph()->IsDebuggable()) {
874    // Stubs do not save callee-save floating point registers. If the graph
875    // is debuggable, we need to deal with these registers differently. For
876    // now, just block them.
877    for (size_t i = 0; i < arraysize(kFpuCalleeSaves); ++i) {
878      blocked_fpu_registers_[kFpuCalleeSaves[i]] = true;
879    }
880  }
881
882  UpdateBlockedPairRegisters();
883}
884
885void CodeGeneratorARM::UpdateBlockedPairRegisters() const {
886  for (int i = 0; i < kNumberOfRegisterPairs; i++) {
887    ArmManagedRegister current =
888        ArmManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i));
889    if (blocked_core_registers_[current.AsRegisterPairLow()]
890        || blocked_core_registers_[current.AsRegisterPairHigh()]) {
891      blocked_register_pairs_[i] = true;
892    }
893  }
894}
895
896InstructionCodeGeneratorARM::InstructionCodeGeneratorARM(HGraph* graph, CodeGeneratorARM* codegen)
897      : InstructionCodeGenerator(graph, codegen),
898        assembler_(codegen->GetAssembler()),
899        codegen_(codegen) {}
900
901void CodeGeneratorARM::ComputeSpillMask() {
902  core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_;
903  DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved";
904  // There is no easy instruction to restore just the PC on thumb2. We spill and
905  // restore another arbitrary register.
906  core_spill_mask_ |= (1 << kCoreAlwaysSpillRegister);
907  fpu_spill_mask_ = allocated_registers_.GetFloatingPointRegisters() & fpu_callee_save_mask_;
908  // We use vpush and vpop for saving and restoring floating point registers, which take
909  // a SRegister and the number of registers to save/restore after that SRegister. We
910  // therefore update the `fpu_spill_mask_` to also contain those registers not allocated,
911  // but in the range.
912  if (fpu_spill_mask_ != 0) {
913    uint32_t least_significant_bit = LeastSignificantBit(fpu_spill_mask_);
914    uint32_t most_significant_bit = MostSignificantBit(fpu_spill_mask_);
915    for (uint32_t i = least_significant_bit + 1 ; i < most_significant_bit; ++i) {
916      fpu_spill_mask_ |= (1 << i);
917    }
918  }
919}
920
921static dwarf::Reg DWARFReg(Register reg) {
922  return dwarf::Reg::ArmCore(static_cast<int>(reg));
923}
924
925static dwarf::Reg DWARFReg(SRegister reg) {
926  return dwarf::Reg::ArmFp(static_cast<int>(reg));
927}
928
929void CodeGeneratorARM::GenerateFrameEntry() {
930  bool skip_overflow_check =
931      IsLeafMethod() && !FrameNeedsStackCheck(GetFrameSize(), InstructionSet::kArm);
932  DCHECK(GetCompilerOptions().GetImplicitStackOverflowChecks());
933  __ Bind(&frame_entry_label_);
934
935  if (HasEmptyFrame()) {
936    return;
937  }
938
939  if (!skip_overflow_check) {
940    __ AddConstant(IP, SP, -static_cast<int32_t>(GetStackOverflowReservedBytes(kArm)));
941    __ LoadFromOffset(kLoadWord, IP, IP, 0);
942    RecordPcInfo(nullptr, 0);
943  }
944
945  __ PushList(core_spill_mask_);
946  __ cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(core_spill_mask_));
947  __ cfi().RelOffsetForMany(DWARFReg(kMethodRegisterArgument), 0, core_spill_mask_, kArmWordSize);
948  if (fpu_spill_mask_ != 0) {
949    SRegister start_register = SRegister(LeastSignificantBit(fpu_spill_mask_));
950    __ vpushs(start_register, POPCOUNT(fpu_spill_mask_));
951    __ cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(fpu_spill_mask_));
952    __ cfi().RelOffsetForMany(DWARFReg(S0), 0, fpu_spill_mask_, kArmWordSize);
953  }
954  int adjust = GetFrameSize() - FrameEntrySpillSize();
955  __ AddConstant(SP, -adjust);
956  __ cfi().AdjustCFAOffset(adjust);
957  __ StoreToOffset(kStoreWord, kMethodRegisterArgument, SP, 0);
958}
959
960void CodeGeneratorARM::GenerateFrameExit() {
961  if (HasEmptyFrame()) {
962    __ bx(LR);
963    return;
964  }
965  __ cfi().RememberState();
966  int adjust = GetFrameSize() - FrameEntrySpillSize();
967  __ AddConstant(SP, adjust);
968  __ cfi().AdjustCFAOffset(-adjust);
969  if (fpu_spill_mask_ != 0) {
970    SRegister start_register = SRegister(LeastSignificantBit(fpu_spill_mask_));
971    __ vpops(start_register, POPCOUNT(fpu_spill_mask_));
972    __ cfi().AdjustCFAOffset(-static_cast<int>(kArmPointerSize) * POPCOUNT(fpu_spill_mask_));
973    __ cfi().RestoreMany(DWARFReg(SRegister(0)), fpu_spill_mask_);
974  }
975  // Pop LR into PC to return.
976  DCHECK_NE(core_spill_mask_ & (1 << LR), 0U);
977  uint32_t pop_mask = (core_spill_mask_ & (~(1 << LR))) | 1 << PC;
978  __ PopList(pop_mask);
979  __ cfi().RestoreState();
980  __ cfi().DefCFAOffset(GetFrameSize());
981}
982
983void CodeGeneratorARM::Bind(HBasicBlock* block) {
984  Label* label = GetLabelOf(block);
985  __ BindTrackedLabel(label);
986}
987
988Location InvokeDexCallingConventionVisitorARM::GetNextLocation(Primitive::Type type) {
989  switch (type) {
990    case Primitive::kPrimBoolean:
991    case Primitive::kPrimByte:
992    case Primitive::kPrimChar:
993    case Primitive::kPrimShort:
994    case Primitive::kPrimInt:
995    case Primitive::kPrimNot: {
996      uint32_t index = gp_index_++;
997      uint32_t stack_index = stack_index_++;
998      if (index < calling_convention.GetNumberOfRegisters()) {
999        return Location::RegisterLocation(calling_convention.GetRegisterAt(index));
1000      } else {
1001        return Location::StackSlot(calling_convention.GetStackOffsetOf(stack_index));
1002      }
1003    }
1004
1005    case Primitive::kPrimLong: {
1006      uint32_t index = gp_index_;
1007      uint32_t stack_index = stack_index_;
1008      gp_index_ += 2;
1009      stack_index_ += 2;
1010      if (index + 1 < calling_convention.GetNumberOfRegisters()) {
1011        if (calling_convention.GetRegisterAt(index) == R1) {
1012          // Skip R1, and use R2_R3 instead.
1013          gp_index_++;
1014          index++;
1015        }
1016      }
1017      if (index + 1 < calling_convention.GetNumberOfRegisters()) {
1018        DCHECK_EQ(calling_convention.GetRegisterAt(index) + 1,
1019                  calling_convention.GetRegisterAt(index + 1));
1020
1021        return Location::RegisterPairLocation(calling_convention.GetRegisterAt(index),
1022                                              calling_convention.GetRegisterAt(index + 1));
1023      } else {
1024        return Location::DoubleStackSlot(calling_convention.GetStackOffsetOf(stack_index));
1025      }
1026    }
1027
1028    case Primitive::kPrimFloat: {
1029      uint32_t stack_index = stack_index_++;
1030      if (float_index_ % 2 == 0) {
1031        float_index_ = std::max(double_index_, float_index_);
1032      }
1033      if (float_index_ < calling_convention.GetNumberOfFpuRegisters()) {
1034        return Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(float_index_++));
1035      } else {
1036        return Location::StackSlot(calling_convention.GetStackOffsetOf(stack_index));
1037      }
1038    }
1039
1040    case Primitive::kPrimDouble: {
1041      double_index_ = std::max(double_index_, RoundUp(float_index_, 2));
1042      uint32_t stack_index = stack_index_;
1043      stack_index_ += 2;
1044      if (double_index_ + 1 < calling_convention.GetNumberOfFpuRegisters()) {
1045        uint32_t index = double_index_;
1046        double_index_ += 2;
1047        Location result = Location::FpuRegisterPairLocation(
1048          calling_convention.GetFpuRegisterAt(index),
1049          calling_convention.GetFpuRegisterAt(index + 1));
1050        DCHECK(ExpectedPairLayout(result));
1051        return result;
1052      } else {
1053        return Location::DoubleStackSlot(calling_convention.GetStackOffsetOf(stack_index));
1054      }
1055    }
1056
1057    case Primitive::kPrimVoid:
1058      LOG(FATAL) << "Unexpected parameter type " << type;
1059      break;
1060  }
1061  return Location::NoLocation();
1062}
1063
1064Location InvokeDexCallingConventionVisitorARM::GetReturnLocation(Primitive::Type type) const {
1065  switch (type) {
1066    case Primitive::kPrimBoolean:
1067    case Primitive::kPrimByte:
1068    case Primitive::kPrimChar:
1069    case Primitive::kPrimShort:
1070    case Primitive::kPrimInt:
1071    case Primitive::kPrimNot: {
1072      return Location::RegisterLocation(R0);
1073    }
1074
1075    case Primitive::kPrimFloat: {
1076      return Location::FpuRegisterLocation(S0);
1077    }
1078
1079    case Primitive::kPrimLong: {
1080      return Location::RegisterPairLocation(R0, R1);
1081    }
1082
1083    case Primitive::kPrimDouble: {
1084      return Location::FpuRegisterPairLocation(S0, S1);
1085    }
1086
1087    case Primitive::kPrimVoid:
1088      return Location::NoLocation();
1089  }
1090
1091  UNREACHABLE();
1092}
1093
1094Location InvokeDexCallingConventionVisitorARM::GetMethodLocation() const {
1095  return Location::RegisterLocation(kMethodRegisterArgument);
1096}
1097
1098void CodeGeneratorARM::Move32(Location destination, Location source) {
1099  if (source.Equals(destination)) {
1100    return;
1101  }
1102  if (destination.IsRegister()) {
1103    if (source.IsRegister()) {
1104      __ Mov(destination.AsRegister<Register>(), source.AsRegister<Register>());
1105    } else if (source.IsFpuRegister()) {
1106      __ vmovrs(destination.AsRegister<Register>(), source.AsFpuRegister<SRegister>());
1107    } else {
1108      __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex());
1109    }
1110  } else if (destination.IsFpuRegister()) {
1111    if (source.IsRegister()) {
1112      __ vmovsr(destination.AsFpuRegister<SRegister>(), source.AsRegister<Register>());
1113    } else if (source.IsFpuRegister()) {
1114      __ vmovs(destination.AsFpuRegister<SRegister>(), source.AsFpuRegister<SRegister>());
1115    } else {
1116      __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex());
1117    }
1118  } else {
1119    DCHECK(destination.IsStackSlot()) << destination;
1120    if (source.IsRegister()) {
1121      __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), SP, destination.GetStackIndex());
1122    } else if (source.IsFpuRegister()) {
1123      __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex());
1124    } else {
1125      DCHECK(source.IsStackSlot()) << source;
1126      __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex());
1127      __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
1128    }
1129  }
1130}
1131
1132void CodeGeneratorARM::Move64(Location destination, Location source) {
1133  if (source.Equals(destination)) {
1134    return;
1135  }
1136  if (destination.IsRegisterPair()) {
1137    if (source.IsRegisterPair()) {
1138      EmitParallelMoves(
1139          Location::RegisterLocation(source.AsRegisterPairHigh<Register>()),
1140          Location::RegisterLocation(destination.AsRegisterPairHigh<Register>()),
1141          Primitive::kPrimInt,
1142          Location::RegisterLocation(source.AsRegisterPairLow<Register>()),
1143          Location::RegisterLocation(destination.AsRegisterPairLow<Register>()),
1144          Primitive::kPrimInt);
1145    } else if (source.IsFpuRegister()) {
1146      UNIMPLEMENTED(FATAL);
1147    } else if (source.IsFpuRegisterPair()) {
1148      __ vmovrrd(destination.AsRegisterPairLow<Register>(),
1149                 destination.AsRegisterPairHigh<Register>(),
1150                 FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()));
1151    } else {
1152      DCHECK(source.IsDoubleStackSlot());
1153      DCHECK(ExpectedPairLayout(destination));
1154      __ LoadFromOffset(kLoadWordPair, destination.AsRegisterPairLow<Register>(),
1155                        SP, source.GetStackIndex());
1156    }
1157  } else if (destination.IsFpuRegisterPair()) {
1158    if (source.IsDoubleStackSlot()) {
1159      __ LoadDFromOffset(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
1160                         SP,
1161                         source.GetStackIndex());
1162    } else if (source.IsRegisterPair()) {
1163      __ vmovdrr(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
1164                 source.AsRegisterPairLow<Register>(),
1165                 source.AsRegisterPairHigh<Register>());
1166    } else {
1167      UNIMPLEMENTED(FATAL);
1168    }
1169  } else {
1170    DCHECK(destination.IsDoubleStackSlot());
1171    if (source.IsRegisterPair()) {
1172      // No conflict possible, so just do the moves.
1173      if (source.AsRegisterPairLow<Register>() == R1) {
1174        DCHECK_EQ(source.AsRegisterPairHigh<Register>(), R2);
1175        __ StoreToOffset(kStoreWord, R1, SP, destination.GetStackIndex());
1176        __ StoreToOffset(kStoreWord, R2, SP, destination.GetHighStackIndex(kArmWordSize));
1177      } else {
1178        __ StoreToOffset(kStoreWordPair, source.AsRegisterPairLow<Register>(),
1179                         SP, destination.GetStackIndex());
1180      }
1181    } else if (source.IsFpuRegisterPair()) {
1182      __ StoreDToOffset(FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()),
1183                        SP,
1184                        destination.GetStackIndex());
1185    } else {
1186      DCHECK(source.IsDoubleStackSlot());
1187      EmitParallelMoves(
1188          Location::StackSlot(source.GetStackIndex()),
1189          Location::StackSlot(destination.GetStackIndex()),
1190          Primitive::kPrimInt,
1191          Location::StackSlot(source.GetHighStackIndex(kArmWordSize)),
1192          Location::StackSlot(destination.GetHighStackIndex(kArmWordSize)),
1193          Primitive::kPrimInt);
1194    }
1195  }
1196}
1197
1198void CodeGeneratorARM::MoveConstant(Location location, int32_t value) {
1199  DCHECK(location.IsRegister());
1200  __ LoadImmediate(location.AsRegister<Register>(), value);
1201}
1202
1203void CodeGeneratorARM::MoveLocation(Location dst, Location src, Primitive::Type dst_type) {
1204  HParallelMove move(GetGraph()->GetArena());
1205  move.AddMove(src, dst, dst_type, nullptr);
1206  GetMoveResolver()->EmitNativeCode(&move);
1207}
1208
1209void CodeGeneratorARM::AddLocationAsTemp(Location location, LocationSummary* locations) {
1210  if (location.IsRegister()) {
1211    locations->AddTemp(location);
1212  } else if (location.IsRegisterPair()) {
1213    locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairLow<Register>()));
1214    locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairHigh<Register>()));
1215  } else {
1216    UNIMPLEMENTED(FATAL) << "AddLocationAsTemp not implemented for location " << location;
1217  }
1218}
1219
1220void CodeGeneratorARM::InvokeRuntime(QuickEntrypointEnum entrypoint,
1221                                     HInstruction* instruction,
1222                                     uint32_t dex_pc,
1223                                     SlowPathCode* slow_path) {
1224  InvokeRuntime(GetThreadOffset<kArmPointerSize>(entrypoint).Int32Value(),
1225                instruction,
1226                dex_pc,
1227                slow_path);
1228}
1229
1230void CodeGeneratorARM::InvokeRuntime(int32_t entry_point_offset,
1231                                     HInstruction* instruction,
1232                                     uint32_t dex_pc,
1233                                     SlowPathCode* slow_path) {
1234  ValidateInvokeRuntime(instruction, slow_path);
1235  __ LoadFromOffset(kLoadWord, LR, TR, entry_point_offset);
1236  __ blx(LR);
1237  RecordPcInfo(instruction, dex_pc, slow_path);
1238}
1239
1240void CodeGeneratorARM::InvokeRuntimeWithoutRecordingPcInfo(int32_t entry_point_offset,
1241                                                           HInstruction* instruction,
1242                                                           SlowPathCode* slow_path) {
1243  ValidateInvokeRuntimeWithoutRecordingPcInfo(instruction, slow_path);
1244  __ LoadFromOffset(kLoadWord, LR, TR, entry_point_offset);
1245  __ blx(LR);
1246}
1247
1248void InstructionCodeGeneratorARM::HandleGoto(HInstruction* got, HBasicBlock* successor) {
1249  DCHECK(!successor->IsExitBlock());
1250
1251  HBasicBlock* block = got->GetBlock();
1252  HInstruction* previous = got->GetPrevious();
1253
1254  HLoopInformation* info = block->GetLoopInformation();
1255  if (info != nullptr && info->IsBackEdge(*block) && info->HasSuspendCheck()) {
1256    codegen_->ClearSpillSlotsFromLoopPhisInStackMap(info->GetSuspendCheck());
1257    GenerateSuspendCheck(info->GetSuspendCheck(), successor);
1258    return;
1259  }
1260
1261  if (block->IsEntryBlock() && (previous != nullptr) && previous->IsSuspendCheck()) {
1262    GenerateSuspendCheck(previous->AsSuspendCheck(), nullptr);
1263  }
1264  if (!codegen_->GoesToNextBlock(got->GetBlock(), successor)) {
1265    __ b(codegen_->GetLabelOf(successor));
1266  }
1267}
1268
1269void LocationsBuilderARM::VisitGoto(HGoto* got) {
1270  got->SetLocations(nullptr);
1271}
1272
1273void InstructionCodeGeneratorARM::VisitGoto(HGoto* got) {
1274  HandleGoto(got, got->GetSuccessor());
1275}
1276
1277void LocationsBuilderARM::VisitTryBoundary(HTryBoundary* try_boundary) {
1278  try_boundary->SetLocations(nullptr);
1279}
1280
1281void InstructionCodeGeneratorARM::VisitTryBoundary(HTryBoundary* try_boundary) {
1282  HBasicBlock* successor = try_boundary->GetNormalFlowSuccessor();
1283  if (!successor->IsExitBlock()) {
1284    HandleGoto(try_boundary, successor);
1285  }
1286}
1287
1288void LocationsBuilderARM::VisitExit(HExit* exit) {
1289  exit->SetLocations(nullptr);
1290}
1291
1292void InstructionCodeGeneratorARM::VisitExit(HExit* exit ATTRIBUTE_UNUSED) {
1293}
1294
1295void InstructionCodeGeneratorARM::GenerateVcmp(HInstruction* instruction) {
1296  Primitive::Type type = instruction->InputAt(0)->GetType();
1297  Location lhs_loc = instruction->GetLocations()->InAt(0);
1298  Location rhs_loc = instruction->GetLocations()->InAt(1);
1299  if (rhs_loc.IsConstant()) {
1300    // 0.0 is the only immediate that can be encoded directly in
1301    // a VCMP instruction.
1302    //
1303    // Both the JLS (section 15.20.1) and the JVMS (section 6.5)
1304    // specify that in a floating-point comparison, positive zero
1305    // and negative zero are considered equal, so we can use the
1306    // literal 0.0 for both cases here.
1307    //
1308    // Note however that some methods (Float.equal, Float.compare,
1309    // Float.compareTo, Double.equal, Double.compare,
1310    // Double.compareTo, Math.max, Math.min, StrictMath.max,
1311    // StrictMath.min) consider 0.0 to be (strictly) greater than
1312    // -0.0. So if we ever translate calls to these methods into a
1313    // HCompare instruction, we must handle the -0.0 case with
1314    // care here.
1315    DCHECK(rhs_loc.GetConstant()->IsArithmeticZero());
1316    if (type == Primitive::kPrimFloat) {
1317      __ vcmpsz(lhs_loc.AsFpuRegister<SRegister>());
1318    } else {
1319      DCHECK_EQ(type, Primitive::kPrimDouble);
1320      __ vcmpdz(FromLowSToD(lhs_loc.AsFpuRegisterPairLow<SRegister>()));
1321    }
1322  } else {
1323    if (type == Primitive::kPrimFloat) {
1324      __ vcmps(lhs_loc.AsFpuRegister<SRegister>(), rhs_loc.AsFpuRegister<SRegister>());
1325    } else {
1326      DCHECK_EQ(type, Primitive::kPrimDouble);
1327      __ vcmpd(FromLowSToD(lhs_loc.AsFpuRegisterPairLow<SRegister>()),
1328               FromLowSToD(rhs_loc.AsFpuRegisterPairLow<SRegister>()));
1329    }
1330  }
1331}
1332
1333void InstructionCodeGeneratorARM::GenerateFPJumps(HCondition* cond,
1334                                                  Label* true_label,
1335                                                  Label* false_label ATTRIBUTE_UNUSED) {
1336  __ vmstat();  // transfer FP status register to ARM APSR.
1337  __ b(true_label, ARMFPCondition(cond->GetCondition(), cond->IsGtBias()));
1338}
1339
1340void InstructionCodeGeneratorARM::GenerateLongComparesAndJumps(HCondition* cond,
1341                                                               Label* true_label,
1342                                                               Label* false_label) {
1343  LocationSummary* locations = cond->GetLocations();
1344  Location left = locations->InAt(0);
1345  Location right = locations->InAt(1);
1346  IfCondition if_cond = cond->GetCondition();
1347
1348  Register left_high = left.AsRegisterPairHigh<Register>();
1349  Register left_low = left.AsRegisterPairLow<Register>();
1350  IfCondition true_high_cond = if_cond;
1351  IfCondition false_high_cond = cond->GetOppositeCondition();
1352  Condition final_condition = ARMUnsignedCondition(if_cond);  // unsigned on lower part
1353
1354  // Set the conditions for the test, remembering that == needs to be
1355  // decided using the low words.
1356  // TODO: consider avoiding jumps with temporary and CMP low+SBC high
1357  switch (if_cond) {
1358    case kCondEQ:
1359    case kCondNE:
1360      // Nothing to do.
1361      break;
1362    case kCondLT:
1363      false_high_cond = kCondGT;
1364      break;
1365    case kCondLE:
1366      true_high_cond = kCondLT;
1367      break;
1368    case kCondGT:
1369      false_high_cond = kCondLT;
1370      break;
1371    case kCondGE:
1372      true_high_cond = kCondGT;
1373      break;
1374    case kCondB:
1375      false_high_cond = kCondA;
1376      break;
1377    case kCondBE:
1378      true_high_cond = kCondB;
1379      break;
1380    case kCondA:
1381      false_high_cond = kCondB;
1382      break;
1383    case kCondAE:
1384      true_high_cond = kCondA;
1385      break;
1386  }
1387  if (right.IsConstant()) {
1388    int64_t value = right.GetConstant()->AsLongConstant()->GetValue();
1389    int32_t val_low = Low32Bits(value);
1390    int32_t val_high = High32Bits(value);
1391
1392    __ CmpConstant(left_high, val_high);
1393    if (if_cond == kCondNE) {
1394      __ b(true_label, ARMCondition(true_high_cond));
1395    } else if (if_cond == kCondEQ) {
1396      __ b(false_label, ARMCondition(false_high_cond));
1397    } else {
1398      __ b(true_label, ARMCondition(true_high_cond));
1399      __ b(false_label, ARMCondition(false_high_cond));
1400    }
1401    // Must be equal high, so compare the lows.
1402    __ CmpConstant(left_low, val_low);
1403  } else {
1404    Register right_high = right.AsRegisterPairHigh<Register>();
1405    Register right_low = right.AsRegisterPairLow<Register>();
1406
1407    __ cmp(left_high, ShifterOperand(right_high));
1408    if (if_cond == kCondNE) {
1409      __ b(true_label, ARMCondition(true_high_cond));
1410    } else if (if_cond == kCondEQ) {
1411      __ b(false_label, ARMCondition(false_high_cond));
1412    } else {
1413      __ b(true_label, ARMCondition(true_high_cond));
1414      __ b(false_label, ARMCondition(false_high_cond));
1415    }
1416    // Must be equal high, so compare the lows.
1417    __ cmp(left_low, ShifterOperand(right_low));
1418  }
1419  // The last comparison might be unsigned.
1420  // TODO: optimize cases where this is always true/false
1421  __ b(true_label, final_condition);
1422}
1423
1424void InstructionCodeGeneratorARM::GenerateCompareTestAndBranch(HCondition* condition,
1425                                                               Label* true_target_in,
1426                                                               Label* false_target_in) {
1427  // Generated branching requires both targets to be explicit. If either of the
1428  // targets is nullptr (fallthrough) use and bind `fallthrough_target` instead.
1429  Label fallthrough_target;
1430  Label* true_target = true_target_in == nullptr ? &fallthrough_target : true_target_in;
1431  Label* false_target = false_target_in == nullptr ? &fallthrough_target : false_target_in;
1432
1433  Primitive::Type type = condition->InputAt(0)->GetType();
1434  switch (type) {
1435    case Primitive::kPrimLong:
1436      GenerateLongComparesAndJumps(condition, true_target, false_target);
1437      break;
1438    case Primitive::kPrimFloat:
1439    case Primitive::kPrimDouble:
1440      GenerateVcmp(condition);
1441      GenerateFPJumps(condition, true_target, false_target);
1442      break;
1443    default:
1444      LOG(FATAL) << "Unexpected compare type " << type;
1445  }
1446
1447  if (false_target != &fallthrough_target) {
1448    __ b(false_target);
1449  }
1450
1451  if (fallthrough_target.IsLinked()) {
1452    __ Bind(&fallthrough_target);
1453  }
1454}
1455
1456void InstructionCodeGeneratorARM::GenerateTestAndBranch(HInstruction* instruction,
1457                                                        size_t condition_input_index,
1458                                                        Label* true_target,
1459                                                        Label* false_target) {
1460  HInstruction* cond = instruction->InputAt(condition_input_index);
1461
1462  if (true_target == nullptr && false_target == nullptr) {
1463    // Nothing to do. The code always falls through.
1464    return;
1465  } else if (cond->IsIntConstant()) {
1466    // Constant condition, statically compared against "true" (integer value 1).
1467    if (cond->AsIntConstant()->IsTrue()) {
1468      if (true_target != nullptr) {
1469        __ b(true_target);
1470      }
1471    } else {
1472      DCHECK(cond->AsIntConstant()->IsFalse()) << cond->AsIntConstant()->GetValue();
1473      if (false_target != nullptr) {
1474        __ b(false_target);
1475      }
1476    }
1477    return;
1478  }
1479
1480  // The following code generates these patterns:
1481  //  (1) true_target == nullptr && false_target != nullptr
1482  //        - opposite condition true => branch to false_target
1483  //  (2) true_target != nullptr && false_target == nullptr
1484  //        - condition true => branch to true_target
1485  //  (3) true_target != nullptr && false_target != nullptr
1486  //        - condition true => branch to true_target
1487  //        - branch to false_target
1488  if (IsBooleanValueOrMaterializedCondition(cond)) {
1489    // Condition has been materialized, compare the output to 0.
1490    Location cond_val = instruction->GetLocations()->InAt(condition_input_index);
1491    DCHECK(cond_val.IsRegister());
1492    if (true_target == nullptr) {
1493      __ CompareAndBranchIfZero(cond_val.AsRegister<Register>(), false_target);
1494    } else {
1495      __ CompareAndBranchIfNonZero(cond_val.AsRegister<Register>(), true_target);
1496    }
1497  } else {
1498    // Condition has not been materialized. Use its inputs as the comparison and
1499    // its condition as the branch condition.
1500    HCondition* condition = cond->AsCondition();
1501
1502    // If this is a long or FP comparison that has been folded into
1503    // the HCondition, generate the comparison directly.
1504    Primitive::Type type = condition->InputAt(0)->GetType();
1505    if (type == Primitive::kPrimLong || Primitive::IsFloatingPointType(type)) {
1506      GenerateCompareTestAndBranch(condition, true_target, false_target);
1507      return;
1508    }
1509
1510    LocationSummary* locations = cond->GetLocations();
1511    DCHECK(locations->InAt(0).IsRegister());
1512    Register left = locations->InAt(0).AsRegister<Register>();
1513    Location right = locations->InAt(1);
1514    if (right.IsRegister()) {
1515      __ cmp(left, ShifterOperand(right.AsRegister<Register>()));
1516    } else {
1517      DCHECK(right.IsConstant());
1518      __ CmpConstant(left, CodeGenerator::GetInt32ValueOf(right.GetConstant()));
1519    }
1520    if (true_target == nullptr) {
1521      __ b(false_target, ARMCondition(condition->GetOppositeCondition()));
1522    } else {
1523      __ b(true_target, ARMCondition(condition->GetCondition()));
1524    }
1525  }
1526
1527  // If neither branch falls through (case 3), the conditional branch to `true_target`
1528  // was already emitted (case 2) and we need to emit a jump to `false_target`.
1529  if (true_target != nullptr && false_target != nullptr) {
1530    __ b(false_target);
1531  }
1532}
1533
1534void LocationsBuilderARM::VisitIf(HIf* if_instr) {
1535  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(if_instr);
1536  if (IsBooleanValueOrMaterializedCondition(if_instr->InputAt(0))) {
1537    locations->SetInAt(0, Location::RequiresRegister());
1538  }
1539}
1540
1541void InstructionCodeGeneratorARM::VisitIf(HIf* if_instr) {
1542  HBasicBlock* true_successor = if_instr->IfTrueSuccessor();
1543  HBasicBlock* false_successor = if_instr->IfFalseSuccessor();
1544  Label* true_target = codegen_->GoesToNextBlock(if_instr->GetBlock(), true_successor) ?
1545      nullptr : codegen_->GetLabelOf(true_successor);
1546  Label* false_target = codegen_->GoesToNextBlock(if_instr->GetBlock(), false_successor) ?
1547      nullptr : codegen_->GetLabelOf(false_successor);
1548  GenerateTestAndBranch(if_instr, /* condition_input_index */ 0, true_target, false_target);
1549}
1550
1551void LocationsBuilderARM::VisitDeoptimize(HDeoptimize* deoptimize) {
1552  LocationSummary* locations = new (GetGraph()->GetArena())
1553      LocationSummary(deoptimize, LocationSummary::kCallOnSlowPath);
1554  if (IsBooleanValueOrMaterializedCondition(deoptimize->InputAt(0))) {
1555    locations->SetInAt(0, Location::RequiresRegister());
1556  }
1557}
1558
1559void InstructionCodeGeneratorARM::VisitDeoptimize(HDeoptimize* deoptimize) {
1560  SlowPathCode* slow_path = deopt_slow_paths_.NewSlowPath<DeoptimizationSlowPathARM>(deoptimize);
1561  GenerateTestAndBranch(deoptimize,
1562                        /* condition_input_index */ 0,
1563                        slow_path->GetEntryLabel(),
1564                        /* false_target */ nullptr);
1565}
1566
1567void LocationsBuilderARM::VisitSelect(HSelect* select) {
1568  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(select);
1569  if (Primitive::IsFloatingPointType(select->GetType())) {
1570    locations->SetInAt(0, Location::RequiresFpuRegister());
1571    locations->SetInAt(1, Location::RequiresFpuRegister());
1572  } else {
1573    locations->SetInAt(0, Location::RequiresRegister());
1574    locations->SetInAt(1, Location::RequiresRegister());
1575  }
1576  if (IsBooleanValueOrMaterializedCondition(select->GetCondition())) {
1577    locations->SetInAt(2, Location::RequiresRegister());
1578  }
1579  locations->SetOut(Location::SameAsFirstInput());
1580}
1581
1582void InstructionCodeGeneratorARM::VisitSelect(HSelect* select) {
1583  LocationSummary* locations = select->GetLocations();
1584  Label false_target;
1585  GenerateTestAndBranch(select,
1586                        /* condition_input_index */ 2,
1587                        /* true_target */ nullptr,
1588                        &false_target);
1589  codegen_->MoveLocation(locations->Out(), locations->InAt(1), select->GetType());
1590  __ Bind(&false_target);
1591}
1592
1593void LocationsBuilderARM::VisitNativeDebugInfo(HNativeDebugInfo* info) {
1594  new (GetGraph()->GetArena()) LocationSummary(info);
1595}
1596
1597void InstructionCodeGeneratorARM::VisitNativeDebugInfo(HNativeDebugInfo*) {
1598  // MaybeRecordNativeDebugInfo is already called implicitly in CodeGenerator::Compile.
1599}
1600
1601void CodeGeneratorARM::GenerateNop() {
1602  __ nop();
1603}
1604
1605void LocationsBuilderARM::HandleCondition(HCondition* cond) {
1606  LocationSummary* locations =
1607      new (GetGraph()->GetArena()) LocationSummary(cond, LocationSummary::kNoCall);
1608  // Handle the long/FP comparisons made in instruction simplification.
1609  switch (cond->InputAt(0)->GetType()) {
1610    case Primitive::kPrimLong:
1611      locations->SetInAt(0, Location::RequiresRegister());
1612      locations->SetInAt(1, Location::RegisterOrConstant(cond->InputAt(1)));
1613      if (!cond->IsEmittedAtUseSite()) {
1614        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1615      }
1616      break;
1617
1618    case Primitive::kPrimFloat:
1619    case Primitive::kPrimDouble:
1620      locations->SetInAt(0, Location::RequiresFpuRegister());
1621      locations->SetInAt(1, ArithmeticZeroOrFpuRegister(cond->InputAt(1)));
1622      if (!cond->IsEmittedAtUseSite()) {
1623        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
1624      }
1625      break;
1626
1627    default:
1628      locations->SetInAt(0, Location::RequiresRegister());
1629      locations->SetInAt(1, Location::RegisterOrConstant(cond->InputAt(1)));
1630      if (!cond->IsEmittedAtUseSite()) {
1631        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
1632      }
1633  }
1634}
1635
1636void InstructionCodeGeneratorARM::HandleCondition(HCondition* cond) {
1637  if (cond->IsEmittedAtUseSite()) {
1638    return;
1639  }
1640
1641  LocationSummary* locations = cond->GetLocations();
1642  Location left = locations->InAt(0);
1643  Location right = locations->InAt(1);
1644  Register out = locations->Out().AsRegister<Register>();
1645  Label true_label, false_label;
1646
1647  switch (cond->InputAt(0)->GetType()) {
1648    default: {
1649      // Integer case.
1650      if (right.IsRegister()) {
1651        __ cmp(left.AsRegister<Register>(), ShifterOperand(right.AsRegister<Register>()));
1652      } else {
1653        DCHECK(right.IsConstant());
1654        __ CmpConstant(left.AsRegister<Register>(),
1655                       CodeGenerator::GetInt32ValueOf(right.GetConstant()));
1656      }
1657      __ it(ARMCondition(cond->GetCondition()), kItElse);
1658      __ mov(locations->Out().AsRegister<Register>(), ShifterOperand(1),
1659             ARMCondition(cond->GetCondition()));
1660      __ mov(locations->Out().AsRegister<Register>(), ShifterOperand(0),
1661             ARMCondition(cond->GetOppositeCondition()));
1662      return;
1663    }
1664    case Primitive::kPrimLong:
1665      GenerateLongComparesAndJumps(cond, &true_label, &false_label);
1666      break;
1667    case Primitive::kPrimFloat:
1668    case Primitive::kPrimDouble:
1669      GenerateVcmp(cond);
1670      GenerateFPJumps(cond, &true_label, &false_label);
1671      break;
1672  }
1673
1674  // Convert the jumps into the result.
1675  Label done_label;
1676
1677  // False case: result = 0.
1678  __ Bind(&false_label);
1679  __ LoadImmediate(out, 0);
1680  __ b(&done_label);
1681
1682  // True case: result = 1.
1683  __ Bind(&true_label);
1684  __ LoadImmediate(out, 1);
1685  __ Bind(&done_label);
1686}
1687
1688void LocationsBuilderARM::VisitEqual(HEqual* comp) {
1689  HandleCondition(comp);
1690}
1691
1692void InstructionCodeGeneratorARM::VisitEqual(HEqual* comp) {
1693  HandleCondition(comp);
1694}
1695
1696void LocationsBuilderARM::VisitNotEqual(HNotEqual* comp) {
1697  HandleCondition(comp);
1698}
1699
1700void InstructionCodeGeneratorARM::VisitNotEqual(HNotEqual* comp) {
1701  HandleCondition(comp);
1702}
1703
1704void LocationsBuilderARM::VisitLessThan(HLessThan* comp) {
1705  HandleCondition(comp);
1706}
1707
1708void InstructionCodeGeneratorARM::VisitLessThan(HLessThan* comp) {
1709  HandleCondition(comp);
1710}
1711
1712void LocationsBuilderARM::VisitLessThanOrEqual(HLessThanOrEqual* comp) {
1713  HandleCondition(comp);
1714}
1715
1716void InstructionCodeGeneratorARM::VisitLessThanOrEqual(HLessThanOrEqual* comp) {
1717  HandleCondition(comp);
1718}
1719
1720void LocationsBuilderARM::VisitGreaterThan(HGreaterThan* comp) {
1721  HandleCondition(comp);
1722}
1723
1724void InstructionCodeGeneratorARM::VisitGreaterThan(HGreaterThan* comp) {
1725  HandleCondition(comp);
1726}
1727
1728void LocationsBuilderARM::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) {
1729  HandleCondition(comp);
1730}
1731
1732void InstructionCodeGeneratorARM::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) {
1733  HandleCondition(comp);
1734}
1735
1736void LocationsBuilderARM::VisitBelow(HBelow* comp) {
1737  HandleCondition(comp);
1738}
1739
1740void InstructionCodeGeneratorARM::VisitBelow(HBelow* comp) {
1741  HandleCondition(comp);
1742}
1743
1744void LocationsBuilderARM::VisitBelowOrEqual(HBelowOrEqual* comp) {
1745  HandleCondition(comp);
1746}
1747
1748void InstructionCodeGeneratorARM::VisitBelowOrEqual(HBelowOrEqual* comp) {
1749  HandleCondition(comp);
1750}
1751
1752void LocationsBuilderARM::VisitAbove(HAbove* comp) {
1753  HandleCondition(comp);
1754}
1755
1756void InstructionCodeGeneratorARM::VisitAbove(HAbove* comp) {
1757  HandleCondition(comp);
1758}
1759
1760void LocationsBuilderARM::VisitAboveOrEqual(HAboveOrEqual* comp) {
1761  HandleCondition(comp);
1762}
1763
1764void InstructionCodeGeneratorARM::VisitAboveOrEqual(HAboveOrEqual* comp) {
1765  HandleCondition(comp);
1766}
1767
1768void LocationsBuilderARM::VisitIntConstant(HIntConstant* constant) {
1769  LocationSummary* locations =
1770      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1771  locations->SetOut(Location::ConstantLocation(constant));
1772}
1773
1774void InstructionCodeGeneratorARM::VisitIntConstant(HIntConstant* constant ATTRIBUTE_UNUSED) {
1775  // Will be generated at use site.
1776}
1777
1778void LocationsBuilderARM::VisitNullConstant(HNullConstant* constant) {
1779  LocationSummary* locations =
1780      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1781  locations->SetOut(Location::ConstantLocation(constant));
1782}
1783
1784void InstructionCodeGeneratorARM::VisitNullConstant(HNullConstant* constant ATTRIBUTE_UNUSED) {
1785  // Will be generated at use site.
1786}
1787
1788void LocationsBuilderARM::VisitLongConstant(HLongConstant* constant) {
1789  LocationSummary* locations =
1790      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1791  locations->SetOut(Location::ConstantLocation(constant));
1792}
1793
1794void InstructionCodeGeneratorARM::VisitLongConstant(HLongConstant* constant ATTRIBUTE_UNUSED) {
1795  // Will be generated at use site.
1796}
1797
1798void LocationsBuilderARM::VisitFloatConstant(HFloatConstant* constant) {
1799  LocationSummary* locations =
1800      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1801  locations->SetOut(Location::ConstantLocation(constant));
1802}
1803
1804void InstructionCodeGeneratorARM::VisitFloatConstant(HFloatConstant* constant ATTRIBUTE_UNUSED) {
1805  // Will be generated at use site.
1806}
1807
1808void LocationsBuilderARM::VisitDoubleConstant(HDoubleConstant* constant) {
1809  LocationSummary* locations =
1810      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1811  locations->SetOut(Location::ConstantLocation(constant));
1812}
1813
1814void InstructionCodeGeneratorARM::VisitDoubleConstant(HDoubleConstant* constant ATTRIBUTE_UNUSED) {
1815  // Will be generated at use site.
1816}
1817
1818void LocationsBuilderARM::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) {
1819  memory_barrier->SetLocations(nullptr);
1820}
1821
1822void InstructionCodeGeneratorARM::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) {
1823  codegen_->GenerateMemoryBarrier(memory_barrier->GetBarrierKind());
1824}
1825
1826void LocationsBuilderARM::VisitReturnVoid(HReturnVoid* ret) {
1827  ret->SetLocations(nullptr);
1828}
1829
1830void InstructionCodeGeneratorARM::VisitReturnVoid(HReturnVoid* ret ATTRIBUTE_UNUSED) {
1831  codegen_->GenerateFrameExit();
1832}
1833
1834void LocationsBuilderARM::VisitReturn(HReturn* ret) {
1835  LocationSummary* locations =
1836      new (GetGraph()->GetArena()) LocationSummary(ret, LocationSummary::kNoCall);
1837  locations->SetInAt(0, parameter_visitor_.GetReturnLocation(ret->InputAt(0)->GetType()));
1838}
1839
1840void InstructionCodeGeneratorARM::VisitReturn(HReturn* ret ATTRIBUTE_UNUSED) {
1841  codegen_->GenerateFrameExit();
1842}
1843
1844void LocationsBuilderARM::VisitInvokeUnresolved(HInvokeUnresolved* invoke) {
1845  // The trampoline uses the same calling convention as dex calling conventions,
1846  // except instead of loading arg0/r0 with the target Method*, arg0/r0 will contain
1847  // the method_idx.
1848  HandleInvoke(invoke);
1849}
1850
1851void InstructionCodeGeneratorARM::VisitInvokeUnresolved(HInvokeUnresolved* invoke) {
1852  codegen_->GenerateInvokeUnresolvedRuntimeCall(invoke);
1853}
1854
1855void LocationsBuilderARM::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) {
1856  // Explicit clinit checks triggered by static invokes must have been pruned by
1857  // art::PrepareForRegisterAllocation.
1858  DCHECK(!invoke->IsStaticWithExplicitClinitCheck());
1859
1860  IntrinsicLocationsBuilderARM intrinsic(codegen_);
1861  if (intrinsic.TryDispatch(invoke)) {
1862    if (invoke->GetLocations()->CanCall() && invoke->HasPcRelativeDexCache()) {
1863      invoke->GetLocations()->SetInAt(invoke->GetSpecialInputIndex(), Location::Any());
1864    }
1865    return;
1866  }
1867
1868  HandleInvoke(invoke);
1869
1870  // For PC-relative dex cache the invoke has an extra input, the PC-relative address base.
1871  if (invoke->HasPcRelativeDexCache()) {
1872    invoke->GetLocations()->SetInAt(invoke->GetSpecialInputIndex(), Location::RequiresRegister());
1873  }
1874}
1875
1876static bool TryGenerateIntrinsicCode(HInvoke* invoke, CodeGeneratorARM* codegen) {
1877  if (invoke->GetLocations()->Intrinsified()) {
1878    IntrinsicCodeGeneratorARM intrinsic(codegen);
1879    intrinsic.Dispatch(invoke);
1880    return true;
1881  }
1882  return false;
1883}
1884
1885void InstructionCodeGeneratorARM::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) {
1886  // Explicit clinit checks triggered by static invokes must have been pruned by
1887  // art::PrepareForRegisterAllocation.
1888  DCHECK(!invoke->IsStaticWithExplicitClinitCheck());
1889
1890  if (TryGenerateIntrinsicCode(invoke, codegen_)) {
1891    return;
1892  }
1893
1894  LocationSummary* locations = invoke->GetLocations();
1895  codegen_->GenerateStaticOrDirectCall(
1896      invoke, locations->HasTemps() ? locations->GetTemp(0) : Location::NoLocation());
1897  codegen_->RecordPcInfo(invoke, invoke->GetDexPc());
1898}
1899
1900void LocationsBuilderARM::HandleInvoke(HInvoke* invoke) {
1901  InvokeDexCallingConventionVisitorARM calling_convention_visitor;
1902  CodeGenerator::CreateCommonInvokeLocationSummary(invoke, &calling_convention_visitor);
1903}
1904
1905void LocationsBuilderARM::VisitInvokeVirtual(HInvokeVirtual* invoke) {
1906  IntrinsicLocationsBuilderARM intrinsic(codegen_);
1907  if (intrinsic.TryDispatch(invoke)) {
1908    return;
1909  }
1910
1911  HandleInvoke(invoke);
1912}
1913
1914void InstructionCodeGeneratorARM::VisitInvokeVirtual(HInvokeVirtual* invoke) {
1915  if (TryGenerateIntrinsicCode(invoke, codegen_)) {
1916    return;
1917  }
1918
1919  codegen_->GenerateVirtualCall(invoke, invoke->GetLocations()->GetTemp(0));
1920  DCHECK(!codegen_->IsLeafMethod());
1921  codegen_->RecordPcInfo(invoke, invoke->GetDexPc());
1922}
1923
1924void LocationsBuilderARM::VisitInvokeInterface(HInvokeInterface* invoke) {
1925  HandleInvoke(invoke);
1926  // Add the hidden argument.
1927  invoke->GetLocations()->AddTemp(Location::RegisterLocation(R12));
1928}
1929
1930void InstructionCodeGeneratorARM::VisitInvokeInterface(HInvokeInterface* invoke) {
1931  // TODO: b/18116999, our IMTs can miss an IncompatibleClassChangeError.
1932  LocationSummary* locations = invoke->GetLocations();
1933  Register temp = locations->GetTemp(0).AsRegister<Register>();
1934  Register hidden_reg = locations->GetTemp(1).AsRegister<Register>();
1935  Location receiver = locations->InAt(0);
1936  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
1937
1938  // Set the hidden argument. This is safe to do this here, as R12
1939  // won't be modified thereafter, before the `blx` (call) instruction.
1940  DCHECK_EQ(R12, hidden_reg);
1941  __ LoadImmediate(hidden_reg, invoke->GetDexMethodIndex());
1942
1943  if (receiver.IsStackSlot()) {
1944    __ LoadFromOffset(kLoadWord, temp, SP, receiver.GetStackIndex());
1945    // /* HeapReference<Class> */ temp = temp->klass_
1946    __ LoadFromOffset(kLoadWord, temp, temp, class_offset);
1947  } else {
1948    // /* HeapReference<Class> */ temp = receiver->klass_
1949    __ LoadFromOffset(kLoadWord, temp, receiver.AsRegister<Register>(), class_offset);
1950  }
1951  codegen_->MaybeRecordImplicitNullCheck(invoke);
1952  // Instead of simply (possibly) unpoisoning `temp` here, we should
1953  // emit a read barrier for the previous class reference load.
1954  // However this is not required in practice, as this is an
1955  // intermediate/temporary reference and because the current
1956  // concurrent copying collector keeps the from-space memory
1957  // intact/accessible until the end of the marking phase (the
1958  // concurrent copying collector may not in the future).
1959  __ MaybeUnpoisonHeapReference(temp);
1960  __ LoadFromOffset(kLoadWord, temp, temp,
1961        mirror::Class::ImtPtrOffset(kArmPointerSize).Uint32Value());
1962  uint32_t method_offset = static_cast<uint32_t>(ImTable::OffsetOfElement(
1963      invoke->GetImtIndex(), kArmPointerSize));
1964  // temp = temp->GetImtEntryAt(method_offset);
1965  __ LoadFromOffset(kLoadWord, temp, temp, method_offset);
1966  uint32_t entry_point =
1967      ArtMethod::EntryPointFromQuickCompiledCodeOffset(kArmPointerSize).Int32Value();
1968  // LR = temp->GetEntryPoint();
1969  __ LoadFromOffset(kLoadWord, LR, temp, entry_point);
1970  // LR();
1971  __ blx(LR);
1972  DCHECK(!codegen_->IsLeafMethod());
1973  codegen_->RecordPcInfo(invoke, invoke->GetDexPc());
1974}
1975
1976void LocationsBuilderARM::VisitNeg(HNeg* neg) {
1977  LocationSummary* locations =
1978      new (GetGraph()->GetArena()) LocationSummary(neg, LocationSummary::kNoCall);
1979  switch (neg->GetResultType()) {
1980    case Primitive::kPrimInt: {
1981      locations->SetInAt(0, Location::RequiresRegister());
1982      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
1983      break;
1984    }
1985    case Primitive::kPrimLong: {
1986      locations->SetInAt(0, Location::RequiresRegister());
1987      locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1988      break;
1989    }
1990
1991    case Primitive::kPrimFloat:
1992    case Primitive::kPrimDouble:
1993      locations->SetInAt(0, Location::RequiresFpuRegister());
1994      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
1995      break;
1996
1997    default:
1998      LOG(FATAL) << "Unexpected neg type " << neg->GetResultType();
1999  }
2000}
2001
2002void InstructionCodeGeneratorARM::VisitNeg(HNeg* neg) {
2003  LocationSummary* locations = neg->GetLocations();
2004  Location out = locations->Out();
2005  Location in = locations->InAt(0);
2006  switch (neg->GetResultType()) {
2007    case Primitive::kPrimInt:
2008      DCHECK(in.IsRegister());
2009      __ rsb(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(0));
2010      break;
2011
2012    case Primitive::kPrimLong:
2013      DCHECK(in.IsRegisterPair());
2014      // out.lo = 0 - in.lo (and update the carry/borrow (C) flag)
2015      __ rsbs(out.AsRegisterPairLow<Register>(),
2016              in.AsRegisterPairLow<Register>(),
2017              ShifterOperand(0));
2018      // We cannot emit an RSC (Reverse Subtract with Carry)
2019      // instruction here, as it does not exist in the Thumb-2
2020      // instruction set.  We use the following approach
2021      // using SBC and SUB instead.
2022      //
2023      // out.hi = -C
2024      __ sbc(out.AsRegisterPairHigh<Register>(),
2025             out.AsRegisterPairHigh<Register>(),
2026             ShifterOperand(out.AsRegisterPairHigh<Register>()));
2027      // out.hi = out.hi - in.hi
2028      __ sub(out.AsRegisterPairHigh<Register>(),
2029             out.AsRegisterPairHigh<Register>(),
2030             ShifterOperand(in.AsRegisterPairHigh<Register>()));
2031      break;
2032
2033    case Primitive::kPrimFloat:
2034      DCHECK(in.IsFpuRegister());
2035      __ vnegs(out.AsFpuRegister<SRegister>(), in.AsFpuRegister<SRegister>());
2036      break;
2037
2038    case Primitive::kPrimDouble:
2039      DCHECK(in.IsFpuRegisterPair());
2040      __ vnegd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2041               FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2042      break;
2043
2044    default:
2045      LOG(FATAL) << "Unexpected neg type " << neg->GetResultType();
2046  }
2047}
2048
2049void LocationsBuilderARM::VisitTypeConversion(HTypeConversion* conversion) {
2050  Primitive::Type result_type = conversion->GetResultType();
2051  Primitive::Type input_type = conversion->GetInputType();
2052  DCHECK_NE(result_type, input_type);
2053
2054  // The float-to-long, double-to-long and long-to-float type conversions
2055  // rely on a call to the runtime.
2056  LocationSummary::CallKind call_kind =
2057      (((input_type == Primitive::kPrimFloat || input_type == Primitive::kPrimDouble)
2058        && result_type == Primitive::kPrimLong)
2059       || (input_type == Primitive::kPrimLong && result_type == Primitive::kPrimFloat))
2060      ? LocationSummary::kCallOnMainOnly
2061      : LocationSummary::kNoCall;
2062  LocationSummary* locations =
2063      new (GetGraph()->GetArena()) LocationSummary(conversion, call_kind);
2064
2065  // The Java language does not allow treating boolean as an integral type but
2066  // our bit representation makes it safe.
2067
2068  switch (result_type) {
2069    case Primitive::kPrimByte:
2070      switch (input_type) {
2071        case Primitive::kPrimLong:
2072          // Type conversion from long to byte is a result of code transformations.
2073        case Primitive::kPrimBoolean:
2074          // Boolean input is a result of code transformations.
2075        case Primitive::kPrimShort:
2076        case Primitive::kPrimInt:
2077        case Primitive::kPrimChar:
2078          // Processing a Dex `int-to-byte' instruction.
2079          locations->SetInAt(0, Location::RequiresRegister());
2080          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2081          break;
2082
2083        default:
2084          LOG(FATAL) << "Unexpected type conversion from " << input_type
2085                     << " to " << result_type;
2086      }
2087      break;
2088
2089    case Primitive::kPrimShort:
2090      switch (input_type) {
2091        case Primitive::kPrimLong:
2092          // Type conversion from long to short is a result of code transformations.
2093        case Primitive::kPrimBoolean:
2094          // Boolean input is a result of code transformations.
2095        case Primitive::kPrimByte:
2096        case Primitive::kPrimInt:
2097        case Primitive::kPrimChar:
2098          // Processing a Dex `int-to-short' instruction.
2099          locations->SetInAt(0, Location::RequiresRegister());
2100          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2101          break;
2102
2103        default:
2104          LOG(FATAL) << "Unexpected type conversion from " << input_type
2105                     << " to " << result_type;
2106      }
2107      break;
2108
2109    case Primitive::kPrimInt:
2110      switch (input_type) {
2111        case Primitive::kPrimLong:
2112          // Processing a Dex `long-to-int' instruction.
2113          locations->SetInAt(0, Location::Any());
2114          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2115          break;
2116
2117        case Primitive::kPrimFloat:
2118          // Processing a Dex `float-to-int' instruction.
2119          locations->SetInAt(0, Location::RequiresFpuRegister());
2120          locations->SetOut(Location::RequiresRegister());
2121          locations->AddTemp(Location::RequiresFpuRegister());
2122          break;
2123
2124        case Primitive::kPrimDouble:
2125          // Processing a Dex `double-to-int' instruction.
2126          locations->SetInAt(0, Location::RequiresFpuRegister());
2127          locations->SetOut(Location::RequiresRegister());
2128          locations->AddTemp(Location::RequiresFpuRegister());
2129          break;
2130
2131        default:
2132          LOG(FATAL) << "Unexpected type conversion from " << input_type
2133                     << " to " << result_type;
2134      }
2135      break;
2136
2137    case Primitive::kPrimLong:
2138      switch (input_type) {
2139        case Primitive::kPrimBoolean:
2140          // Boolean input is a result of code transformations.
2141        case Primitive::kPrimByte:
2142        case Primitive::kPrimShort:
2143        case Primitive::kPrimInt:
2144        case Primitive::kPrimChar:
2145          // Processing a Dex `int-to-long' instruction.
2146          locations->SetInAt(0, Location::RequiresRegister());
2147          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2148          break;
2149
2150        case Primitive::kPrimFloat: {
2151          // Processing a Dex `float-to-long' instruction.
2152          InvokeRuntimeCallingConvention calling_convention;
2153          locations->SetInAt(0, Location::FpuRegisterLocation(
2154              calling_convention.GetFpuRegisterAt(0)));
2155          locations->SetOut(Location::RegisterPairLocation(R0, R1));
2156          break;
2157        }
2158
2159        case Primitive::kPrimDouble: {
2160          // Processing a Dex `double-to-long' instruction.
2161          InvokeRuntimeCallingConvention calling_convention;
2162          locations->SetInAt(0, Location::FpuRegisterPairLocation(
2163              calling_convention.GetFpuRegisterAt(0),
2164              calling_convention.GetFpuRegisterAt(1)));
2165          locations->SetOut(Location::RegisterPairLocation(R0, R1));
2166          break;
2167        }
2168
2169        default:
2170          LOG(FATAL) << "Unexpected type conversion from " << input_type
2171                     << " to " << result_type;
2172      }
2173      break;
2174
2175    case Primitive::kPrimChar:
2176      switch (input_type) {
2177        case Primitive::kPrimLong:
2178          // Type conversion from long to char is a result of code transformations.
2179        case Primitive::kPrimBoolean:
2180          // Boolean input is a result of code transformations.
2181        case Primitive::kPrimByte:
2182        case Primitive::kPrimShort:
2183        case Primitive::kPrimInt:
2184          // Processing a Dex `int-to-char' instruction.
2185          locations->SetInAt(0, Location::RequiresRegister());
2186          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2187          break;
2188
2189        default:
2190          LOG(FATAL) << "Unexpected type conversion from " << input_type
2191                     << " to " << result_type;
2192      }
2193      break;
2194
2195    case Primitive::kPrimFloat:
2196      switch (input_type) {
2197        case Primitive::kPrimBoolean:
2198          // Boolean input is a result of code transformations.
2199        case Primitive::kPrimByte:
2200        case Primitive::kPrimShort:
2201        case Primitive::kPrimInt:
2202        case Primitive::kPrimChar:
2203          // Processing a Dex `int-to-float' instruction.
2204          locations->SetInAt(0, Location::RequiresRegister());
2205          locations->SetOut(Location::RequiresFpuRegister());
2206          break;
2207
2208        case Primitive::kPrimLong: {
2209          // Processing a Dex `long-to-float' instruction.
2210          InvokeRuntimeCallingConvention calling_convention;
2211          locations->SetInAt(0, Location::RegisterPairLocation(
2212              calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1)));
2213          locations->SetOut(Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0)));
2214          break;
2215        }
2216
2217        case Primitive::kPrimDouble:
2218          // Processing a Dex `double-to-float' instruction.
2219          locations->SetInAt(0, Location::RequiresFpuRegister());
2220          locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2221          break;
2222
2223        default:
2224          LOG(FATAL) << "Unexpected type conversion from " << input_type
2225                     << " to " << result_type;
2226      };
2227      break;
2228
2229    case Primitive::kPrimDouble:
2230      switch (input_type) {
2231        case Primitive::kPrimBoolean:
2232          // Boolean input is a result of code transformations.
2233        case Primitive::kPrimByte:
2234        case Primitive::kPrimShort:
2235        case Primitive::kPrimInt:
2236        case Primitive::kPrimChar:
2237          // Processing a Dex `int-to-double' instruction.
2238          locations->SetInAt(0, Location::RequiresRegister());
2239          locations->SetOut(Location::RequiresFpuRegister());
2240          break;
2241
2242        case Primitive::kPrimLong:
2243          // Processing a Dex `long-to-double' instruction.
2244          locations->SetInAt(0, Location::RequiresRegister());
2245          locations->SetOut(Location::RequiresFpuRegister());
2246          locations->AddTemp(Location::RequiresFpuRegister());
2247          locations->AddTemp(Location::RequiresFpuRegister());
2248          break;
2249
2250        case Primitive::kPrimFloat:
2251          // Processing a Dex `float-to-double' instruction.
2252          locations->SetInAt(0, Location::RequiresFpuRegister());
2253          locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2254          break;
2255
2256        default:
2257          LOG(FATAL) << "Unexpected type conversion from " << input_type
2258                     << " to " << result_type;
2259      };
2260      break;
2261
2262    default:
2263      LOG(FATAL) << "Unexpected type conversion from " << input_type
2264                 << " to " << result_type;
2265  }
2266}
2267
2268void InstructionCodeGeneratorARM::VisitTypeConversion(HTypeConversion* conversion) {
2269  LocationSummary* locations = conversion->GetLocations();
2270  Location out = locations->Out();
2271  Location in = locations->InAt(0);
2272  Primitive::Type result_type = conversion->GetResultType();
2273  Primitive::Type input_type = conversion->GetInputType();
2274  DCHECK_NE(result_type, input_type);
2275  switch (result_type) {
2276    case Primitive::kPrimByte:
2277      switch (input_type) {
2278        case Primitive::kPrimLong:
2279          // Type conversion from long to byte is a result of code transformations.
2280          __ sbfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 8);
2281          break;
2282        case Primitive::kPrimBoolean:
2283          // Boolean input is a result of code transformations.
2284        case Primitive::kPrimShort:
2285        case Primitive::kPrimInt:
2286        case Primitive::kPrimChar:
2287          // Processing a Dex `int-to-byte' instruction.
2288          __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 8);
2289          break;
2290
2291        default:
2292          LOG(FATAL) << "Unexpected type conversion from " << input_type
2293                     << " to " << result_type;
2294      }
2295      break;
2296
2297    case Primitive::kPrimShort:
2298      switch (input_type) {
2299        case Primitive::kPrimLong:
2300          // Type conversion from long to short is a result of code transformations.
2301          __ sbfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 16);
2302          break;
2303        case Primitive::kPrimBoolean:
2304          // Boolean input is a result of code transformations.
2305        case Primitive::kPrimByte:
2306        case Primitive::kPrimInt:
2307        case Primitive::kPrimChar:
2308          // Processing a Dex `int-to-short' instruction.
2309          __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16);
2310          break;
2311
2312        default:
2313          LOG(FATAL) << "Unexpected type conversion from " << input_type
2314                     << " to " << result_type;
2315      }
2316      break;
2317
2318    case Primitive::kPrimInt:
2319      switch (input_type) {
2320        case Primitive::kPrimLong:
2321          // Processing a Dex `long-to-int' instruction.
2322          DCHECK(out.IsRegister());
2323          if (in.IsRegisterPair()) {
2324            __ Mov(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2325          } else if (in.IsDoubleStackSlot()) {
2326            __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), SP, in.GetStackIndex());
2327          } else {
2328            DCHECK(in.IsConstant());
2329            DCHECK(in.GetConstant()->IsLongConstant());
2330            int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2331            __ LoadImmediate(out.AsRegister<Register>(), static_cast<int32_t>(value));
2332          }
2333          break;
2334
2335        case Primitive::kPrimFloat: {
2336          // Processing a Dex `float-to-int' instruction.
2337          SRegister temp = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>();
2338          __ vcvtis(temp, in.AsFpuRegister<SRegister>());
2339          __ vmovrs(out.AsRegister<Register>(), temp);
2340          break;
2341        }
2342
2343        case Primitive::kPrimDouble: {
2344          // Processing a Dex `double-to-int' instruction.
2345          SRegister temp_s = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>();
2346          __ vcvtid(temp_s, FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2347          __ vmovrs(out.AsRegister<Register>(), temp_s);
2348          break;
2349        }
2350
2351        default:
2352          LOG(FATAL) << "Unexpected type conversion from " << input_type
2353                     << " to " << result_type;
2354      }
2355      break;
2356
2357    case Primitive::kPrimLong:
2358      switch (input_type) {
2359        case Primitive::kPrimBoolean:
2360          // Boolean input is a result of code transformations.
2361        case Primitive::kPrimByte:
2362        case Primitive::kPrimShort:
2363        case Primitive::kPrimInt:
2364        case Primitive::kPrimChar:
2365          // Processing a Dex `int-to-long' instruction.
2366          DCHECK(out.IsRegisterPair());
2367          DCHECK(in.IsRegister());
2368          __ Mov(out.AsRegisterPairLow<Register>(), in.AsRegister<Register>());
2369          // Sign extension.
2370          __ Asr(out.AsRegisterPairHigh<Register>(),
2371                 out.AsRegisterPairLow<Register>(),
2372                 31);
2373          break;
2374
2375        case Primitive::kPrimFloat:
2376          // Processing a Dex `float-to-long' instruction.
2377          codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pF2l),
2378                                  conversion,
2379                                  conversion->GetDexPc(),
2380                                  nullptr);
2381          CheckEntrypointTypes<kQuickF2l, int64_t, float>();
2382          break;
2383
2384        case Primitive::kPrimDouble:
2385          // Processing a Dex `double-to-long' instruction.
2386          codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pD2l),
2387                                  conversion,
2388                                  conversion->GetDexPc(),
2389                                  nullptr);
2390          CheckEntrypointTypes<kQuickD2l, int64_t, double>();
2391          break;
2392
2393        default:
2394          LOG(FATAL) << "Unexpected type conversion from " << input_type
2395                     << " to " << result_type;
2396      }
2397      break;
2398
2399    case Primitive::kPrimChar:
2400      switch (input_type) {
2401        case Primitive::kPrimLong:
2402          // Type conversion from long to char is a result of code transformations.
2403          __ ubfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 16);
2404          break;
2405        case Primitive::kPrimBoolean:
2406          // Boolean input is a result of code transformations.
2407        case Primitive::kPrimByte:
2408        case Primitive::kPrimShort:
2409        case Primitive::kPrimInt:
2410          // Processing a Dex `int-to-char' instruction.
2411          __ ubfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16);
2412          break;
2413
2414        default:
2415          LOG(FATAL) << "Unexpected type conversion from " << input_type
2416                     << " to " << result_type;
2417      }
2418      break;
2419
2420    case Primitive::kPrimFloat:
2421      switch (input_type) {
2422        case Primitive::kPrimBoolean:
2423          // Boolean input is a result of code transformations.
2424        case Primitive::kPrimByte:
2425        case Primitive::kPrimShort:
2426        case Primitive::kPrimInt:
2427        case Primitive::kPrimChar: {
2428          // Processing a Dex `int-to-float' instruction.
2429          __ vmovsr(out.AsFpuRegister<SRegister>(), in.AsRegister<Register>());
2430          __ vcvtsi(out.AsFpuRegister<SRegister>(), out.AsFpuRegister<SRegister>());
2431          break;
2432        }
2433
2434        case Primitive::kPrimLong:
2435          // Processing a Dex `long-to-float' instruction.
2436          codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pL2f),
2437                                  conversion,
2438                                  conversion->GetDexPc(),
2439                                  nullptr);
2440          CheckEntrypointTypes<kQuickL2f, float, int64_t>();
2441          break;
2442
2443        case Primitive::kPrimDouble:
2444          // Processing a Dex `double-to-float' instruction.
2445          __ vcvtsd(out.AsFpuRegister<SRegister>(),
2446                    FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2447          break;
2448
2449        default:
2450          LOG(FATAL) << "Unexpected type conversion from " << input_type
2451                     << " to " << result_type;
2452      };
2453      break;
2454
2455    case Primitive::kPrimDouble:
2456      switch (input_type) {
2457        case Primitive::kPrimBoolean:
2458          // Boolean input is a result of code transformations.
2459        case Primitive::kPrimByte:
2460        case Primitive::kPrimShort:
2461        case Primitive::kPrimInt:
2462        case Primitive::kPrimChar: {
2463          // Processing a Dex `int-to-double' instruction.
2464          __ vmovsr(out.AsFpuRegisterPairLow<SRegister>(), in.AsRegister<Register>());
2465          __ vcvtdi(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2466                    out.AsFpuRegisterPairLow<SRegister>());
2467          break;
2468        }
2469
2470        case Primitive::kPrimLong: {
2471          // Processing a Dex `long-to-double' instruction.
2472          Register low = in.AsRegisterPairLow<Register>();
2473          Register high = in.AsRegisterPairHigh<Register>();
2474          SRegister out_s = out.AsFpuRegisterPairLow<SRegister>();
2475          DRegister out_d = FromLowSToD(out_s);
2476          SRegister temp_s = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>();
2477          DRegister temp_d = FromLowSToD(temp_s);
2478          SRegister constant_s = locations->GetTemp(1).AsFpuRegisterPairLow<SRegister>();
2479          DRegister constant_d = FromLowSToD(constant_s);
2480
2481          // temp_d = int-to-double(high)
2482          __ vmovsr(temp_s, high);
2483          __ vcvtdi(temp_d, temp_s);
2484          // constant_d = k2Pow32EncodingForDouble
2485          __ LoadDImmediate(constant_d, bit_cast<double, int64_t>(k2Pow32EncodingForDouble));
2486          // out_d = unsigned-to-double(low)
2487          __ vmovsr(out_s, low);
2488          __ vcvtdu(out_d, out_s);
2489          // out_d += temp_d * constant_d
2490          __ vmlad(out_d, temp_d, constant_d);
2491          break;
2492        }
2493
2494        case Primitive::kPrimFloat:
2495          // Processing a Dex `float-to-double' instruction.
2496          __ vcvtds(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2497                    in.AsFpuRegister<SRegister>());
2498          break;
2499
2500        default:
2501          LOG(FATAL) << "Unexpected type conversion from " << input_type
2502                     << " to " << result_type;
2503      };
2504      break;
2505
2506    default:
2507      LOG(FATAL) << "Unexpected type conversion from " << input_type
2508                 << " to " << result_type;
2509  }
2510}
2511
2512void LocationsBuilderARM::VisitAdd(HAdd* add) {
2513  LocationSummary* locations =
2514      new (GetGraph()->GetArena()) LocationSummary(add, LocationSummary::kNoCall);
2515  switch (add->GetResultType()) {
2516    case Primitive::kPrimInt: {
2517      locations->SetInAt(0, Location::RequiresRegister());
2518      locations->SetInAt(1, Location::RegisterOrConstant(add->InputAt(1)));
2519      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2520      break;
2521    }
2522
2523    case Primitive::kPrimLong: {
2524      locations->SetInAt(0, Location::RequiresRegister());
2525      locations->SetInAt(1, ArmEncodableConstantOrRegister(add->InputAt(1), ADD));
2526      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2527      break;
2528    }
2529
2530    case Primitive::kPrimFloat:
2531    case Primitive::kPrimDouble: {
2532      locations->SetInAt(0, Location::RequiresFpuRegister());
2533      locations->SetInAt(1, Location::RequiresFpuRegister());
2534      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2535      break;
2536    }
2537
2538    default:
2539      LOG(FATAL) << "Unexpected add type " << add->GetResultType();
2540  }
2541}
2542
2543void InstructionCodeGeneratorARM::VisitAdd(HAdd* add) {
2544  LocationSummary* locations = add->GetLocations();
2545  Location out = locations->Out();
2546  Location first = locations->InAt(0);
2547  Location second = locations->InAt(1);
2548  switch (add->GetResultType()) {
2549    case Primitive::kPrimInt:
2550      if (second.IsRegister()) {
2551        __ add(out.AsRegister<Register>(),
2552               first.AsRegister<Register>(),
2553               ShifterOperand(second.AsRegister<Register>()));
2554      } else {
2555        __ AddConstant(out.AsRegister<Register>(),
2556                       first.AsRegister<Register>(),
2557                       second.GetConstant()->AsIntConstant()->GetValue());
2558      }
2559      break;
2560
2561    case Primitive::kPrimLong: {
2562      if (second.IsConstant()) {
2563        uint64_t value = static_cast<uint64_t>(Int64FromConstant(second.GetConstant()));
2564        GenerateAddLongConst(out, first, value);
2565      } else {
2566        DCHECK(second.IsRegisterPair());
2567        __ adds(out.AsRegisterPairLow<Register>(),
2568                first.AsRegisterPairLow<Register>(),
2569                ShifterOperand(second.AsRegisterPairLow<Register>()));
2570        __ adc(out.AsRegisterPairHigh<Register>(),
2571               first.AsRegisterPairHigh<Register>(),
2572               ShifterOperand(second.AsRegisterPairHigh<Register>()));
2573      }
2574      break;
2575    }
2576
2577    case Primitive::kPrimFloat:
2578      __ vadds(out.AsFpuRegister<SRegister>(),
2579               first.AsFpuRegister<SRegister>(),
2580               second.AsFpuRegister<SRegister>());
2581      break;
2582
2583    case Primitive::kPrimDouble:
2584      __ vaddd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2585               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2586               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
2587      break;
2588
2589    default:
2590      LOG(FATAL) << "Unexpected add type " << add->GetResultType();
2591  }
2592}
2593
2594void LocationsBuilderARM::VisitSub(HSub* sub) {
2595  LocationSummary* locations =
2596      new (GetGraph()->GetArena()) LocationSummary(sub, LocationSummary::kNoCall);
2597  switch (sub->GetResultType()) {
2598    case Primitive::kPrimInt: {
2599      locations->SetInAt(0, Location::RequiresRegister());
2600      locations->SetInAt(1, Location::RegisterOrConstant(sub->InputAt(1)));
2601      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2602      break;
2603    }
2604
2605    case Primitive::kPrimLong: {
2606      locations->SetInAt(0, Location::RequiresRegister());
2607      locations->SetInAt(1, ArmEncodableConstantOrRegister(sub->InputAt(1), SUB));
2608      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2609      break;
2610    }
2611    case Primitive::kPrimFloat:
2612    case Primitive::kPrimDouble: {
2613      locations->SetInAt(0, Location::RequiresFpuRegister());
2614      locations->SetInAt(1, Location::RequiresFpuRegister());
2615      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2616      break;
2617    }
2618    default:
2619      LOG(FATAL) << "Unexpected sub type " << sub->GetResultType();
2620  }
2621}
2622
2623void InstructionCodeGeneratorARM::VisitSub(HSub* sub) {
2624  LocationSummary* locations = sub->GetLocations();
2625  Location out = locations->Out();
2626  Location first = locations->InAt(0);
2627  Location second = locations->InAt(1);
2628  switch (sub->GetResultType()) {
2629    case Primitive::kPrimInt: {
2630      if (second.IsRegister()) {
2631        __ sub(out.AsRegister<Register>(),
2632               first.AsRegister<Register>(),
2633               ShifterOperand(second.AsRegister<Register>()));
2634      } else {
2635        __ AddConstant(out.AsRegister<Register>(),
2636                       first.AsRegister<Register>(),
2637                       -second.GetConstant()->AsIntConstant()->GetValue());
2638      }
2639      break;
2640    }
2641
2642    case Primitive::kPrimLong: {
2643      if (second.IsConstant()) {
2644        uint64_t value = static_cast<uint64_t>(Int64FromConstant(second.GetConstant()));
2645        GenerateAddLongConst(out, first, -value);
2646      } else {
2647        DCHECK(second.IsRegisterPair());
2648        __ subs(out.AsRegisterPairLow<Register>(),
2649                first.AsRegisterPairLow<Register>(),
2650                ShifterOperand(second.AsRegisterPairLow<Register>()));
2651        __ sbc(out.AsRegisterPairHigh<Register>(),
2652               first.AsRegisterPairHigh<Register>(),
2653               ShifterOperand(second.AsRegisterPairHigh<Register>()));
2654      }
2655      break;
2656    }
2657
2658    case Primitive::kPrimFloat: {
2659      __ vsubs(out.AsFpuRegister<SRegister>(),
2660               first.AsFpuRegister<SRegister>(),
2661               second.AsFpuRegister<SRegister>());
2662      break;
2663    }
2664
2665    case Primitive::kPrimDouble: {
2666      __ vsubd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2667               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2668               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
2669      break;
2670    }
2671
2672
2673    default:
2674      LOG(FATAL) << "Unexpected sub type " << sub->GetResultType();
2675  }
2676}
2677
2678void LocationsBuilderARM::VisitMul(HMul* mul) {
2679  LocationSummary* locations =
2680      new (GetGraph()->GetArena()) LocationSummary(mul, LocationSummary::kNoCall);
2681  switch (mul->GetResultType()) {
2682    case Primitive::kPrimInt:
2683    case Primitive::kPrimLong:  {
2684      locations->SetInAt(0, Location::RequiresRegister());
2685      locations->SetInAt(1, Location::RequiresRegister());
2686      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2687      break;
2688    }
2689
2690    case Primitive::kPrimFloat:
2691    case Primitive::kPrimDouble: {
2692      locations->SetInAt(0, Location::RequiresFpuRegister());
2693      locations->SetInAt(1, Location::RequiresFpuRegister());
2694      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2695      break;
2696    }
2697
2698    default:
2699      LOG(FATAL) << "Unexpected mul type " << mul->GetResultType();
2700  }
2701}
2702
2703void InstructionCodeGeneratorARM::VisitMul(HMul* mul) {
2704  LocationSummary* locations = mul->GetLocations();
2705  Location out = locations->Out();
2706  Location first = locations->InAt(0);
2707  Location second = locations->InAt(1);
2708  switch (mul->GetResultType()) {
2709    case Primitive::kPrimInt: {
2710      __ mul(out.AsRegister<Register>(),
2711             first.AsRegister<Register>(),
2712             second.AsRegister<Register>());
2713      break;
2714    }
2715    case Primitive::kPrimLong: {
2716      Register out_hi = out.AsRegisterPairHigh<Register>();
2717      Register out_lo = out.AsRegisterPairLow<Register>();
2718      Register in1_hi = first.AsRegisterPairHigh<Register>();
2719      Register in1_lo = first.AsRegisterPairLow<Register>();
2720      Register in2_hi = second.AsRegisterPairHigh<Register>();
2721      Register in2_lo = second.AsRegisterPairLow<Register>();
2722
2723      // Extra checks to protect caused by the existence of R1_R2.
2724      // The algorithm is wrong if out.hi is either in1.lo or in2.lo:
2725      // (e.g. in1=r0_r1, in2=r2_r3 and out=r1_r2);
2726      DCHECK_NE(out_hi, in1_lo);
2727      DCHECK_NE(out_hi, in2_lo);
2728
2729      // input: in1 - 64 bits, in2 - 64 bits
2730      // output: out
2731      // formula: out.hi : out.lo = (in1.lo * in2.hi + in1.hi * in2.lo)* 2^32 + in1.lo * in2.lo
2732      // parts: out.hi = in1.lo * in2.hi + in1.hi * in2.lo + (in1.lo * in2.lo)[63:32]
2733      // parts: out.lo = (in1.lo * in2.lo)[31:0]
2734
2735      // IP <- in1.lo * in2.hi
2736      __ mul(IP, in1_lo, in2_hi);
2737      // out.hi <- in1.lo * in2.hi + in1.hi * in2.lo
2738      __ mla(out_hi, in1_hi, in2_lo, IP);
2739      // out.lo <- (in1.lo * in2.lo)[31:0];
2740      __ umull(out_lo, IP, in1_lo, in2_lo);
2741      // out.hi <- in2.hi * in1.lo +  in2.lo * in1.hi + (in1.lo * in2.lo)[63:32]
2742      __ add(out_hi, out_hi, ShifterOperand(IP));
2743      break;
2744    }
2745
2746    case Primitive::kPrimFloat: {
2747      __ vmuls(out.AsFpuRegister<SRegister>(),
2748               first.AsFpuRegister<SRegister>(),
2749               second.AsFpuRegister<SRegister>());
2750      break;
2751    }
2752
2753    case Primitive::kPrimDouble: {
2754      __ vmuld(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2755               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2756               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
2757      break;
2758    }
2759
2760    default:
2761      LOG(FATAL) << "Unexpected mul type " << mul->GetResultType();
2762  }
2763}
2764
2765void InstructionCodeGeneratorARM::DivRemOneOrMinusOne(HBinaryOperation* instruction) {
2766  DCHECK(instruction->IsDiv() || instruction->IsRem());
2767  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2768
2769  LocationSummary* locations = instruction->GetLocations();
2770  Location second = locations->InAt(1);
2771  DCHECK(second.IsConstant());
2772
2773  Register out = locations->Out().AsRegister<Register>();
2774  Register dividend = locations->InAt(0).AsRegister<Register>();
2775  int32_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2776  DCHECK(imm == 1 || imm == -1);
2777
2778  if (instruction->IsRem()) {
2779    __ LoadImmediate(out, 0);
2780  } else {
2781    if (imm == 1) {
2782      __ Mov(out, dividend);
2783    } else {
2784      __ rsb(out, dividend, ShifterOperand(0));
2785    }
2786  }
2787}
2788
2789void InstructionCodeGeneratorARM::DivRemByPowerOfTwo(HBinaryOperation* instruction) {
2790  DCHECK(instruction->IsDiv() || instruction->IsRem());
2791  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2792
2793  LocationSummary* locations = instruction->GetLocations();
2794  Location second = locations->InAt(1);
2795  DCHECK(second.IsConstant());
2796
2797  Register out = locations->Out().AsRegister<Register>();
2798  Register dividend = locations->InAt(0).AsRegister<Register>();
2799  Register temp = locations->GetTemp(0).AsRegister<Register>();
2800  int32_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2801  uint32_t abs_imm = static_cast<uint32_t>(AbsOrMin(imm));
2802  int ctz_imm = CTZ(abs_imm);
2803
2804  if (ctz_imm == 1) {
2805    __ Lsr(temp, dividend, 32 - ctz_imm);
2806  } else {
2807    __ Asr(temp, dividend, 31);
2808    __ Lsr(temp, temp, 32 - ctz_imm);
2809  }
2810  __ add(out, temp, ShifterOperand(dividend));
2811
2812  if (instruction->IsDiv()) {
2813    __ Asr(out, out, ctz_imm);
2814    if (imm < 0) {
2815      __ rsb(out, out, ShifterOperand(0));
2816    }
2817  } else {
2818    __ ubfx(out, out, 0, ctz_imm);
2819    __ sub(out, out, ShifterOperand(temp));
2820  }
2821}
2822
2823void InstructionCodeGeneratorARM::GenerateDivRemWithAnyConstant(HBinaryOperation* instruction) {
2824  DCHECK(instruction->IsDiv() || instruction->IsRem());
2825  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2826
2827  LocationSummary* locations = instruction->GetLocations();
2828  Location second = locations->InAt(1);
2829  DCHECK(second.IsConstant());
2830
2831  Register out = locations->Out().AsRegister<Register>();
2832  Register dividend = locations->InAt(0).AsRegister<Register>();
2833  Register temp1 = locations->GetTemp(0).AsRegister<Register>();
2834  Register temp2 = locations->GetTemp(1).AsRegister<Register>();
2835  int64_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2836
2837  int64_t magic;
2838  int shift;
2839  CalculateMagicAndShiftForDivRem(imm, false /* is_long */, &magic, &shift);
2840
2841  __ LoadImmediate(temp1, magic);
2842  __ smull(temp2, temp1, dividend, temp1);
2843
2844  if (imm > 0 && magic < 0) {
2845    __ add(temp1, temp1, ShifterOperand(dividend));
2846  } else if (imm < 0 && magic > 0) {
2847    __ sub(temp1, temp1, ShifterOperand(dividend));
2848  }
2849
2850  if (shift != 0) {
2851    __ Asr(temp1, temp1, shift);
2852  }
2853
2854  if (instruction->IsDiv()) {
2855    __ sub(out, temp1, ShifterOperand(temp1, ASR, 31));
2856  } else {
2857    __ sub(temp1, temp1, ShifterOperand(temp1, ASR, 31));
2858    // TODO: Strength reduction for mls.
2859    __ LoadImmediate(temp2, imm);
2860    __ mls(out, temp1, temp2, dividend);
2861  }
2862}
2863
2864void InstructionCodeGeneratorARM::GenerateDivRemConstantIntegral(HBinaryOperation* instruction) {
2865  DCHECK(instruction->IsDiv() || instruction->IsRem());
2866  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2867
2868  LocationSummary* locations = instruction->GetLocations();
2869  Location second = locations->InAt(1);
2870  DCHECK(second.IsConstant());
2871
2872  int32_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2873  if (imm == 0) {
2874    // Do not generate anything. DivZeroCheck would prevent any code to be executed.
2875  } else if (imm == 1 || imm == -1) {
2876    DivRemOneOrMinusOne(instruction);
2877  } else if (IsPowerOfTwo(AbsOrMin(imm))) {
2878    DivRemByPowerOfTwo(instruction);
2879  } else {
2880    DCHECK(imm <= -2 || imm >= 2);
2881    GenerateDivRemWithAnyConstant(instruction);
2882  }
2883}
2884
2885void LocationsBuilderARM::VisitDiv(HDiv* div) {
2886  LocationSummary::CallKind call_kind = LocationSummary::kNoCall;
2887  if (div->GetResultType() == Primitive::kPrimLong) {
2888    // pLdiv runtime call.
2889    call_kind = LocationSummary::kCallOnMainOnly;
2890  } else if (div->GetResultType() == Primitive::kPrimInt && div->InputAt(1)->IsConstant()) {
2891    // sdiv will be replaced by other instruction sequence.
2892  } else if (div->GetResultType() == Primitive::kPrimInt &&
2893             !codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
2894    // pIdivmod runtime call.
2895    call_kind = LocationSummary::kCallOnMainOnly;
2896  }
2897
2898  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(div, call_kind);
2899
2900  switch (div->GetResultType()) {
2901    case Primitive::kPrimInt: {
2902      if (div->InputAt(1)->IsConstant()) {
2903        locations->SetInAt(0, Location::RequiresRegister());
2904        locations->SetInAt(1, Location::ConstantLocation(div->InputAt(1)->AsConstant()));
2905        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2906        int32_t value = div->InputAt(1)->AsIntConstant()->GetValue();
2907        if (value == 1 || value == 0 || value == -1) {
2908          // No temp register required.
2909        } else {
2910          locations->AddTemp(Location::RequiresRegister());
2911          if (!IsPowerOfTwo(AbsOrMin(value))) {
2912            locations->AddTemp(Location::RequiresRegister());
2913          }
2914        }
2915      } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
2916        locations->SetInAt(0, Location::RequiresRegister());
2917        locations->SetInAt(1, Location::RequiresRegister());
2918        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2919      } else {
2920        InvokeRuntimeCallingConvention calling_convention;
2921        locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
2922        locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
2923        // Note: divrem will compute both the quotient and the remainder as the pair R0 and R1, but
2924        //       we only need the former.
2925        locations->SetOut(Location::RegisterLocation(R0));
2926      }
2927      break;
2928    }
2929    case Primitive::kPrimLong: {
2930      InvokeRuntimeCallingConvention calling_convention;
2931      locations->SetInAt(0, Location::RegisterPairLocation(
2932          calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1)));
2933      locations->SetInAt(1, Location::RegisterPairLocation(
2934          calling_convention.GetRegisterAt(2), calling_convention.GetRegisterAt(3)));
2935      locations->SetOut(Location::RegisterPairLocation(R0, R1));
2936      break;
2937    }
2938    case Primitive::kPrimFloat:
2939    case Primitive::kPrimDouble: {
2940      locations->SetInAt(0, Location::RequiresFpuRegister());
2941      locations->SetInAt(1, Location::RequiresFpuRegister());
2942      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2943      break;
2944    }
2945
2946    default:
2947      LOG(FATAL) << "Unexpected div type " << div->GetResultType();
2948  }
2949}
2950
2951void InstructionCodeGeneratorARM::VisitDiv(HDiv* div) {
2952  LocationSummary* locations = div->GetLocations();
2953  Location out = locations->Out();
2954  Location first = locations->InAt(0);
2955  Location second = locations->InAt(1);
2956
2957  switch (div->GetResultType()) {
2958    case Primitive::kPrimInt: {
2959      if (second.IsConstant()) {
2960        GenerateDivRemConstantIntegral(div);
2961      } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
2962        __ sdiv(out.AsRegister<Register>(),
2963                first.AsRegister<Register>(),
2964                second.AsRegister<Register>());
2965      } else {
2966        InvokeRuntimeCallingConvention calling_convention;
2967        DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegister<Register>());
2968        DCHECK_EQ(calling_convention.GetRegisterAt(1), second.AsRegister<Register>());
2969        DCHECK_EQ(R0, out.AsRegister<Register>());
2970
2971        codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pIdivmod), div, div->GetDexPc(), nullptr);
2972        CheckEntrypointTypes<kQuickIdivmod, int32_t, int32_t, int32_t>();
2973      }
2974      break;
2975    }
2976
2977    case Primitive::kPrimLong: {
2978      InvokeRuntimeCallingConvention calling_convention;
2979      DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegisterPairLow<Register>());
2980      DCHECK_EQ(calling_convention.GetRegisterAt(1), first.AsRegisterPairHigh<Register>());
2981      DCHECK_EQ(calling_convention.GetRegisterAt(2), second.AsRegisterPairLow<Register>());
2982      DCHECK_EQ(calling_convention.GetRegisterAt(3), second.AsRegisterPairHigh<Register>());
2983      DCHECK_EQ(R0, out.AsRegisterPairLow<Register>());
2984      DCHECK_EQ(R1, out.AsRegisterPairHigh<Register>());
2985
2986      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pLdiv), div, div->GetDexPc(), nullptr);
2987      CheckEntrypointTypes<kQuickLdiv, int64_t, int64_t, int64_t>();
2988      break;
2989    }
2990
2991    case Primitive::kPrimFloat: {
2992      __ vdivs(out.AsFpuRegister<SRegister>(),
2993               first.AsFpuRegister<SRegister>(),
2994               second.AsFpuRegister<SRegister>());
2995      break;
2996    }
2997
2998    case Primitive::kPrimDouble: {
2999      __ vdivd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
3000               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
3001               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
3002      break;
3003    }
3004
3005    default:
3006      LOG(FATAL) << "Unexpected div type " << div->GetResultType();
3007  }
3008}
3009
3010void LocationsBuilderARM::VisitRem(HRem* rem) {
3011  Primitive::Type type = rem->GetResultType();
3012
3013  // Most remainders are implemented in the runtime.
3014  LocationSummary::CallKind call_kind = LocationSummary::kCallOnMainOnly;
3015  if (rem->GetResultType() == Primitive::kPrimInt && rem->InputAt(1)->IsConstant()) {
3016    // sdiv will be replaced by other instruction sequence.
3017    call_kind = LocationSummary::kNoCall;
3018  } else if ((rem->GetResultType() == Primitive::kPrimInt)
3019             && codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
3020    // Have hardware divide instruction for int, do it with three instructions.
3021    call_kind = LocationSummary::kNoCall;
3022  }
3023
3024  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(rem, call_kind);
3025
3026  switch (type) {
3027    case Primitive::kPrimInt: {
3028      if (rem->InputAt(1)->IsConstant()) {
3029        locations->SetInAt(0, Location::RequiresRegister());
3030        locations->SetInAt(1, Location::ConstantLocation(rem->InputAt(1)->AsConstant()));
3031        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3032        int32_t value = rem->InputAt(1)->AsIntConstant()->GetValue();
3033        if (value == 1 || value == 0 || value == -1) {
3034          // No temp register required.
3035        } else {
3036          locations->AddTemp(Location::RequiresRegister());
3037          if (!IsPowerOfTwo(AbsOrMin(value))) {
3038            locations->AddTemp(Location::RequiresRegister());
3039          }
3040        }
3041      } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
3042        locations->SetInAt(0, Location::RequiresRegister());
3043        locations->SetInAt(1, Location::RequiresRegister());
3044        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3045        locations->AddTemp(Location::RequiresRegister());
3046      } else {
3047        InvokeRuntimeCallingConvention calling_convention;
3048        locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
3049        locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
3050        // Note: divrem will compute both the quotient and the remainder as the pair R0 and R1, but
3051        //       we only need the latter.
3052        locations->SetOut(Location::RegisterLocation(R1));
3053      }
3054      break;
3055    }
3056    case Primitive::kPrimLong: {
3057      InvokeRuntimeCallingConvention calling_convention;
3058      locations->SetInAt(0, Location::RegisterPairLocation(
3059          calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1)));
3060      locations->SetInAt(1, Location::RegisterPairLocation(
3061          calling_convention.GetRegisterAt(2), calling_convention.GetRegisterAt(3)));
3062      // The runtime helper puts the output in R2,R3.
3063      locations->SetOut(Location::RegisterPairLocation(R2, R3));
3064      break;
3065    }
3066    case Primitive::kPrimFloat: {
3067      InvokeRuntimeCallingConvention calling_convention;
3068      locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0)));
3069      locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1)));
3070      locations->SetOut(Location::FpuRegisterLocation(S0));
3071      break;
3072    }
3073
3074    case Primitive::kPrimDouble: {
3075      InvokeRuntimeCallingConvention calling_convention;
3076      locations->SetInAt(0, Location::FpuRegisterPairLocation(
3077          calling_convention.GetFpuRegisterAt(0), calling_convention.GetFpuRegisterAt(1)));
3078      locations->SetInAt(1, Location::FpuRegisterPairLocation(
3079          calling_convention.GetFpuRegisterAt(2), calling_convention.GetFpuRegisterAt(3)));
3080      locations->SetOut(Location::Location::FpuRegisterPairLocation(S0, S1));
3081      break;
3082    }
3083
3084    default:
3085      LOG(FATAL) << "Unexpected rem type " << type;
3086  }
3087}
3088
3089void InstructionCodeGeneratorARM::VisitRem(HRem* rem) {
3090  LocationSummary* locations = rem->GetLocations();
3091  Location out = locations->Out();
3092  Location first = locations->InAt(0);
3093  Location second = locations->InAt(1);
3094
3095  Primitive::Type type = rem->GetResultType();
3096  switch (type) {
3097    case Primitive::kPrimInt: {
3098        if (second.IsConstant()) {
3099          GenerateDivRemConstantIntegral(rem);
3100        } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
3101        Register reg1 = first.AsRegister<Register>();
3102        Register reg2 = second.AsRegister<Register>();
3103        Register temp = locations->GetTemp(0).AsRegister<Register>();
3104
3105        // temp = reg1 / reg2  (integer division)
3106        // dest = reg1 - temp * reg2
3107        __ sdiv(temp, reg1, reg2);
3108        __ mls(out.AsRegister<Register>(), temp, reg2, reg1);
3109      } else {
3110        InvokeRuntimeCallingConvention calling_convention;
3111        DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegister<Register>());
3112        DCHECK_EQ(calling_convention.GetRegisterAt(1), second.AsRegister<Register>());
3113        DCHECK_EQ(R1, out.AsRegister<Register>());
3114
3115        codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pIdivmod), rem, rem->GetDexPc(), nullptr);
3116        CheckEntrypointTypes<kQuickIdivmod, int32_t, int32_t, int32_t>();
3117      }
3118      break;
3119    }
3120
3121    case Primitive::kPrimLong: {
3122      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pLmod), rem, rem->GetDexPc(), nullptr);
3123        CheckEntrypointTypes<kQuickLmod, int64_t, int64_t, int64_t>();
3124      break;
3125    }
3126
3127    case Primitive::kPrimFloat: {
3128      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pFmodf), rem, rem->GetDexPc(), nullptr);
3129      CheckEntrypointTypes<kQuickFmodf, float, float, float>();
3130      break;
3131    }
3132
3133    case Primitive::kPrimDouble: {
3134      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pFmod), rem, rem->GetDexPc(), nullptr);
3135      CheckEntrypointTypes<kQuickFmod, double, double, double>();
3136      break;
3137    }
3138
3139    default:
3140      LOG(FATAL) << "Unexpected rem type " << type;
3141  }
3142}
3143
3144void LocationsBuilderARM::VisitDivZeroCheck(HDivZeroCheck* instruction) {
3145  LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock()
3146      ? LocationSummary::kCallOnSlowPath
3147      : LocationSummary::kNoCall;
3148  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
3149  locations->SetInAt(0, Location::RegisterOrConstant(instruction->InputAt(0)));
3150  if (instruction->HasUses()) {
3151    locations->SetOut(Location::SameAsFirstInput());
3152  }
3153}
3154
3155void InstructionCodeGeneratorARM::VisitDivZeroCheck(HDivZeroCheck* instruction) {
3156  SlowPathCode* slow_path = new (GetGraph()->GetArena()) DivZeroCheckSlowPathARM(instruction);
3157  codegen_->AddSlowPath(slow_path);
3158
3159  LocationSummary* locations = instruction->GetLocations();
3160  Location value = locations->InAt(0);
3161
3162  switch (instruction->GetType()) {
3163    case Primitive::kPrimBoolean:
3164    case Primitive::kPrimByte:
3165    case Primitive::kPrimChar:
3166    case Primitive::kPrimShort:
3167    case Primitive::kPrimInt: {
3168      if (value.IsRegister()) {
3169        __ CompareAndBranchIfZero(value.AsRegister<Register>(), slow_path->GetEntryLabel());
3170      } else {
3171        DCHECK(value.IsConstant()) << value;
3172        if (value.GetConstant()->AsIntConstant()->GetValue() == 0) {
3173          __ b(slow_path->GetEntryLabel());
3174        }
3175      }
3176      break;
3177    }
3178    case Primitive::kPrimLong: {
3179      if (value.IsRegisterPair()) {
3180        __ orrs(IP,
3181                value.AsRegisterPairLow<Register>(),
3182                ShifterOperand(value.AsRegisterPairHigh<Register>()));
3183        __ b(slow_path->GetEntryLabel(), EQ);
3184      } else {
3185        DCHECK(value.IsConstant()) << value;
3186        if (value.GetConstant()->AsLongConstant()->GetValue() == 0) {
3187          __ b(slow_path->GetEntryLabel());
3188        }
3189      }
3190      break;
3191    default:
3192      LOG(FATAL) << "Unexpected type for HDivZeroCheck " << instruction->GetType();
3193    }
3194  }
3195}
3196
3197void InstructionCodeGeneratorARM::HandleIntegerRotate(LocationSummary* locations) {
3198  Register in = locations->InAt(0).AsRegister<Register>();
3199  Location rhs = locations->InAt(1);
3200  Register out = locations->Out().AsRegister<Register>();
3201
3202  if (rhs.IsConstant()) {
3203    // Arm32 and Thumb2 assemblers require a rotation on the interval [1,31],
3204    // so map all rotations to a +ve. equivalent in that range.
3205    // (e.g. left *or* right by -2 bits == 30 bits in the same direction.)
3206    uint32_t rot = CodeGenerator::GetInt32ValueOf(rhs.GetConstant()) & 0x1F;
3207    if (rot) {
3208      // Rotate, mapping left rotations to right equivalents if necessary.
3209      // (e.g. left by 2 bits == right by 30.)
3210      __ Ror(out, in, rot);
3211    } else if (out != in) {
3212      __ Mov(out, in);
3213    }
3214  } else {
3215    __ Ror(out, in, rhs.AsRegister<Register>());
3216  }
3217}
3218
3219// Gain some speed by mapping all Long rotates onto equivalent pairs of Integer
3220// rotates by swapping input regs (effectively rotating by the first 32-bits of
3221// a larger rotation) or flipping direction (thus treating larger right/left
3222// rotations as sub-word sized rotations in the other direction) as appropriate.
3223void InstructionCodeGeneratorARM::HandleLongRotate(LocationSummary* locations) {
3224  Register in_reg_lo = locations->InAt(0).AsRegisterPairLow<Register>();
3225  Register in_reg_hi = locations->InAt(0).AsRegisterPairHigh<Register>();
3226  Location rhs = locations->InAt(1);
3227  Register out_reg_lo = locations->Out().AsRegisterPairLow<Register>();
3228  Register out_reg_hi = locations->Out().AsRegisterPairHigh<Register>();
3229
3230  if (rhs.IsConstant()) {
3231    uint64_t rot = CodeGenerator::GetInt64ValueOf(rhs.GetConstant());
3232    // Map all rotations to +ve. equivalents on the interval [0,63].
3233    rot &= kMaxLongShiftDistance;
3234    // For rotates over a word in size, 'pre-rotate' by 32-bits to keep rotate
3235    // logic below to a simple pair of binary orr.
3236    // (e.g. 34 bits == in_reg swap + 2 bits right.)
3237    if (rot >= kArmBitsPerWord) {
3238      rot -= kArmBitsPerWord;
3239      std::swap(in_reg_hi, in_reg_lo);
3240    }
3241    // Rotate, or mov to out for zero or word size rotations.
3242    if (rot != 0u) {
3243      __ Lsr(out_reg_hi, in_reg_hi, rot);
3244      __ orr(out_reg_hi, out_reg_hi, ShifterOperand(in_reg_lo, arm::LSL, kArmBitsPerWord - rot));
3245      __ Lsr(out_reg_lo, in_reg_lo, rot);
3246      __ orr(out_reg_lo, out_reg_lo, ShifterOperand(in_reg_hi, arm::LSL, kArmBitsPerWord - rot));
3247    } else {
3248      __ Mov(out_reg_lo, in_reg_lo);
3249      __ Mov(out_reg_hi, in_reg_hi);
3250    }
3251  } else {
3252    Register shift_right = locations->GetTemp(0).AsRegister<Register>();
3253    Register shift_left = locations->GetTemp(1).AsRegister<Register>();
3254    Label end;
3255    Label shift_by_32_plus_shift_right;
3256
3257    __ and_(shift_right, rhs.AsRegister<Register>(), ShifterOperand(0x1F));
3258    __ Lsrs(shift_left, rhs.AsRegister<Register>(), 6);
3259    __ rsb(shift_left, shift_right, ShifterOperand(kArmBitsPerWord), AL, kCcKeep);
3260    __ b(&shift_by_32_plus_shift_right, CC);
3261
3262    // out_reg_hi = (reg_hi << shift_left) | (reg_lo >> shift_right).
3263    // out_reg_lo = (reg_lo << shift_left) | (reg_hi >> shift_right).
3264    __ Lsl(out_reg_hi, in_reg_hi, shift_left);
3265    __ Lsr(out_reg_lo, in_reg_lo, shift_right);
3266    __ add(out_reg_hi, out_reg_hi, ShifterOperand(out_reg_lo));
3267    __ Lsl(out_reg_lo, in_reg_lo, shift_left);
3268    __ Lsr(shift_left, in_reg_hi, shift_right);
3269    __ add(out_reg_lo, out_reg_lo, ShifterOperand(shift_left));
3270    __ b(&end);
3271
3272    __ Bind(&shift_by_32_plus_shift_right);  // Shift by 32+shift_right.
3273    // out_reg_hi = (reg_hi >> shift_right) | (reg_lo << shift_left).
3274    // out_reg_lo = (reg_lo >> shift_right) | (reg_hi << shift_left).
3275    __ Lsr(out_reg_hi, in_reg_hi, shift_right);
3276    __ Lsl(out_reg_lo, in_reg_lo, shift_left);
3277    __ add(out_reg_hi, out_reg_hi, ShifterOperand(out_reg_lo));
3278    __ Lsr(out_reg_lo, in_reg_lo, shift_right);
3279    __ Lsl(shift_right, in_reg_hi, shift_left);
3280    __ add(out_reg_lo, out_reg_lo, ShifterOperand(shift_right));
3281
3282    __ Bind(&end);
3283  }
3284}
3285
3286void LocationsBuilderARM::VisitRor(HRor* ror) {
3287  LocationSummary* locations =
3288      new (GetGraph()->GetArena()) LocationSummary(ror, LocationSummary::kNoCall);
3289  switch (ror->GetResultType()) {
3290    case Primitive::kPrimInt: {
3291      locations->SetInAt(0, Location::RequiresRegister());
3292      locations->SetInAt(1, Location::RegisterOrConstant(ror->InputAt(1)));
3293      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3294      break;
3295    }
3296    case Primitive::kPrimLong: {
3297      locations->SetInAt(0, Location::RequiresRegister());
3298      if (ror->InputAt(1)->IsConstant()) {
3299        locations->SetInAt(1, Location::ConstantLocation(ror->InputAt(1)->AsConstant()));
3300      } else {
3301        locations->SetInAt(1, Location::RequiresRegister());
3302        locations->AddTemp(Location::RequiresRegister());
3303        locations->AddTemp(Location::RequiresRegister());
3304      }
3305      locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3306      break;
3307    }
3308    default:
3309      LOG(FATAL) << "Unexpected operation type " << ror->GetResultType();
3310  }
3311}
3312
3313void InstructionCodeGeneratorARM::VisitRor(HRor* ror) {
3314  LocationSummary* locations = ror->GetLocations();
3315  Primitive::Type type = ror->GetResultType();
3316  switch (type) {
3317    case Primitive::kPrimInt: {
3318      HandleIntegerRotate(locations);
3319      break;
3320    }
3321    case Primitive::kPrimLong: {
3322      HandleLongRotate(locations);
3323      break;
3324    }
3325    default:
3326      LOG(FATAL) << "Unexpected operation type " << type;
3327      UNREACHABLE();
3328  }
3329}
3330
3331void LocationsBuilderARM::HandleShift(HBinaryOperation* op) {
3332  DCHECK(op->IsShl() || op->IsShr() || op->IsUShr());
3333
3334  LocationSummary* locations =
3335      new (GetGraph()->GetArena()) LocationSummary(op, LocationSummary::kNoCall);
3336
3337  switch (op->GetResultType()) {
3338    case Primitive::kPrimInt: {
3339      locations->SetInAt(0, Location::RequiresRegister());
3340      if (op->InputAt(1)->IsConstant()) {
3341        locations->SetInAt(1, Location::ConstantLocation(op->InputAt(1)->AsConstant()));
3342        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3343      } else {
3344        locations->SetInAt(1, Location::RequiresRegister());
3345        // Make the output overlap, as it will be used to hold the masked
3346        // second input.
3347        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3348      }
3349      break;
3350    }
3351    case Primitive::kPrimLong: {
3352      locations->SetInAt(0, Location::RequiresRegister());
3353      if (op->InputAt(1)->IsConstant()) {
3354        locations->SetInAt(1, Location::ConstantLocation(op->InputAt(1)->AsConstant()));
3355        // For simplicity, use kOutputOverlap even though we only require that low registers
3356        // don't clash with high registers which the register allocator currently guarantees.
3357        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3358      } else {
3359        locations->SetInAt(1, Location::RequiresRegister());
3360        locations->AddTemp(Location::RequiresRegister());
3361        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3362      }
3363      break;
3364    }
3365    default:
3366      LOG(FATAL) << "Unexpected operation type " << op->GetResultType();
3367  }
3368}
3369
3370void InstructionCodeGeneratorARM::HandleShift(HBinaryOperation* op) {
3371  DCHECK(op->IsShl() || op->IsShr() || op->IsUShr());
3372
3373  LocationSummary* locations = op->GetLocations();
3374  Location out = locations->Out();
3375  Location first = locations->InAt(0);
3376  Location second = locations->InAt(1);
3377
3378  Primitive::Type type = op->GetResultType();
3379  switch (type) {
3380    case Primitive::kPrimInt: {
3381      Register out_reg = out.AsRegister<Register>();
3382      Register first_reg = first.AsRegister<Register>();
3383      if (second.IsRegister()) {
3384        Register second_reg = second.AsRegister<Register>();
3385        // ARM doesn't mask the shift count so we need to do it ourselves.
3386        __ and_(out_reg, second_reg, ShifterOperand(kMaxIntShiftDistance));
3387        if (op->IsShl()) {
3388          __ Lsl(out_reg, first_reg, out_reg);
3389        } else if (op->IsShr()) {
3390          __ Asr(out_reg, first_reg, out_reg);
3391        } else {
3392          __ Lsr(out_reg, first_reg, out_reg);
3393        }
3394      } else {
3395        int32_t cst = second.GetConstant()->AsIntConstant()->GetValue();
3396        uint32_t shift_value = cst & kMaxIntShiftDistance;
3397        if (shift_value == 0) {  // ARM does not support shifting with 0 immediate.
3398          __ Mov(out_reg, first_reg);
3399        } else if (op->IsShl()) {
3400          __ Lsl(out_reg, first_reg, shift_value);
3401        } else if (op->IsShr()) {
3402          __ Asr(out_reg, first_reg, shift_value);
3403        } else {
3404          __ Lsr(out_reg, first_reg, shift_value);
3405        }
3406      }
3407      break;
3408    }
3409    case Primitive::kPrimLong: {
3410      Register o_h = out.AsRegisterPairHigh<Register>();
3411      Register o_l = out.AsRegisterPairLow<Register>();
3412
3413      Register high = first.AsRegisterPairHigh<Register>();
3414      Register low = first.AsRegisterPairLow<Register>();
3415
3416      if (second.IsRegister()) {
3417        Register temp = locations->GetTemp(0).AsRegister<Register>();
3418
3419        Register second_reg = second.AsRegister<Register>();
3420
3421        if (op->IsShl()) {
3422          __ and_(o_l, second_reg, ShifterOperand(kMaxLongShiftDistance));
3423          // Shift the high part
3424          __ Lsl(o_h, high, o_l);
3425          // Shift the low part and `or` what overflew on the high part
3426          __ rsb(temp, o_l, ShifterOperand(kArmBitsPerWord));
3427          __ Lsr(temp, low, temp);
3428          __ orr(o_h, o_h, ShifterOperand(temp));
3429          // If the shift is > 32 bits, override the high part
3430          __ subs(temp, o_l, ShifterOperand(kArmBitsPerWord));
3431          __ it(PL);
3432          __ Lsl(o_h, low, temp, PL);
3433          // Shift the low part
3434          __ Lsl(o_l, low, o_l);
3435        } else if (op->IsShr()) {
3436          __ and_(o_h, second_reg, ShifterOperand(kMaxLongShiftDistance));
3437          // Shift the low part
3438          __ Lsr(o_l, low, o_h);
3439          // Shift the high part and `or` what underflew on the low part
3440          __ rsb(temp, o_h, ShifterOperand(kArmBitsPerWord));
3441          __ Lsl(temp, high, temp);
3442          __ orr(o_l, o_l, ShifterOperand(temp));
3443          // If the shift is > 32 bits, override the low part
3444          __ subs(temp, o_h, ShifterOperand(kArmBitsPerWord));
3445          __ it(PL);
3446          __ Asr(o_l, high, temp, PL);
3447          // Shift the high part
3448          __ Asr(o_h, high, o_h);
3449        } else {
3450          __ and_(o_h, second_reg, ShifterOperand(kMaxLongShiftDistance));
3451          // same as Shr except we use `Lsr`s and not `Asr`s
3452          __ Lsr(o_l, low, o_h);
3453          __ rsb(temp, o_h, ShifterOperand(kArmBitsPerWord));
3454          __ Lsl(temp, high, temp);
3455          __ orr(o_l, o_l, ShifterOperand(temp));
3456          __ subs(temp, o_h, ShifterOperand(kArmBitsPerWord));
3457          __ it(PL);
3458          __ Lsr(o_l, high, temp, PL);
3459          __ Lsr(o_h, high, o_h);
3460        }
3461      } else {
3462        // Register allocator doesn't create partial overlap.
3463        DCHECK_NE(o_l, high);
3464        DCHECK_NE(o_h, low);
3465        int32_t cst = second.GetConstant()->AsIntConstant()->GetValue();
3466        uint32_t shift_value = cst & kMaxLongShiftDistance;
3467        if (shift_value > 32) {
3468          if (op->IsShl()) {
3469            __ Lsl(o_h, low, shift_value - 32);
3470            __ LoadImmediate(o_l, 0);
3471          } else if (op->IsShr()) {
3472            __ Asr(o_l, high, shift_value - 32);
3473            __ Asr(o_h, high, 31);
3474          } else {
3475            __ Lsr(o_l, high, shift_value - 32);
3476            __ LoadImmediate(o_h, 0);
3477          }
3478        } else if (shift_value == 32) {
3479          if (op->IsShl()) {
3480            __ mov(o_h, ShifterOperand(low));
3481            __ LoadImmediate(o_l, 0);
3482          } else if (op->IsShr()) {
3483            __ mov(o_l, ShifterOperand(high));
3484            __ Asr(o_h, high, 31);
3485          } else {
3486            __ mov(o_l, ShifterOperand(high));
3487            __ LoadImmediate(o_h, 0);
3488          }
3489        } else if (shift_value == 1) {
3490          if (op->IsShl()) {
3491            __ Lsls(o_l, low, 1);
3492            __ adc(o_h, high, ShifterOperand(high));
3493          } else if (op->IsShr()) {
3494            __ Asrs(o_h, high, 1);
3495            __ Rrx(o_l, low);
3496          } else {
3497            __ Lsrs(o_h, high, 1);
3498            __ Rrx(o_l, low);
3499          }
3500        } else {
3501          DCHECK(2 <= shift_value && shift_value < 32) << shift_value;
3502          if (op->IsShl()) {
3503            __ Lsl(o_h, high, shift_value);
3504            __ orr(o_h, o_h, ShifterOperand(low, LSR, 32 - shift_value));
3505            __ Lsl(o_l, low, shift_value);
3506          } else if (op->IsShr()) {
3507            __ Lsr(o_l, low, shift_value);
3508            __ orr(o_l, o_l, ShifterOperand(high, LSL, 32 - shift_value));
3509            __ Asr(o_h, high, shift_value);
3510          } else {
3511            __ Lsr(o_l, low, shift_value);
3512            __ orr(o_l, o_l, ShifterOperand(high, LSL, 32 - shift_value));
3513            __ Lsr(o_h, high, shift_value);
3514          }
3515        }
3516      }
3517      break;
3518    }
3519    default:
3520      LOG(FATAL) << "Unexpected operation type " << type;
3521      UNREACHABLE();
3522  }
3523}
3524
3525void LocationsBuilderARM::VisitShl(HShl* shl) {
3526  HandleShift(shl);
3527}
3528
3529void InstructionCodeGeneratorARM::VisitShl(HShl* shl) {
3530  HandleShift(shl);
3531}
3532
3533void LocationsBuilderARM::VisitShr(HShr* shr) {
3534  HandleShift(shr);
3535}
3536
3537void InstructionCodeGeneratorARM::VisitShr(HShr* shr) {
3538  HandleShift(shr);
3539}
3540
3541void LocationsBuilderARM::VisitUShr(HUShr* ushr) {
3542  HandleShift(ushr);
3543}
3544
3545void InstructionCodeGeneratorARM::VisitUShr(HUShr* ushr) {
3546  HandleShift(ushr);
3547}
3548
3549void LocationsBuilderARM::VisitNewInstance(HNewInstance* instruction) {
3550  LocationSummary* locations =
3551      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
3552  if (instruction->IsStringAlloc()) {
3553    locations->AddTemp(Location::RegisterLocation(kMethodRegisterArgument));
3554  } else {
3555    InvokeRuntimeCallingConvention calling_convention;
3556    locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
3557    locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
3558  }
3559  locations->SetOut(Location::RegisterLocation(R0));
3560}
3561
3562void InstructionCodeGeneratorARM::VisitNewInstance(HNewInstance* instruction) {
3563  // Note: if heap poisoning is enabled, the entry point takes cares
3564  // of poisoning the reference.
3565  if (instruction->IsStringAlloc()) {
3566    // String is allocated through StringFactory. Call NewEmptyString entry point.
3567    Register temp = instruction->GetLocations()->GetTemp(0).AsRegister<Register>();
3568    MemberOffset code_offset = ArtMethod::EntryPointFromQuickCompiledCodeOffset(kArmPointerSize);
3569    __ LoadFromOffset(kLoadWord, temp, TR, QUICK_ENTRY_POINT(pNewEmptyString));
3570    __ LoadFromOffset(kLoadWord, LR, temp, code_offset.Int32Value());
3571    __ blx(LR);
3572    codegen_->RecordPcInfo(instruction, instruction->GetDexPc());
3573  } else {
3574    codegen_->InvokeRuntime(instruction->GetEntrypoint(),
3575                            instruction,
3576                            instruction->GetDexPc(),
3577                            nullptr);
3578    CheckEntrypointTypes<kQuickAllocObjectWithAccessCheck, void*, uint32_t, ArtMethod*>();
3579  }
3580}
3581
3582void LocationsBuilderARM::VisitNewArray(HNewArray* instruction) {
3583  LocationSummary* locations =
3584      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
3585  InvokeRuntimeCallingConvention calling_convention;
3586  locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
3587  locations->SetOut(Location::RegisterLocation(R0));
3588  locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
3589  locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(2)));
3590}
3591
3592void InstructionCodeGeneratorARM::VisitNewArray(HNewArray* instruction) {
3593  InvokeRuntimeCallingConvention calling_convention;
3594  __ LoadImmediate(calling_convention.GetRegisterAt(0), instruction->GetTypeIndex());
3595  // Note: if heap poisoning is enabled, the entry point takes cares
3596  // of poisoning the reference.
3597  codegen_->InvokeRuntime(instruction->GetEntrypoint(),
3598                          instruction,
3599                          instruction->GetDexPc(),
3600                          nullptr);
3601  CheckEntrypointTypes<kQuickAllocArrayWithAccessCheck, void*, uint32_t, int32_t, ArtMethod*>();
3602}
3603
3604void LocationsBuilderARM::VisitParameterValue(HParameterValue* instruction) {
3605  LocationSummary* locations =
3606      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3607  Location location = parameter_visitor_.GetNextLocation(instruction->GetType());
3608  if (location.IsStackSlot()) {
3609    location = Location::StackSlot(location.GetStackIndex() + codegen_->GetFrameSize());
3610  } else if (location.IsDoubleStackSlot()) {
3611    location = Location::DoubleStackSlot(location.GetStackIndex() + codegen_->GetFrameSize());
3612  }
3613  locations->SetOut(location);
3614}
3615
3616void InstructionCodeGeneratorARM::VisitParameterValue(
3617    HParameterValue* instruction ATTRIBUTE_UNUSED) {
3618  // Nothing to do, the parameter is already at its location.
3619}
3620
3621void LocationsBuilderARM::VisitCurrentMethod(HCurrentMethod* instruction) {
3622  LocationSummary* locations =
3623      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3624  locations->SetOut(Location::RegisterLocation(kMethodRegisterArgument));
3625}
3626
3627void InstructionCodeGeneratorARM::VisitCurrentMethod(HCurrentMethod* instruction ATTRIBUTE_UNUSED) {
3628  // Nothing to do, the method is already at its location.
3629}
3630
3631void LocationsBuilderARM::VisitNot(HNot* not_) {
3632  LocationSummary* locations =
3633      new (GetGraph()->GetArena()) LocationSummary(not_, LocationSummary::kNoCall);
3634  locations->SetInAt(0, Location::RequiresRegister());
3635  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3636}
3637
3638void InstructionCodeGeneratorARM::VisitNot(HNot* not_) {
3639  LocationSummary* locations = not_->GetLocations();
3640  Location out = locations->Out();
3641  Location in = locations->InAt(0);
3642  switch (not_->GetResultType()) {
3643    case Primitive::kPrimInt:
3644      __ mvn(out.AsRegister<Register>(), ShifterOperand(in.AsRegister<Register>()));
3645      break;
3646
3647    case Primitive::kPrimLong:
3648      __ mvn(out.AsRegisterPairLow<Register>(),
3649             ShifterOperand(in.AsRegisterPairLow<Register>()));
3650      __ mvn(out.AsRegisterPairHigh<Register>(),
3651             ShifterOperand(in.AsRegisterPairHigh<Register>()));
3652      break;
3653
3654    default:
3655      LOG(FATAL) << "Unimplemented type for not operation " << not_->GetResultType();
3656  }
3657}
3658
3659void LocationsBuilderARM::VisitBooleanNot(HBooleanNot* bool_not) {
3660  LocationSummary* locations =
3661      new (GetGraph()->GetArena()) LocationSummary(bool_not, LocationSummary::kNoCall);
3662  locations->SetInAt(0, Location::RequiresRegister());
3663  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3664}
3665
3666void InstructionCodeGeneratorARM::VisitBooleanNot(HBooleanNot* bool_not) {
3667  LocationSummary* locations = bool_not->GetLocations();
3668  Location out = locations->Out();
3669  Location in = locations->InAt(0);
3670  __ eor(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(1));
3671}
3672
3673void LocationsBuilderARM::VisitCompare(HCompare* compare) {
3674  LocationSummary* locations =
3675      new (GetGraph()->GetArena()) LocationSummary(compare, LocationSummary::kNoCall);
3676  switch (compare->InputAt(0)->GetType()) {
3677    case Primitive::kPrimBoolean:
3678    case Primitive::kPrimByte:
3679    case Primitive::kPrimShort:
3680    case Primitive::kPrimChar:
3681    case Primitive::kPrimInt:
3682    case Primitive::kPrimLong: {
3683      locations->SetInAt(0, Location::RequiresRegister());
3684      locations->SetInAt(1, Location::RequiresRegister());
3685      // Output overlaps because it is written before doing the low comparison.
3686      locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3687      break;
3688    }
3689    case Primitive::kPrimFloat:
3690    case Primitive::kPrimDouble: {
3691      locations->SetInAt(0, Location::RequiresFpuRegister());
3692      locations->SetInAt(1, ArithmeticZeroOrFpuRegister(compare->InputAt(1)));
3693      locations->SetOut(Location::RequiresRegister());
3694      break;
3695    }
3696    default:
3697      LOG(FATAL) << "Unexpected type for compare operation " << compare->InputAt(0)->GetType();
3698  }
3699}
3700
3701void InstructionCodeGeneratorARM::VisitCompare(HCompare* compare) {
3702  LocationSummary* locations = compare->GetLocations();
3703  Register out = locations->Out().AsRegister<Register>();
3704  Location left = locations->InAt(0);
3705  Location right = locations->InAt(1);
3706
3707  Label less, greater, done;
3708  Primitive::Type type = compare->InputAt(0)->GetType();
3709  Condition less_cond;
3710  switch (type) {
3711    case Primitive::kPrimBoolean:
3712    case Primitive::kPrimByte:
3713    case Primitive::kPrimShort:
3714    case Primitive::kPrimChar:
3715    case Primitive::kPrimInt: {
3716      __ LoadImmediate(out, 0);
3717      __ cmp(left.AsRegister<Register>(),
3718             ShifterOperand(right.AsRegister<Register>()));  // Signed compare.
3719      less_cond = LT;
3720      break;
3721    }
3722    case Primitive::kPrimLong: {
3723      __ cmp(left.AsRegisterPairHigh<Register>(),
3724             ShifterOperand(right.AsRegisterPairHigh<Register>()));  // Signed compare.
3725      __ b(&less, LT);
3726      __ b(&greater, GT);
3727      // Do LoadImmediate before the last `cmp`, as LoadImmediate might affect the status flags.
3728      __ LoadImmediate(out, 0);
3729      __ cmp(left.AsRegisterPairLow<Register>(),
3730             ShifterOperand(right.AsRegisterPairLow<Register>()));  // Unsigned compare.
3731      less_cond = LO;
3732      break;
3733    }
3734    case Primitive::kPrimFloat:
3735    case Primitive::kPrimDouble: {
3736      __ LoadImmediate(out, 0);
3737      GenerateVcmp(compare);
3738      __ vmstat();  // transfer FP status register to ARM APSR.
3739      less_cond = ARMFPCondition(kCondLT, compare->IsGtBias());
3740      break;
3741    }
3742    default:
3743      LOG(FATAL) << "Unexpected compare type " << type;
3744      UNREACHABLE();
3745  }
3746
3747  __ b(&done, EQ);
3748  __ b(&less, less_cond);
3749
3750  __ Bind(&greater);
3751  __ LoadImmediate(out, 1);
3752  __ b(&done);
3753
3754  __ Bind(&less);
3755  __ LoadImmediate(out, -1);
3756
3757  __ Bind(&done);
3758}
3759
3760void LocationsBuilderARM::VisitPhi(HPhi* instruction) {
3761  LocationSummary* locations =
3762      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3763  for (size_t i = 0, e = locations->GetInputCount(); i < e; ++i) {
3764    locations->SetInAt(i, Location::Any());
3765  }
3766  locations->SetOut(Location::Any());
3767}
3768
3769void InstructionCodeGeneratorARM::VisitPhi(HPhi* instruction ATTRIBUTE_UNUSED) {
3770  LOG(FATAL) << "Unreachable";
3771}
3772
3773void CodeGeneratorARM::GenerateMemoryBarrier(MemBarrierKind kind) {
3774  // TODO (ported from quick): revisit ARM barrier kinds.
3775  DmbOptions flavor = DmbOptions::ISH;  // Quiet C++ warnings.
3776  switch (kind) {
3777    case MemBarrierKind::kAnyStore:
3778    case MemBarrierKind::kLoadAny:
3779    case MemBarrierKind::kAnyAny: {
3780      flavor = DmbOptions::ISH;
3781      break;
3782    }
3783    case MemBarrierKind::kStoreStore: {
3784      flavor = DmbOptions::ISHST;
3785      break;
3786    }
3787    default:
3788      LOG(FATAL) << "Unexpected memory barrier " << kind;
3789  }
3790  __ dmb(flavor);
3791}
3792
3793void InstructionCodeGeneratorARM::GenerateWideAtomicLoad(Register addr,
3794                                                         uint32_t offset,
3795                                                         Register out_lo,
3796                                                         Register out_hi) {
3797  if (offset != 0) {
3798    // Ensure `out_lo` is different from `addr`, so that loading
3799    // `offset` into `out_lo` does not clutter `addr`.
3800    DCHECK_NE(out_lo, addr);
3801    __ LoadImmediate(out_lo, offset);
3802    __ add(IP, addr, ShifterOperand(out_lo));
3803    addr = IP;
3804  }
3805  __ ldrexd(out_lo, out_hi, addr);
3806}
3807
3808void InstructionCodeGeneratorARM::GenerateWideAtomicStore(Register addr,
3809                                                          uint32_t offset,
3810                                                          Register value_lo,
3811                                                          Register value_hi,
3812                                                          Register temp1,
3813                                                          Register temp2,
3814                                                          HInstruction* instruction) {
3815  Label fail;
3816  if (offset != 0) {
3817    __ LoadImmediate(temp1, offset);
3818    __ add(IP, addr, ShifterOperand(temp1));
3819    addr = IP;
3820  }
3821  __ Bind(&fail);
3822  // We need a load followed by store. (The address used in a STREX instruction must
3823  // be the same as the address in the most recently executed LDREX instruction.)
3824  __ ldrexd(temp1, temp2, addr);
3825  codegen_->MaybeRecordImplicitNullCheck(instruction);
3826  __ strexd(temp1, value_lo, value_hi, addr);
3827  __ CompareAndBranchIfNonZero(temp1, &fail);
3828}
3829
3830void LocationsBuilderARM::HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info) {
3831  DCHECK(instruction->IsInstanceFieldSet() || instruction->IsStaticFieldSet());
3832
3833  LocationSummary* locations =
3834      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3835  locations->SetInAt(0, Location::RequiresRegister());
3836
3837  Primitive::Type field_type = field_info.GetFieldType();
3838  if (Primitive::IsFloatingPointType(field_type)) {
3839    locations->SetInAt(1, Location::RequiresFpuRegister());
3840  } else {
3841    locations->SetInAt(1, Location::RequiresRegister());
3842  }
3843
3844  bool is_wide = field_type == Primitive::kPrimLong || field_type == Primitive::kPrimDouble;
3845  bool generate_volatile = field_info.IsVolatile()
3846      && is_wide
3847      && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
3848  bool needs_write_barrier =
3849      CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1));
3850  // Temporary registers for the write barrier.
3851  // TODO: consider renaming StoreNeedsWriteBarrier to StoreNeedsGCMark.
3852  if (needs_write_barrier) {
3853    locations->AddTemp(Location::RequiresRegister());  // Possibly used for reference poisoning too.
3854    locations->AddTemp(Location::RequiresRegister());
3855  } else if (generate_volatile) {
3856    // ARM encoding have some additional constraints for ldrexd/strexd:
3857    // - registers need to be consecutive
3858    // - the first register should be even but not R14.
3859    // We don't test for ARM yet, and the assertion makes sure that we
3860    // revisit this if we ever enable ARM encoding.
3861    DCHECK_EQ(InstructionSet::kThumb2, codegen_->GetInstructionSet());
3862
3863    locations->AddTemp(Location::RequiresRegister());
3864    locations->AddTemp(Location::RequiresRegister());
3865    if (field_type == Primitive::kPrimDouble) {
3866      // For doubles we need two more registers to copy the value.
3867      locations->AddTemp(Location::RegisterLocation(R2));
3868      locations->AddTemp(Location::RegisterLocation(R3));
3869    }
3870  }
3871}
3872
3873void InstructionCodeGeneratorARM::HandleFieldSet(HInstruction* instruction,
3874                                                 const FieldInfo& field_info,
3875                                                 bool value_can_be_null) {
3876  DCHECK(instruction->IsInstanceFieldSet() || instruction->IsStaticFieldSet());
3877
3878  LocationSummary* locations = instruction->GetLocations();
3879  Register base = locations->InAt(0).AsRegister<Register>();
3880  Location value = locations->InAt(1);
3881
3882  bool is_volatile = field_info.IsVolatile();
3883  bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
3884  Primitive::Type field_type = field_info.GetFieldType();
3885  uint32_t offset = field_info.GetFieldOffset().Uint32Value();
3886  bool needs_write_barrier =
3887      CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1));
3888
3889  if (is_volatile) {
3890    codegen_->GenerateMemoryBarrier(MemBarrierKind::kAnyStore);
3891  }
3892
3893  switch (field_type) {
3894    case Primitive::kPrimBoolean:
3895    case Primitive::kPrimByte: {
3896      __ StoreToOffset(kStoreByte, value.AsRegister<Register>(), base, offset);
3897      break;
3898    }
3899
3900    case Primitive::kPrimShort:
3901    case Primitive::kPrimChar: {
3902      __ StoreToOffset(kStoreHalfword, value.AsRegister<Register>(), base, offset);
3903      break;
3904    }
3905
3906    case Primitive::kPrimInt:
3907    case Primitive::kPrimNot: {
3908      if (kPoisonHeapReferences && needs_write_barrier) {
3909        // Note that in the case where `value` is a null reference,
3910        // we do not enter this block, as a null reference does not
3911        // need poisoning.
3912        DCHECK_EQ(field_type, Primitive::kPrimNot);
3913        Register temp = locations->GetTemp(0).AsRegister<Register>();
3914        __ Mov(temp, value.AsRegister<Register>());
3915        __ PoisonHeapReference(temp);
3916        __ StoreToOffset(kStoreWord, temp, base, offset);
3917      } else {
3918        __ StoreToOffset(kStoreWord, value.AsRegister<Register>(), base, offset);
3919      }
3920      break;
3921    }
3922
3923    case Primitive::kPrimLong: {
3924      if (is_volatile && !atomic_ldrd_strd) {
3925        GenerateWideAtomicStore(base, offset,
3926                                value.AsRegisterPairLow<Register>(),
3927                                value.AsRegisterPairHigh<Register>(),
3928                                locations->GetTemp(0).AsRegister<Register>(),
3929                                locations->GetTemp(1).AsRegister<Register>(),
3930                                instruction);
3931      } else {
3932        __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), base, offset);
3933        codegen_->MaybeRecordImplicitNullCheck(instruction);
3934      }
3935      break;
3936    }
3937
3938    case Primitive::kPrimFloat: {
3939      __ StoreSToOffset(value.AsFpuRegister<SRegister>(), base, offset);
3940      break;
3941    }
3942
3943    case Primitive::kPrimDouble: {
3944      DRegister value_reg = FromLowSToD(value.AsFpuRegisterPairLow<SRegister>());
3945      if (is_volatile && !atomic_ldrd_strd) {
3946        Register value_reg_lo = locations->GetTemp(0).AsRegister<Register>();
3947        Register value_reg_hi = locations->GetTemp(1).AsRegister<Register>();
3948
3949        __ vmovrrd(value_reg_lo, value_reg_hi, value_reg);
3950
3951        GenerateWideAtomicStore(base, offset,
3952                                value_reg_lo,
3953                                value_reg_hi,
3954                                locations->GetTemp(2).AsRegister<Register>(),
3955                                locations->GetTemp(3).AsRegister<Register>(),
3956                                instruction);
3957      } else {
3958        __ StoreDToOffset(value_reg, base, offset);
3959        codegen_->MaybeRecordImplicitNullCheck(instruction);
3960      }
3961      break;
3962    }
3963
3964    case Primitive::kPrimVoid:
3965      LOG(FATAL) << "Unreachable type " << field_type;
3966      UNREACHABLE();
3967  }
3968
3969  // Longs and doubles are handled in the switch.
3970  if (field_type != Primitive::kPrimLong && field_type != Primitive::kPrimDouble) {
3971    codegen_->MaybeRecordImplicitNullCheck(instruction);
3972  }
3973
3974  if (CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1))) {
3975    Register temp = locations->GetTemp(0).AsRegister<Register>();
3976    Register card = locations->GetTemp(1).AsRegister<Register>();
3977    codegen_->MarkGCCard(
3978        temp, card, base, value.AsRegister<Register>(), value_can_be_null);
3979  }
3980
3981  if (is_volatile) {
3982    codegen_->GenerateMemoryBarrier(MemBarrierKind::kAnyAny);
3983  }
3984}
3985
3986void LocationsBuilderARM::HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info) {
3987  DCHECK(instruction->IsInstanceFieldGet() || instruction->IsStaticFieldGet());
3988
3989  bool object_field_get_with_read_barrier =
3990      kEmitCompilerReadBarrier && (field_info.GetFieldType() == Primitive::kPrimNot);
3991  LocationSummary* locations =
3992      new (GetGraph()->GetArena()) LocationSummary(instruction,
3993                                                   object_field_get_with_read_barrier ?
3994                                                       LocationSummary::kCallOnSlowPath :
3995                                                       LocationSummary::kNoCall);
3996  locations->SetInAt(0, Location::RequiresRegister());
3997
3998  bool volatile_for_double = field_info.IsVolatile()
3999      && (field_info.GetFieldType() == Primitive::kPrimDouble)
4000      && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
4001  // The output overlaps in case of volatile long: we don't want the
4002  // code generated by GenerateWideAtomicLoad to overwrite the
4003  // object's location.  Likewise, in the case of an object field get
4004  // with read barriers enabled, we do not want the load to overwrite
4005  // the object's location, as we need it to emit the read barrier.
4006  bool overlap = (field_info.IsVolatile() && (field_info.GetFieldType() == Primitive::kPrimLong)) ||
4007      object_field_get_with_read_barrier;
4008
4009  if (Primitive::IsFloatingPointType(instruction->GetType())) {
4010    locations->SetOut(Location::RequiresFpuRegister());
4011  } else {
4012    locations->SetOut(Location::RequiresRegister(),
4013                      (overlap ? Location::kOutputOverlap : Location::kNoOutputOverlap));
4014  }
4015  if (volatile_for_double) {
4016    // ARM encoding have some additional constraints for ldrexd/strexd:
4017    // - registers need to be consecutive
4018    // - the first register should be even but not R14.
4019    // We don't test for ARM yet, and the assertion makes sure that we
4020    // revisit this if we ever enable ARM encoding.
4021    DCHECK_EQ(InstructionSet::kThumb2, codegen_->GetInstructionSet());
4022    locations->AddTemp(Location::RequiresRegister());
4023    locations->AddTemp(Location::RequiresRegister());
4024  } else if (object_field_get_with_read_barrier && kUseBakerReadBarrier) {
4025    // We need a temporary register for the read barrier marking slow
4026    // path in CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier.
4027    locations->AddTemp(Location::RequiresRegister());
4028  }
4029}
4030
4031Location LocationsBuilderARM::ArithmeticZeroOrFpuRegister(HInstruction* input) {
4032  DCHECK(input->GetType() == Primitive::kPrimDouble || input->GetType() == Primitive::kPrimFloat)
4033      << input->GetType();
4034  if ((input->IsFloatConstant() && (input->AsFloatConstant()->IsArithmeticZero())) ||
4035      (input->IsDoubleConstant() && (input->AsDoubleConstant()->IsArithmeticZero()))) {
4036    return Location::ConstantLocation(input->AsConstant());
4037  } else {
4038    return Location::RequiresFpuRegister();
4039  }
4040}
4041
4042Location LocationsBuilderARM::ArmEncodableConstantOrRegister(HInstruction* constant,
4043                                                             Opcode opcode) {
4044  DCHECK(!Primitive::IsFloatingPointType(constant->GetType()));
4045  if (constant->IsConstant() &&
4046      CanEncodeConstantAsImmediate(constant->AsConstant(), opcode)) {
4047    return Location::ConstantLocation(constant->AsConstant());
4048  }
4049  return Location::RequiresRegister();
4050}
4051
4052bool LocationsBuilderARM::CanEncodeConstantAsImmediate(HConstant* input_cst,
4053                                                       Opcode opcode) {
4054  uint64_t value = static_cast<uint64_t>(Int64FromConstant(input_cst));
4055  if (Primitive::Is64BitType(input_cst->GetType())) {
4056    Opcode high_opcode = opcode;
4057    SetCc low_set_cc = kCcDontCare;
4058    switch (opcode) {
4059      case SUB:
4060        // Flip the operation to an ADD.
4061        value = -value;
4062        opcode = ADD;
4063        FALLTHROUGH_INTENDED;
4064      case ADD:
4065        if (Low32Bits(value) == 0u) {
4066          return CanEncodeConstantAsImmediate(High32Bits(value), opcode, kCcDontCare);
4067        }
4068        high_opcode = ADC;
4069        low_set_cc = kCcSet;
4070        break;
4071      default:
4072        break;
4073    }
4074    return CanEncodeConstantAsImmediate(Low32Bits(value), opcode, low_set_cc) &&
4075        CanEncodeConstantAsImmediate(High32Bits(value), high_opcode, kCcDontCare);
4076  } else {
4077    return CanEncodeConstantAsImmediate(Low32Bits(value), opcode);
4078  }
4079}
4080
4081bool LocationsBuilderARM::CanEncodeConstantAsImmediate(uint32_t value,
4082                                                       Opcode opcode,
4083                                                       SetCc set_cc) {
4084  ShifterOperand so;
4085  ArmAssembler* assembler = codegen_->GetAssembler();
4086  if (assembler->ShifterOperandCanHold(kNoRegister, kNoRegister, opcode, value, set_cc, &so)) {
4087    return true;
4088  }
4089  Opcode neg_opcode = kNoOperand;
4090  switch (opcode) {
4091    case AND: neg_opcode = BIC; value = ~value; break;
4092    case ORR: neg_opcode = ORN; value = ~value; break;
4093    case ADD: neg_opcode = SUB; value = -value; break;
4094    case ADC: neg_opcode = SBC; value = ~value; break;
4095    case SUB: neg_opcode = ADD; value = -value; break;
4096    case SBC: neg_opcode = ADC; value = ~value; break;
4097    default:
4098      return false;
4099  }
4100  return assembler->ShifterOperandCanHold(kNoRegister, kNoRegister, neg_opcode, value, set_cc, &so);
4101}
4102
4103void InstructionCodeGeneratorARM::HandleFieldGet(HInstruction* instruction,
4104                                                 const FieldInfo& field_info) {
4105  DCHECK(instruction->IsInstanceFieldGet() || instruction->IsStaticFieldGet());
4106
4107  LocationSummary* locations = instruction->GetLocations();
4108  Location base_loc = locations->InAt(0);
4109  Register base = base_loc.AsRegister<Register>();
4110  Location out = locations->Out();
4111  bool is_volatile = field_info.IsVolatile();
4112  bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
4113  Primitive::Type field_type = field_info.GetFieldType();
4114  uint32_t offset = field_info.GetFieldOffset().Uint32Value();
4115
4116  switch (field_type) {
4117    case Primitive::kPrimBoolean:
4118      __ LoadFromOffset(kLoadUnsignedByte, out.AsRegister<Register>(), base, offset);
4119      break;
4120
4121    case Primitive::kPrimByte:
4122      __ LoadFromOffset(kLoadSignedByte, out.AsRegister<Register>(), base, offset);
4123      break;
4124
4125    case Primitive::kPrimShort:
4126      __ LoadFromOffset(kLoadSignedHalfword, out.AsRegister<Register>(), base, offset);
4127      break;
4128
4129    case Primitive::kPrimChar:
4130      __ LoadFromOffset(kLoadUnsignedHalfword, out.AsRegister<Register>(), base, offset);
4131      break;
4132
4133    case Primitive::kPrimInt:
4134      __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), base, offset);
4135      break;
4136
4137    case Primitive::kPrimNot: {
4138      // /* HeapReference<Object> */ out = *(base + offset)
4139      if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
4140        Location temp_loc = locations->GetTemp(0);
4141        // Note that a potential implicit null check is handled in this
4142        // CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier call.
4143        codegen_->GenerateFieldLoadWithBakerReadBarrier(
4144            instruction, out, base, offset, temp_loc, /* needs_null_check */ true);
4145        if (is_volatile) {
4146          codegen_->GenerateMemoryBarrier(MemBarrierKind::kLoadAny);
4147        }
4148      } else {
4149        __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), base, offset);
4150        codegen_->MaybeRecordImplicitNullCheck(instruction);
4151        if (is_volatile) {
4152          codegen_->GenerateMemoryBarrier(MemBarrierKind::kLoadAny);
4153        }
4154        // If read barriers are enabled, emit read barriers other than
4155        // Baker's using a slow path (and also unpoison the loaded
4156        // reference, if heap poisoning is enabled).
4157        codegen_->MaybeGenerateReadBarrierSlow(instruction, out, out, base_loc, offset);
4158      }
4159      break;
4160    }
4161
4162    case Primitive::kPrimLong:
4163      if (is_volatile && !atomic_ldrd_strd) {
4164        GenerateWideAtomicLoad(base, offset,
4165                               out.AsRegisterPairLow<Register>(),
4166                               out.AsRegisterPairHigh<Register>());
4167      } else {
4168        __ LoadFromOffset(kLoadWordPair, out.AsRegisterPairLow<Register>(), base, offset);
4169      }
4170      break;
4171
4172    case Primitive::kPrimFloat:
4173      __ LoadSFromOffset(out.AsFpuRegister<SRegister>(), base, offset);
4174      break;
4175
4176    case Primitive::kPrimDouble: {
4177      DRegister out_reg = FromLowSToD(out.AsFpuRegisterPairLow<SRegister>());
4178      if (is_volatile && !atomic_ldrd_strd) {
4179        Register lo = locations->GetTemp(0).AsRegister<Register>();
4180        Register hi = locations->GetTemp(1).AsRegister<Register>();
4181        GenerateWideAtomicLoad(base, offset, lo, hi);
4182        codegen_->MaybeRecordImplicitNullCheck(instruction);
4183        __ vmovdrr(out_reg, lo, hi);
4184      } else {
4185        __ LoadDFromOffset(out_reg, base, offset);
4186        codegen_->MaybeRecordImplicitNullCheck(instruction);
4187      }
4188      break;
4189    }
4190
4191    case Primitive::kPrimVoid:
4192      LOG(FATAL) << "Unreachable type " << field_type;
4193      UNREACHABLE();
4194  }
4195
4196  if (field_type == Primitive::kPrimNot || field_type == Primitive::kPrimDouble) {
4197    // Potential implicit null checks, in the case of reference or
4198    // double fields, are handled in the previous switch statement.
4199  } else {
4200    codegen_->MaybeRecordImplicitNullCheck(instruction);
4201  }
4202
4203  if (is_volatile) {
4204    if (field_type == Primitive::kPrimNot) {
4205      // Memory barriers, in the case of references, are also handled
4206      // in the previous switch statement.
4207    } else {
4208      codegen_->GenerateMemoryBarrier(MemBarrierKind::kLoadAny);
4209    }
4210  }
4211}
4212
4213void LocationsBuilderARM::VisitInstanceFieldSet(HInstanceFieldSet* instruction) {
4214  HandleFieldSet(instruction, instruction->GetFieldInfo());
4215}
4216
4217void InstructionCodeGeneratorARM::VisitInstanceFieldSet(HInstanceFieldSet* instruction) {
4218  HandleFieldSet(instruction, instruction->GetFieldInfo(), instruction->GetValueCanBeNull());
4219}
4220
4221void LocationsBuilderARM::VisitInstanceFieldGet(HInstanceFieldGet* instruction) {
4222  HandleFieldGet(instruction, instruction->GetFieldInfo());
4223}
4224
4225void InstructionCodeGeneratorARM::VisitInstanceFieldGet(HInstanceFieldGet* instruction) {
4226  HandleFieldGet(instruction, instruction->GetFieldInfo());
4227}
4228
4229void LocationsBuilderARM::VisitStaticFieldGet(HStaticFieldGet* instruction) {
4230  HandleFieldGet(instruction, instruction->GetFieldInfo());
4231}
4232
4233void InstructionCodeGeneratorARM::VisitStaticFieldGet(HStaticFieldGet* instruction) {
4234  HandleFieldGet(instruction, instruction->GetFieldInfo());
4235}
4236
4237void LocationsBuilderARM::VisitStaticFieldSet(HStaticFieldSet* instruction) {
4238  HandleFieldSet(instruction, instruction->GetFieldInfo());
4239}
4240
4241void InstructionCodeGeneratorARM::VisitStaticFieldSet(HStaticFieldSet* instruction) {
4242  HandleFieldSet(instruction, instruction->GetFieldInfo(), instruction->GetValueCanBeNull());
4243}
4244
4245void LocationsBuilderARM::VisitUnresolvedInstanceFieldGet(
4246    HUnresolvedInstanceFieldGet* instruction) {
4247  FieldAccessCallingConventionARM calling_convention;
4248  codegen_->CreateUnresolvedFieldLocationSummary(
4249      instruction, instruction->GetFieldType(), calling_convention);
4250}
4251
4252void InstructionCodeGeneratorARM::VisitUnresolvedInstanceFieldGet(
4253    HUnresolvedInstanceFieldGet* instruction) {
4254  FieldAccessCallingConventionARM calling_convention;
4255  codegen_->GenerateUnresolvedFieldAccess(instruction,
4256                                          instruction->GetFieldType(),
4257                                          instruction->GetFieldIndex(),
4258                                          instruction->GetDexPc(),
4259                                          calling_convention);
4260}
4261
4262void LocationsBuilderARM::VisitUnresolvedInstanceFieldSet(
4263    HUnresolvedInstanceFieldSet* instruction) {
4264  FieldAccessCallingConventionARM calling_convention;
4265  codegen_->CreateUnresolvedFieldLocationSummary(
4266      instruction, instruction->GetFieldType(), calling_convention);
4267}
4268
4269void InstructionCodeGeneratorARM::VisitUnresolvedInstanceFieldSet(
4270    HUnresolvedInstanceFieldSet* instruction) {
4271  FieldAccessCallingConventionARM calling_convention;
4272  codegen_->GenerateUnresolvedFieldAccess(instruction,
4273                                          instruction->GetFieldType(),
4274                                          instruction->GetFieldIndex(),
4275                                          instruction->GetDexPc(),
4276                                          calling_convention);
4277}
4278
4279void LocationsBuilderARM::VisitUnresolvedStaticFieldGet(
4280    HUnresolvedStaticFieldGet* instruction) {
4281  FieldAccessCallingConventionARM calling_convention;
4282  codegen_->CreateUnresolvedFieldLocationSummary(
4283      instruction, instruction->GetFieldType(), calling_convention);
4284}
4285
4286void InstructionCodeGeneratorARM::VisitUnresolvedStaticFieldGet(
4287    HUnresolvedStaticFieldGet* instruction) {
4288  FieldAccessCallingConventionARM calling_convention;
4289  codegen_->GenerateUnresolvedFieldAccess(instruction,
4290                                          instruction->GetFieldType(),
4291                                          instruction->GetFieldIndex(),
4292                                          instruction->GetDexPc(),
4293                                          calling_convention);
4294}
4295
4296void LocationsBuilderARM::VisitUnresolvedStaticFieldSet(
4297    HUnresolvedStaticFieldSet* instruction) {
4298  FieldAccessCallingConventionARM calling_convention;
4299  codegen_->CreateUnresolvedFieldLocationSummary(
4300      instruction, instruction->GetFieldType(), calling_convention);
4301}
4302
4303void InstructionCodeGeneratorARM::VisitUnresolvedStaticFieldSet(
4304    HUnresolvedStaticFieldSet* instruction) {
4305  FieldAccessCallingConventionARM calling_convention;
4306  codegen_->GenerateUnresolvedFieldAccess(instruction,
4307                                          instruction->GetFieldType(),
4308                                          instruction->GetFieldIndex(),
4309                                          instruction->GetDexPc(),
4310                                          calling_convention);
4311}
4312
4313void LocationsBuilderARM::VisitNullCheck(HNullCheck* instruction) {
4314  LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock()
4315      ? LocationSummary::kCallOnSlowPath
4316      : LocationSummary::kNoCall;
4317  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
4318  locations->SetInAt(0, Location::RequiresRegister());
4319  if (instruction->HasUses()) {
4320    locations->SetOut(Location::SameAsFirstInput());
4321  }
4322}
4323
4324void CodeGeneratorARM::GenerateImplicitNullCheck(HNullCheck* instruction) {
4325  if (CanMoveNullCheckToUser(instruction)) {
4326    return;
4327  }
4328  Location obj = instruction->GetLocations()->InAt(0);
4329
4330  __ LoadFromOffset(kLoadWord, IP, obj.AsRegister<Register>(), 0);
4331  RecordPcInfo(instruction, instruction->GetDexPc());
4332}
4333
4334void CodeGeneratorARM::GenerateExplicitNullCheck(HNullCheck* instruction) {
4335  SlowPathCode* slow_path = new (GetGraph()->GetArena()) NullCheckSlowPathARM(instruction);
4336  AddSlowPath(slow_path);
4337
4338  LocationSummary* locations = instruction->GetLocations();
4339  Location obj = locations->InAt(0);
4340
4341  __ CompareAndBranchIfZero(obj.AsRegister<Register>(), slow_path->GetEntryLabel());
4342}
4343
4344void InstructionCodeGeneratorARM::VisitNullCheck(HNullCheck* instruction) {
4345  codegen_->GenerateNullCheck(instruction);
4346}
4347
4348static LoadOperandType GetLoadOperandType(Primitive::Type type) {
4349  switch (type) {
4350    case Primitive::kPrimNot:
4351      return kLoadWord;
4352    case Primitive::kPrimBoolean:
4353      return kLoadUnsignedByte;
4354    case Primitive::kPrimByte:
4355      return kLoadSignedByte;
4356    case Primitive::kPrimChar:
4357      return kLoadUnsignedHalfword;
4358    case Primitive::kPrimShort:
4359      return kLoadSignedHalfword;
4360    case Primitive::kPrimInt:
4361      return kLoadWord;
4362    case Primitive::kPrimLong:
4363      return kLoadWordPair;
4364    case Primitive::kPrimFloat:
4365      return kLoadSWord;
4366    case Primitive::kPrimDouble:
4367      return kLoadDWord;
4368    default:
4369      LOG(FATAL) << "Unreachable type " << type;
4370      UNREACHABLE();
4371  }
4372}
4373
4374static StoreOperandType GetStoreOperandType(Primitive::Type type) {
4375  switch (type) {
4376    case Primitive::kPrimNot:
4377      return kStoreWord;
4378    case Primitive::kPrimBoolean:
4379    case Primitive::kPrimByte:
4380      return kStoreByte;
4381    case Primitive::kPrimChar:
4382    case Primitive::kPrimShort:
4383      return kStoreHalfword;
4384    case Primitive::kPrimInt:
4385      return kStoreWord;
4386    case Primitive::kPrimLong:
4387      return kStoreWordPair;
4388    case Primitive::kPrimFloat:
4389      return kStoreSWord;
4390    case Primitive::kPrimDouble:
4391      return kStoreDWord;
4392    default:
4393      LOG(FATAL) << "Unreachable type " << type;
4394      UNREACHABLE();
4395  }
4396}
4397
4398void CodeGeneratorARM::LoadFromShiftedRegOffset(Primitive::Type type,
4399                                                Location out_loc,
4400                                                Register base,
4401                                                Register reg_offset,
4402                                                Condition cond) {
4403  uint32_t shift_count = Primitive::ComponentSizeShift(type);
4404  Address mem_address(base, reg_offset, Shift::LSL, shift_count);
4405
4406  switch (type) {
4407    case Primitive::kPrimByte:
4408      __ ldrsb(out_loc.AsRegister<Register>(), mem_address, cond);
4409      break;
4410    case Primitive::kPrimBoolean:
4411      __ ldrb(out_loc.AsRegister<Register>(), mem_address, cond);
4412      break;
4413    case Primitive::kPrimShort:
4414      __ ldrsh(out_loc.AsRegister<Register>(), mem_address, cond);
4415      break;
4416    case Primitive::kPrimChar:
4417      __ ldrh(out_loc.AsRegister<Register>(), mem_address, cond);
4418      break;
4419    case Primitive::kPrimNot:
4420    case Primitive::kPrimInt:
4421      __ ldr(out_loc.AsRegister<Register>(), mem_address, cond);
4422      break;
4423    // T32 doesn't support LoadFromShiftedRegOffset mem address mode for these types.
4424    case Primitive::kPrimLong:
4425    case Primitive::kPrimFloat:
4426    case Primitive::kPrimDouble:
4427    default:
4428      LOG(FATAL) << "Unreachable type " << type;
4429      UNREACHABLE();
4430  }
4431}
4432
4433void CodeGeneratorARM::StoreToShiftedRegOffset(Primitive::Type type,
4434                                               Location loc,
4435                                               Register base,
4436                                               Register reg_offset,
4437                                               Condition cond) {
4438  uint32_t shift_count = Primitive::ComponentSizeShift(type);
4439  Address mem_address(base, reg_offset, Shift::LSL, shift_count);
4440
4441  switch (type) {
4442    case Primitive::kPrimByte:
4443    case Primitive::kPrimBoolean:
4444      __ strb(loc.AsRegister<Register>(), mem_address, cond);
4445      break;
4446    case Primitive::kPrimShort:
4447    case Primitive::kPrimChar:
4448      __ strh(loc.AsRegister<Register>(), mem_address, cond);
4449      break;
4450    case Primitive::kPrimNot:
4451    case Primitive::kPrimInt:
4452      __ str(loc.AsRegister<Register>(), mem_address, cond);
4453      break;
4454    // T32 doesn't support StoreToShiftedRegOffset mem address mode for these types.
4455    case Primitive::kPrimLong:
4456    case Primitive::kPrimFloat:
4457    case Primitive::kPrimDouble:
4458    default:
4459      LOG(FATAL) << "Unreachable type " << type;
4460      UNREACHABLE();
4461  }
4462}
4463
4464void LocationsBuilderARM::VisitArrayGet(HArrayGet* instruction) {
4465  bool object_array_get_with_read_barrier =
4466      kEmitCompilerReadBarrier && (instruction->GetType() == Primitive::kPrimNot);
4467  LocationSummary* locations =
4468      new (GetGraph()->GetArena()) LocationSummary(instruction,
4469                                                   object_array_get_with_read_barrier ?
4470                                                       LocationSummary::kCallOnSlowPath :
4471                                                       LocationSummary::kNoCall);
4472  locations->SetInAt(0, Location::RequiresRegister());
4473  locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1)));
4474  if (Primitive::IsFloatingPointType(instruction->GetType())) {
4475    locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
4476  } else {
4477    // The output overlaps in the case of an object array get with
4478    // read barriers enabled: we do not want the move to overwrite the
4479    // array's location, as we need it to emit the read barrier.
4480    locations->SetOut(
4481        Location::RequiresRegister(),
4482        object_array_get_with_read_barrier ? Location::kOutputOverlap : Location::kNoOutputOverlap);
4483  }
4484  // We need a temporary register for the read barrier marking slow
4485  // path in CodeGeneratorARM::GenerateArrayLoadWithBakerReadBarrier.
4486  if (object_array_get_with_read_barrier && kUseBakerReadBarrier) {
4487    locations->AddTemp(Location::RequiresRegister());
4488  }
4489}
4490
4491void InstructionCodeGeneratorARM::VisitArrayGet(HArrayGet* instruction) {
4492  LocationSummary* locations = instruction->GetLocations();
4493  Location obj_loc = locations->InAt(0);
4494  Register obj = obj_loc.AsRegister<Register>();
4495  Location index = locations->InAt(1);
4496  Location out_loc = locations->Out();
4497  uint32_t data_offset = CodeGenerator::GetArrayDataOffset(instruction);
4498  Primitive::Type type = instruction->GetType();
4499  HInstruction* array_instr = instruction->GetArray();
4500  bool has_intermediate_address = array_instr->IsIntermediateAddress();
4501  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
4502  DCHECK(!(has_intermediate_address && kEmitCompilerReadBarrier));
4503
4504  switch (type) {
4505    case Primitive::kPrimBoolean:
4506    case Primitive::kPrimByte:
4507    case Primitive::kPrimShort:
4508    case Primitive::kPrimChar:
4509    case Primitive::kPrimInt: {
4510      if (index.IsConstant()) {
4511        int32_t const_index = index.GetConstant()->AsIntConstant()->GetValue();
4512        uint32_t full_offset = data_offset + (const_index << Primitive::ComponentSizeShift(type));
4513
4514        LoadOperandType load_type = GetLoadOperandType(type);
4515        __ LoadFromOffset(load_type, out_loc.AsRegister<Register>(), obj, full_offset);
4516      } else {
4517        Register temp = IP;
4518
4519        if (has_intermediate_address) {
4520          // We do not need to compute the intermediate address from the array: the
4521          // input instruction has done it already. See the comment in
4522          // `TryExtractArrayAccessAddress()`.
4523          if (kIsDebugBuild) {
4524            HIntermediateAddress* tmp = array_instr->AsIntermediateAddress();
4525            DCHECK_EQ(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64(), data_offset);
4526          }
4527          temp = obj;
4528        } else {
4529          __ add(temp, obj, ShifterOperand(data_offset));
4530        }
4531        codegen_->LoadFromShiftedRegOffset(type, out_loc, temp, index.AsRegister<Register>());
4532      }
4533      break;
4534    }
4535
4536    case Primitive::kPrimNot: {
4537      static_assert(
4538          sizeof(mirror::HeapReference<mirror::Object>) == sizeof(int32_t),
4539          "art::mirror::HeapReference<art::mirror::Object> and int32_t have different sizes.");
4540      // /* HeapReference<Object> */ out =
4541      //     *(obj + data_offset + index * sizeof(HeapReference<Object>))
4542      if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
4543        Location temp = locations->GetTemp(0);
4544        // Note that a potential implicit null check is handled in this
4545        // CodeGeneratorARM::GenerateArrayLoadWithBakerReadBarrier call.
4546        codegen_->GenerateArrayLoadWithBakerReadBarrier(
4547            instruction, out_loc, obj, data_offset, index, temp, /* needs_null_check */ true);
4548      } else {
4549        Register out = out_loc.AsRegister<Register>();
4550        if (index.IsConstant()) {
4551          size_t offset =
4552              (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4553          __ LoadFromOffset(kLoadWord, out, obj, offset);
4554          codegen_->MaybeRecordImplicitNullCheck(instruction);
4555          // If read barriers are enabled, emit read barriers other than
4556          // Baker's using a slow path (and also unpoison the loaded
4557          // reference, if heap poisoning is enabled).
4558          codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset);
4559        } else {
4560          Register temp = IP;
4561
4562          if (has_intermediate_address) {
4563            // We do not need to compute the intermediate address from the array: the
4564            // input instruction has done it already. See the comment in
4565            // `TryExtractArrayAccessAddress()`.
4566            if (kIsDebugBuild) {
4567              HIntermediateAddress* tmp = array_instr->AsIntermediateAddress();
4568              DCHECK_EQ(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64(), data_offset);
4569            }
4570            temp = obj;
4571          } else {
4572            __ add(temp, obj, ShifterOperand(data_offset));
4573          }
4574          codegen_->LoadFromShiftedRegOffset(type, out_loc, temp, index.AsRegister<Register>());
4575
4576          codegen_->MaybeRecordImplicitNullCheck(instruction);
4577          // If read barriers are enabled, emit read barriers other than
4578          // Baker's using a slow path (and also unpoison the loaded
4579          // reference, if heap poisoning is enabled).
4580          codegen_->MaybeGenerateReadBarrierSlow(
4581              instruction, out_loc, out_loc, obj_loc, data_offset, index);
4582        }
4583      }
4584      break;
4585    }
4586
4587    case Primitive::kPrimLong: {
4588      if (index.IsConstant()) {
4589        size_t offset =
4590            (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4591        __ LoadFromOffset(kLoadWordPair, out_loc.AsRegisterPairLow<Register>(), obj, offset);
4592      } else {
4593        __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4594        __ LoadFromOffset(kLoadWordPair, out_loc.AsRegisterPairLow<Register>(), IP, data_offset);
4595      }
4596      break;
4597    }
4598
4599    case Primitive::kPrimFloat: {
4600      SRegister out = out_loc.AsFpuRegister<SRegister>();
4601      if (index.IsConstant()) {
4602        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4603        __ LoadSFromOffset(out, obj, offset);
4604      } else {
4605        __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4));
4606        __ LoadSFromOffset(out, IP, data_offset);
4607      }
4608      break;
4609    }
4610
4611    case Primitive::kPrimDouble: {
4612      SRegister out = out_loc.AsFpuRegisterPairLow<SRegister>();
4613      if (index.IsConstant()) {
4614        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4615        __ LoadDFromOffset(FromLowSToD(out), obj, offset);
4616      } else {
4617        __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4618        __ LoadDFromOffset(FromLowSToD(out), IP, data_offset);
4619      }
4620      break;
4621    }
4622
4623    case Primitive::kPrimVoid:
4624      LOG(FATAL) << "Unreachable type " << type;
4625      UNREACHABLE();
4626  }
4627
4628  if (type == Primitive::kPrimNot) {
4629    // Potential implicit null checks, in the case of reference
4630    // arrays, are handled in the previous switch statement.
4631  } else {
4632    codegen_->MaybeRecordImplicitNullCheck(instruction);
4633  }
4634}
4635
4636void LocationsBuilderARM::VisitArraySet(HArraySet* instruction) {
4637  Primitive::Type value_type = instruction->GetComponentType();
4638
4639  bool needs_write_barrier =
4640      CodeGenerator::StoreNeedsWriteBarrier(value_type, instruction->GetValue());
4641  bool may_need_runtime_call_for_type_check = instruction->NeedsTypeCheck();
4642
4643  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(
4644      instruction,
4645      may_need_runtime_call_for_type_check ?
4646          LocationSummary::kCallOnSlowPath :
4647          LocationSummary::kNoCall);
4648
4649  locations->SetInAt(0, Location::RequiresRegister());
4650  locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1)));
4651  if (Primitive::IsFloatingPointType(value_type)) {
4652    locations->SetInAt(2, Location::RequiresFpuRegister());
4653  } else {
4654    locations->SetInAt(2, Location::RequiresRegister());
4655  }
4656  if (needs_write_barrier) {
4657    // Temporary registers for the write barrier.
4658    // These registers may be used for Baker read barriers too.
4659    locations->AddTemp(Location::RequiresRegister());  // Possibly used for ref. poisoning too.
4660    locations->AddTemp(Location::RequiresRegister());
4661  }
4662}
4663
4664void InstructionCodeGeneratorARM::VisitArraySet(HArraySet* instruction) {
4665  LocationSummary* locations = instruction->GetLocations();
4666  Location array_loc = locations->InAt(0);
4667  Register array = array_loc.AsRegister<Register>();
4668  Location index = locations->InAt(1);
4669  Primitive::Type value_type = instruction->GetComponentType();
4670  bool may_need_runtime_call_for_type_check = instruction->NeedsTypeCheck();
4671  bool needs_write_barrier =
4672      CodeGenerator::StoreNeedsWriteBarrier(value_type, instruction->GetValue());
4673  uint32_t data_offset =
4674      mirror::Array::DataOffset(Primitive::ComponentSize(value_type)).Uint32Value();
4675  Location value_loc = locations->InAt(2);
4676  HInstruction* array_instr = instruction->GetArray();
4677  bool has_intermediate_address = array_instr->IsIntermediateAddress();
4678  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
4679  DCHECK(!(has_intermediate_address && kEmitCompilerReadBarrier));
4680
4681  switch (value_type) {
4682    case Primitive::kPrimBoolean:
4683    case Primitive::kPrimByte:
4684    case Primitive::kPrimShort:
4685    case Primitive::kPrimChar:
4686    case Primitive::kPrimInt: {
4687      if (index.IsConstant()) {
4688        int32_t const_index = index.GetConstant()->AsIntConstant()->GetValue();
4689        uint32_t full_offset =
4690            data_offset + (const_index << Primitive::ComponentSizeShift(value_type));
4691        StoreOperandType store_type = GetStoreOperandType(value_type);
4692        __ StoreToOffset(store_type, value_loc.AsRegister<Register>(), array, full_offset);
4693      } else {
4694        Register temp = IP;
4695
4696        if (has_intermediate_address) {
4697          // We do not need to compute the intermediate address from the array: the
4698          // input instruction has done it already. See the comment in
4699          // `TryExtractArrayAccessAddress()`.
4700          if (kIsDebugBuild) {
4701            HIntermediateAddress* tmp = array_instr->AsIntermediateAddress();
4702            DCHECK(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64() == data_offset);
4703          }
4704          temp = array;
4705        } else {
4706          __ add(temp, array, ShifterOperand(data_offset));
4707        }
4708        codegen_->StoreToShiftedRegOffset(value_type,
4709                                          value_loc,
4710                                          temp,
4711                                          index.AsRegister<Register>());
4712      }
4713      break;
4714    }
4715
4716    case Primitive::kPrimNot: {
4717      Register value = value_loc.AsRegister<Register>();
4718      // TryExtractArrayAccessAddress optimization is never applied for non-primitive ArraySet.
4719      // See the comment in instruction_simplifier_shared.cc.
4720      DCHECK(!has_intermediate_address);
4721
4722      if (instruction->InputAt(2)->IsNullConstant()) {
4723        // Just setting null.
4724        if (index.IsConstant()) {
4725          size_t offset =
4726              (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4727          __ StoreToOffset(kStoreWord, value, array, offset);
4728        } else {
4729          DCHECK(index.IsRegister()) << index;
4730          __ add(IP, array, ShifterOperand(data_offset));
4731          codegen_->StoreToShiftedRegOffset(value_type,
4732                                            value_loc,
4733                                            IP,
4734                                            index.AsRegister<Register>());
4735        }
4736        codegen_->MaybeRecordImplicitNullCheck(instruction);
4737        DCHECK(!needs_write_barrier);
4738        DCHECK(!may_need_runtime_call_for_type_check);
4739        break;
4740      }
4741
4742      DCHECK(needs_write_barrier);
4743      Location temp1_loc = locations->GetTemp(0);
4744      Register temp1 = temp1_loc.AsRegister<Register>();
4745      Location temp2_loc = locations->GetTemp(1);
4746      Register temp2 = temp2_loc.AsRegister<Register>();
4747      uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
4748      uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
4749      uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
4750      Label done;
4751      SlowPathCode* slow_path = nullptr;
4752
4753      if (may_need_runtime_call_for_type_check) {
4754        slow_path = new (GetGraph()->GetArena()) ArraySetSlowPathARM(instruction);
4755        codegen_->AddSlowPath(slow_path);
4756        if (instruction->GetValueCanBeNull()) {
4757          Label non_zero;
4758          __ CompareAndBranchIfNonZero(value, &non_zero);
4759          if (index.IsConstant()) {
4760            size_t offset =
4761               (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4762            __ StoreToOffset(kStoreWord, value, array, offset);
4763          } else {
4764            DCHECK(index.IsRegister()) << index;
4765            __ add(IP, array, ShifterOperand(data_offset));
4766            codegen_->StoreToShiftedRegOffset(value_type,
4767                                              value_loc,
4768                                              IP,
4769                                              index.AsRegister<Register>());
4770          }
4771          codegen_->MaybeRecordImplicitNullCheck(instruction);
4772          __ b(&done);
4773          __ Bind(&non_zero);
4774        }
4775
4776        if (kEmitCompilerReadBarrier) {
4777          if (!kUseBakerReadBarrier) {
4778            // When (non-Baker) read barriers are enabled, the type
4779            // checking instrumentation requires two read barriers
4780            // generated by CodeGeneratorARM::GenerateReadBarrierSlow:
4781            //
4782            //   __ Mov(temp2, temp1);
4783            //   // /* HeapReference<Class> */ temp1 = temp1->component_type_
4784            //   __ LoadFromOffset(kLoadWord, temp1, temp1, component_offset);
4785            //   codegen_->GenerateReadBarrierSlow(
4786            //       instruction, temp1_loc, temp1_loc, temp2_loc, component_offset);
4787            //
4788            //   // /* HeapReference<Class> */ temp2 = value->klass_
4789            //   __ LoadFromOffset(kLoadWord, temp2, value, class_offset);
4790            //   codegen_->GenerateReadBarrierSlow(
4791            //       instruction, temp2_loc, temp2_loc, value_loc, class_offset, temp1_loc);
4792            //
4793            //   __ cmp(temp1, ShifterOperand(temp2));
4794            //
4795            // However, the second read barrier may trash `temp`, as it
4796            // is a temporary register, and as such would not be saved
4797            // along with live registers before calling the runtime (nor
4798            // restored afterwards).  So in this case, we bail out and
4799            // delegate the work to the array set slow path.
4800            //
4801            // TODO: Extend the register allocator to support a new
4802            // "(locally) live temp" location so as to avoid always
4803            // going into the slow path when read barriers are enabled?
4804            //
4805            // There is no such problem with Baker read barriers (see below).
4806            __ b(slow_path->GetEntryLabel());
4807          } else {
4808            Register temp3 = IP;
4809            Location temp3_loc = Location::RegisterLocation(temp3);
4810
4811            // Note: `temp3` (scratch register IP) cannot be used as
4812            // `ref` argument of GenerateFieldLoadWithBakerReadBarrier
4813            // calls below (see ReadBarrierMarkSlowPathARM for more
4814            // details).
4815
4816            // /* HeapReference<Class> */ temp1 = array->klass_
4817            codegen_->GenerateFieldLoadWithBakerReadBarrier(instruction,
4818                                                            temp1_loc,
4819                                                            array,
4820                                                            class_offset,
4821                                                            temp3_loc,
4822                                                            /* needs_null_check */ true);
4823
4824            // /* HeapReference<Class> */ temp1 = temp1->component_type_
4825            codegen_->GenerateFieldLoadWithBakerReadBarrier(instruction,
4826                                                            temp1_loc,
4827                                                            temp1,
4828                                                            component_offset,
4829                                                            temp3_loc,
4830                                                            /* needs_null_check */ false);
4831            // Register `temp1` is not trashed by the read barrier
4832            // emitted by GenerateFieldLoadWithBakerReadBarrier below,
4833            // as that method produces a call to a ReadBarrierMarkRegX
4834            // entry point, which saves all potentially live registers,
4835            // including temporaries such a `temp1`.
4836            // /* HeapReference<Class> */ temp2 = value->klass_
4837            codegen_->GenerateFieldLoadWithBakerReadBarrier(instruction,
4838                                                            temp2_loc,
4839                                                            value,
4840                                                            class_offset,
4841                                                            temp3_loc,
4842                                                            /* needs_null_check */ false);
4843            // If heap poisoning is enabled, `temp1` and `temp2` have
4844            // been unpoisoned by the the previous calls to
4845            // CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier.
4846            __ cmp(temp1, ShifterOperand(temp2));
4847
4848            if (instruction->StaticTypeOfArrayIsObjectArray()) {
4849              Label do_put;
4850              __ b(&do_put, EQ);
4851              // We do not need to emit a read barrier for the
4852              // following heap reference load, as `temp1` is only used
4853              // in a comparison with null below, and this reference
4854              // is not kept afterwards.
4855              // /* HeapReference<Class> */ temp1 = temp1->super_class_
4856              __ LoadFromOffset(kLoadWord, temp1, temp1, super_offset);
4857              // If heap poisoning is enabled, no need to unpoison
4858              // `temp`, as we are comparing against null below.
4859              __ CompareAndBranchIfNonZero(temp1, slow_path->GetEntryLabel());
4860              __ Bind(&do_put);
4861            } else {
4862              __ b(slow_path->GetEntryLabel(), NE);
4863            }
4864          }
4865        } else {
4866          // Non read barrier code.
4867
4868          // /* HeapReference<Class> */ temp1 = array->klass_
4869          __ LoadFromOffset(kLoadWord, temp1, array, class_offset);
4870          codegen_->MaybeRecordImplicitNullCheck(instruction);
4871          __ MaybeUnpoisonHeapReference(temp1);
4872
4873          // /* HeapReference<Class> */ temp1 = temp1->component_type_
4874          __ LoadFromOffset(kLoadWord, temp1, temp1, component_offset);
4875          // /* HeapReference<Class> */ temp2 = value->klass_
4876          __ LoadFromOffset(kLoadWord, temp2, value, class_offset);
4877          // If heap poisoning is enabled, no need to unpoison `temp1`
4878          // nor `temp2`, as we are comparing two poisoned references.
4879          __ cmp(temp1, ShifterOperand(temp2));
4880
4881          if (instruction->StaticTypeOfArrayIsObjectArray()) {
4882            Label do_put;
4883            __ b(&do_put, EQ);
4884            // If heap poisoning is enabled, the `temp1` reference has
4885            // not been unpoisoned yet; unpoison it now.
4886            __ MaybeUnpoisonHeapReference(temp1);
4887
4888            // /* HeapReference<Class> */ temp1 = temp1->super_class_
4889            __ LoadFromOffset(kLoadWord, temp1, temp1, super_offset);
4890            // If heap poisoning is enabled, no need to unpoison
4891            // `temp1`, as we are comparing against null below.
4892            __ CompareAndBranchIfNonZero(temp1, slow_path->GetEntryLabel());
4893            __ Bind(&do_put);
4894          } else {
4895            __ b(slow_path->GetEntryLabel(), NE);
4896          }
4897        }
4898      }
4899
4900      Register source = value;
4901      if (kPoisonHeapReferences) {
4902        // Note that in the case where `value` is a null reference,
4903        // we do not enter this block, as a null reference does not
4904        // need poisoning.
4905        DCHECK_EQ(value_type, Primitive::kPrimNot);
4906        __ Mov(temp1, value);
4907        __ PoisonHeapReference(temp1);
4908        source = temp1;
4909      }
4910
4911      if (index.IsConstant()) {
4912        size_t offset =
4913            (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4914        __ StoreToOffset(kStoreWord, source, array, offset);
4915      } else {
4916        DCHECK(index.IsRegister()) << index;
4917
4918        __ add(IP, array, ShifterOperand(data_offset));
4919        codegen_->StoreToShiftedRegOffset(value_type,
4920                                          Location::RegisterLocation(source),
4921                                          IP,
4922                                          index.AsRegister<Register>());
4923      }
4924
4925      if (!may_need_runtime_call_for_type_check) {
4926        codegen_->MaybeRecordImplicitNullCheck(instruction);
4927      }
4928
4929      codegen_->MarkGCCard(temp1, temp2, array, value, instruction->GetValueCanBeNull());
4930
4931      if (done.IsLinked()) {
4932        __ Bind(&done);
4933      }
4934
4935      if (slow_path != nullptr) {
4936        __ Bind(slow_path->GetExitLabel());
4937      }
4938
4939      break;
4940    }
4941
4942    case Primitive::kPrimLong: {
4943      Location value = locations->InAt(2);
4944      if (index.IsConstant()) {
4945        size_t offset =
4946            (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4947        __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), array, offset);
4948      } else {
4949        __ add(IP, array, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4950        __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), IP, data_offset);
4951      }
4952      break;
4953    }
4954
4955    case Primitive::kPrimFloat: {
4956      Location value = locations->InAt(2);
4957      DCHECK(value.IsFpuRegister());
4958      if (index.IsConstant()) {
4959        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4960        __ StoreSToOffset(value.AsFpuRegister<SRegister>(), array, offset);
4961      } else {
4962        __ add(IP, array, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4));
4963        __ StoreSToOffset(value.AsFpuRegister<SRegister>(), IP, data_offset);
4964      }
4965      break;
4966    }
4967
4968    case Primitive::kPrimDouble: {
4969      Location value = locations->InAt(2);
4970      DCHECK(value.IsFpuRegisterPair());
4971      if (index.IsConstant()) {
4972        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4973        __ StoreDToOffset(FromLowSToD(value.AsFpuRegisterPairLow<SRegister>()), array, offset);
4974      } else {
4975        __ add(IP, array, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4976        __ StoreDToOffset(FromLowSToD(value.AsFpuRegisterPairLow<SRegister>()), IP, data_offset);
4977      }
4978
4979      break;
4980    }
4981
4982    case Primitive::kPrimVoid:
4983      LOG(FATAL) << "Unreachable type " << value_type;
4984      UNREACHABLE();
4985  }
4986
4987  // Objects are handled in the switch.
4988  if (value_type != Primitive::kPrimNot) {
4989    codegen_->MaybeRecordImplicitNullCheck(instruction);
4990  }
4991}
4992
4993void LocationsBuilderARM::VisitArrayLength(HArrayLength* instruction) {
4994  LocationSummary* locations =
4995      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
4996  locations->SetInAt(0, Location::RequiresRegister());
4997  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
4998}
4999
5000void InstructionCodeGeneratorARM::VisitArrayLength(HArrayLength* instruction) {
5001  LocationSummary* locations = instruction->GetLocations();
5002  uint32_t offset = CodeGenerator::GetArrayLengthOffset(instruction);
5003  Register obj = locations->InAt(0).AsRegister<Register>();
5004  Register out = locations->Out().AsRegister<Register>();
5005  __ LoadFromOffset(kLoadWord, out, obj, offset);
5006  codegen_->MaybeRecordImplicitNullCheck(instruction);
5007}
5008
5009void LocationsBuilderARM::VisitIntermediateAddress(HIntermediateAddress* instruction) {
5010  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
5011  DCHECK(!kEmitCompilerReadBarrier);
5012  LocationSummary* locations =
5013      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
5014
5015  locations->SetInAt(0, Location::RequiresRegister());
5016  locations->SetInAt(1, Location::RegisterOrConstant(instruction->GetOffset()));
5017  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
5018}
5019
5020void InstructionCodeGeneratorARM::VisitIntermediateAddress(HIntermediateAddress* instruction) {
5021  LocationSummary* locations = instruction->GetLocations();
5022  Location out = locations->Out();
5023  Location first = locations->InAt(0);
5024  Location second = locations->InAt(1);
5025
5026  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
5027  DCHECK(!kEmitCompilerReadBarrier);
5028
5029  if (second.IsRegister()) {
5030    __ add(out.AsRegister<Register>(),
5031           first.AsRegister<Register>(),
5032           ShifterOperand(second.AsRegister<Register>()));
5033  } else {
5034    __ AddConstant(out.AsRegister<Register>(),
5035                   first.AsRegister<Register>(),
5036                   second.GetConstant()->AsIntConstant()->GetValue());
5037  }
5038}
5039
5040void LocationsBuilderARM::VisitBoundsCheck(HBoundsCheck* instruction) {
5041  LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock()
5042      ? LocationSummary::kCallOnSlowPath
5043      : LocationSummary::kNoCall;
5044  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
5045  locations->SetInAt(0, Location::RequiresRegister());
5046  locations->SetInAt(1, Location::RequiresRegister());
5047  if (instruction->HasUses()) {
5048    locations->SetOut(Location::SameAsFirstInput());
5049  }
5050}
5051
5052void InstructionCodeGeneratorARM::VisitBoundsCheck(HBoundsCheck* instruction) {
5053  LocationSummary* locations = instruction->GetLocations();
5054  SlowPathCode* slow_path =
5055      new (GetGraph()->GetArena()) BoundsCheckSlowPathARM(instruction);
5056  codegen_->AddSlowPath(slow_path);
5057
5058  Register index = locations->InAt(0).AsRegister<Register>();
5059  Register length = locations->InAt(1).AsRegister<Register>();
5060
5061  __ cmp(index, ShifterOperand(length));
5062  __ b(slow_path->GetEntryLabel(), HS);
5063}
5064
5065void CodeGeneratorARM::MarkGCCard(Register temp,
5066                                  Register card,
5067                                  Register object,
5068                                  Register value,
5069                                  bool can_be_null) {
5070  Label is_null;
5071  if (can_be_null) {
5072    __ CompareAndBranchIfZero(value, &is_null);
5073  }
5074  __ LoadFromOffset(kLoadWord, card, TR, Thread::CardTableOffset<kArmPointerSize>().Int32Value());
5075  __ Lsr(temp, object, gc::accounting::CardTable::kCardShift);
5076  __ strb(card, Address(card, temp));
5077  if (can_be_null) {
5078    __ Bind(&is_null);
5079  }
5080}
5081
5082void LocationsBuilderARM::VisitParallelMove(HParallelMove* instruction ATTRIBUTE_UNUSED) {
5083  LOG(FATAL) << "Unreachable";
5084}
5085
5086void InstructionCodeGeneratorARM::VisitParallelMove(HParallelMove* instruction) {
5087  codegen_->GetMoveResolver()->EmitNativeCode(instruction);
5088}
5089
5090void LocationsBuilderARM::VisitSuspendCheck(HSuspendCheck* instruction) {
5091  new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnSlowPath);
5092}
5093
5094void InstructionCodeGeneratorARM::VisitSuspendCheck(HSuspendCheck* instruction) {
5095  HBasicBlock* block = instruction->GetBlock();
5096  if (block->GetLoopInformation() != nullptr) {
5097    DCHECK(block->GetLoopInformation()->GetSuspendCheck() == instruction);
5098    // The back edge will generate the suspend check.
5099    return;
5100  }
5101  if (block->IsEntryBlock() && instruction->GetNext()->IsGoto()) {
5102    // The goto will generate the suspend check.
5103    return;
5104  }
5105  GenerateSuspendCheck(instruction, nullptr);
5106}
5107
5108void InstructionCodeGeneratorARM::GenerateSuspendCheck(HSuspendCheck* instruction,
5109                                                       HBasicBlock* successor) {
5110  SuspendCheckSlowPathARM* slow_path =
5111      down_cast<SuspendCheckSlowPathARM*>(instruction->GetSlowPath());
5112  if (slow_path == nullptr) {
5113    slow_path = new (GetGraph()->GetArena()) SuspendCheckSlowPathARM(instruction, successor);
5114    instruction->SetSlowPath(slow_path);
5115    codegen_->AddSlowPath(slow_path);
5116    if (successor != nullptr) {
5117      DCHECK(successor->IsLoopHeader());
5118      codegen_->ClearSpillSlotsFromLoopPhisInStackMap(instruction);
5119    }
5120  } else {
5121    DCHECK_EQ(slow_path->GetSuccessor(), successor);
5122  }
5123
5124  __ LoadFromOffset(
5125      kLoadUnsignedHalfword, IP, TR, Thread::ThreadFlagsOffset<kArmPointerSize>().Int32Value());
5126  if (successor == nullptr) {
5127    __ CompareAndBranchIfNonZero(IP, slow_path->GetEntryLabel());
5128    __ Bind(slow_path->GetReturnLabel());
5129  } else {
5130    __ CompareAndBranchIfZero(IP, codegen_->GetLabelOf(successor));
5131    __ b(slow_path->GetEntryLabel());
5132  }
5133}
5134
5135ArmAssembler* ParallelMoveResolverARM::GetAssembler() const {
5136  return codegen_->GetAssembler();
5137}
5138
5139void ParallelMoveResolverARM::EmitMove(size_t index) {
5140  MoveOperands* move = moves_[index];
5141  Location source = move->GetSource();
5142  Location destination = move->GetDestination();
5143
5144  if (source.IsRegister()) {
5145    if (destination.IsRegister()) {
5146      __ Mov(destination.AsRegister<Register>(), source.AsRegister<Register>());
5147    } else if (destination.IsFpuRegister()) {
5148      __ vmovsr(destination.AsFpuRegister<SRegister>(), source.AsRegister<Register>());
5149    } else {
5150      DCHECK(destination.IsStackSlot());
5151      __ StoreToOffset(kStoreWord, source.AsRegister<Register>(),
5152                       SP, destination.GetStackIndex());
5153    }
5154  } else if (source.IsStackSlot()) {
5155    if (destination.IsRegister()) {
5156      __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(),
5157                        SP, source.GetStackIndex());
5158    } else if (destination.IsFpuRegister()) {
5159      __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex());
5160    } else {
5161      DCHECK(destination.IsStackSlot());
5162      __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex());
5163      __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5164    }
5165  } else if (source.IsFpuRegister()) {
5166    if (destination.IsRegister()) {
5167      __ vmovrs(destination.AsRegister<Register>(), source.AsFpuRegister<SRegister>());
5168    } else if (destination.IsFpuRegister()) {
5169      __ vmovs(destination.AsFpuRegister<SRegister>(), source.AsFpuRegister<SRegister>());
5170    } else {
5171      DCHECK(destination.IsStackSlot());
5172      __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex());
5173    }
5174  } else if (source.IsDoubleStackSlot()) {
5175    if (destination.IsDoubleStackSlot()) {
5176      __ LoadDFromOffset(DTMP, SP, source.GetStackIndex());
5177      __ StoreDToOffset(DTMP, SP, destination.GetStackIndex());
5178    } else if (destination.IsRegisterPair()) {
5179      DCHECK(ExpectedPairLayout(destination));
5180      __ LoadFromOffset(
5181          kLoadWordPair, destination.AsRegisterPairLow<Register>(), SP, source.GetStackIndex());
5182    } else {
5183      DCHECK(destination.IsFpuRegisterPair()) << destination;
5184      __ LoadDFromOffset(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
5185                         SP,
5186                         source.GetStackIndex());
5187    }
5188  } else if (source.IsRegisterPair()) {
5189    if (destination.IsRegisterPair()) {
5190      __ Mov(destination.AsRegisterPairLow<Register>(), source.AsRegisterPairLow<Register>());
5191      __ Mov(destination.AsRegisterPairHigh<Register>(), source.AsRegisterPairHigh<Register>());
5192    } else if (destination.IsFpuRegisterPair()) {
5193      __ vmovdrr(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
5194                 source.AsRegisterPairLow<Register>(),
5195                 source.AsRegisterPairHigh<Register>());
5196    } else {
5197      DCHECK(destination.IsDoubleStackSlot()) << destination;
5198      DCHECK(ExpectedPairLayout(source));
5199      __ StoreToOffset(
5200          kStoreWordPair, source.AsRegisterPairLow<Register>(), SP, destination.GetStackIndex());
5201    }
5202  } else if (source.IsFpuRegisterPair()) {
5203    if (destination.IsRegisterPair()) {
5204      __ vmovrrd(destination.AsRegisterPairLow<Register>(),
5205                 destination.AsRegisterPairHigh<Register>(),
5206                 FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()));
5207    } else if (destination.IsFpuRegisterPair()) {
5208      __ vmovd(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
5209               FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()));
5210    } else {
5211      DCHECK(destination.IsDoubleStackSlot()) << destination;
5212      __ StoreDToOffset(FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()),
5213                        SP,
5214                        destination.GetStackIndex());
5215    }
5216  } else {
5217    DCHECK(source.IsConstant()) << source;
5218    HConstant* constant = source.GetConstant();
5219    if (constant->IsIntConstant() || constant->IsNullConstant()) {
5220      int32_t value = CodeGenerator::GetInt32ValueOf(constant);
5221      if (destination.IsRegister()) {
5222        __ LoadImmediate(destination.AsRegister<Register>(), value);
5223      } else {
5224        DCHECK(destination.IsStackSlot());
5225        __ LoadImmediate(IP, value);
5226        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5227      }
5228    } else if (constant->IsLongConstant()) {
5229      int64_t value = constant->AsLongConstant()->GetValue();
5230      if (destination.IsRegisterPair()) {
5231        __ LoadImmediate(destination.AsRegisterPairLow<Register>(), Low32Bits(value));
5232        __ LoadImmediate(destination.AsRegisterPairHigh<Register>(), High32Bits(value));
5233      } else {
5234        DCHECK(destination.IsDoubleStackSlot()) << destination;
5235        __ LoadImmediate(IP, Low32Bits(value));
5236        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5237        __ LoadImmediate(IP, High32Bits(value));
5238        __ StoreToOffset(kStoreWord, IP, SP, destination.GetHighStackIndex(kArmWordSize));
5239      }
5240    } else if (constant->IsDoubleConstant()) {
5241      double value = constant->AsDoubleConstant()->GetValue();
5242      if (destination.IsFpuRegisterPair()) {
5243        __ LoadDImmediate(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()), value);
5244      } else {
5245        DCHECK(destination.IsDoubleStackSlot()) << destination;
5246        uint64_t int_value = bit_cast<uint64_t, double>(value);
5247        __ LoadImmediate(IP, Low32Bits(int_value));
5248        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5249        __ LoadImmediate(IP, High32Bits(int_value));
5250        __ StoreToOffset(kStoreWord, IP, SP, destination.GetHighStackIndex(kArmWordSize));
5251      }
5252    } else {
5253      DCHECK(constant->IsFloatConstant()) << constant->DebugName();
5254      float value = constant->AsFloatConstant()->GetValue();
5255      if (destination.IsFpuRegister()) {
5256        __ LoadSImmediate(destination.AsFpuRegister<SRegister>(), value);
5257      } else {
5258        DCHECK(destination.IsStackSlot());
5259        __ LoadImmediate(IP, bit_cast<int32_t, float>(value));
5260        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5261      }
5262    }
5263  }
5264}
5265
5266void ParallelMoveResolverARM::Exchange(Register reg, int mem) {
5267  __ Mov(IP, reg);
5268  __ LoadFromOffset(kLoadWord, reg, SP, mem);
5269  __ StoreToOffset(kStoreWord, IP, SP, mem);
5270}
5271
5272void ParallelMoveResolverARM::Exchange(int mem1, int mem2) {
5273  ScratchRegisterScope ensure_scratch(this, IP, R0, codegen_->GetNumberOfCoreRegisters());
5274  int stack_offset = ensure_scratch.IsSpilled() ? kArmWordSize : 0;
5275  __ LoadFromOffset(kLoadWord, static_cast<Register>(ensure_scratch.GetRegister()),
5276                    SP, mem1 + stack_offset);
5277  __ LoadFromOffset(kLoadWord, IP, SP, mem2 + stack_offset);
5278  __ StoreToOffset(kStoreWord, static_cast<Register>(ensure_scratch.GetRegister()),
5279                   SP, mem2 + stack_offset);
5280  __ StoreToOffset(kStoreWord, IP, SP, mem1 + stack_offset);
5281}
5282
5283void ParallelMoveResolverARM::EmitSwap(size_t index) {
5284  MoveOperands* move = moves_[index];
5285  Location source = move->GetSource();
5286  Location destination = move->GetDestination();
5287
5288  if (source.IsRegister() && destination.IsRegister()) {
5289    DCHECK_NE(source.AsRegister<Register>(), IP);
5290    DCHECK_NE(destination.AsRegister<Register>(), IP);
5291    __ Mov(IP, source.AsRegister<Register>());
5292    __ Mov(source.AsRegister<Register>(), destination.AsRegister<Register>());
5293    __ Mov(destination.AsRegister<Register>(), IP);
5294  } else if (source.IsRegister() && destination.IsStackSlot()) {
5295    Exchange(source.AsRegister<Register>(), destination.GetStackIndex());
5296  } else if (source.IsStackSlot() && destination.IsRegister()) {
5297    Exchange(destination.AsRegister<Register>(), source.GetStackIndex());
5298  } else if (source.IsStackSlot() && destination.IsStackSlot()) {
5299    Exchange(source.GetStackIndex(), destination.GetStackIndex());
5300  } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
5301    __ vmovrs(IP, source.AsFpuRegister<SRegister>());
5302    __ vmovs(source.AsFpuRegister<SRegister>(), destination.AsFpuRegister<SRegister>());
5303    __ vmovsr(destination.AsFpuRegister<SRegister>(), IP);
5304  } else if (source.IsRegisterPair() && destination.IsRegisterPair()) {
5305    __ vmovdrr(DTMP, source.AsRegisterPairLow<Register>(), source.AsRegisterPairHigh<Register>());
5306    __ Mov(source.AsRegisterPairLow<Register>(), destination.AsRegisterPairLow<Register>());
5307    __ Mov(source.AsRegisterPairHigh<Register>(), destination.AsRegisterPairHigh<Register>());
5308    __ vmovrrd(destination.AsRegisterPairLow<Register>(),
5309               destination.AsRegisterPairHigh<Register>(),
5310               DTMP);
5311  } else if (source.IsRegisterPair() || destination.IsRegisterPair()) {
5312    Register low_reg = source.IsRegisterPair()
5313        ? source.AsRegisterPairLow<Register>()
5314        : destination.AsRegisterPairLow<Register>();
5315    int mem = source.IsRegisterPair()
5316        ? destination.GetStackIndex()
5317        : source.GetStackIndex();
5318    DCHECK(ExpectedPairLayout(source.IsRegisterPair() ? source : destination));
5319    __ vmovdrr(DTMP, low_reg, static_cast<Register>(low_reg + 1));
5320    __ LoadFromOffset(kLoadWordPair, low_reg, SP, mem);
5321    __ StoreDToOffset(DTMP, SP, mem);
5322  } else if (source.IsFpuRegisterPair() && destination.IsFpuRegisterPair()) {
5323    DRegister first = FromLowSToD(source.AsFpuRegisterPairLow<SRegister>());
5324    DRegister second = FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>());
5325    __ vmovd(DTMP, first);
5326    __ vmovd(first, second);
5327    __ vmovd(second, DTMP);
5328  } else if (source.IsFpuRegisterPair() || destination.IsFpuRegisterPair()) {
5329    DRegister reg = source.IsFpuRegisterPair()
5330        ? FromLowSToD(source.AsFpuRegisterPairLow<SRegister>())
5331        : FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>());
5332    int mem = source.IsFpuRegisterPair()
5333        ? destination.GetStackIndex()
5334        : source.GetStackIndex();
5335    __ vmovd(DTMP, reg);
5336    __ LoadDFromOffset(reg, SP, mem);
5337    __ StoreDToOffset(DTMP, SP, mem);
5338  } else if (source.IsFpuRegister() || destination.IsFpuRegister()) {
5339    SRegister reg = source.IsFpuRegister() ? source.AsFpuRegister<SRegister>()
5340                                           : destination.AsFpuRegister<SRegister>();
5341    int mem = source.IsFpuRegister()
5342        ? destination.GetStackIndex()
5343        : source.GetStackIndex();
5344
5345    __ vmovrs(IP, reg);
5346    __ LoadSFromOffset(reg, SP, mem);
5347    __ StoreToOffset(kStoreWord, IP, SP, mem);
5348  } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) {
5349    Exchange(source.GetStackIndex(), destination.GetStackIndex());
5350    Exchange(source.GetHighStackIndex(kArmWordSize), destination.GetHighStackIndex(kArmWordSize));
5351  } else {
5352    LOG(FATAL) << "Unimplemented" << source << " <-> " << destination;
5353  }
5354}
5355
5356void ParallelMoveResolverARM::SpillScratch(int reg) {
5357  __ Push(static_cast<Register>(reg));
5358}
5359
5360void ParallelMoveResolverARM::RestoreScratch(int reg) {
5361  __ Pop(static_cast<Register>(reg));
5362}
5363
5364HLoadClass::LoadKind CodeGeneratorARM::GetSupportedLoadClassKind(
5365    HLoadClass::LoadKind desired_class_load_kind) {
5366  if (kEmitCompilerReadBarrier) {
5367    switch (desired_class_load_kind) {
5368      case HLoadClass::LoadKind::kBootImageLinkTimeAddress:
5369      case HLoadClass::LoadKind::kBootImageLinkTimePcRelative:
5370      case HLoadClass::LoadKind::kBootImageAddress:
5371        // TODO: Implement for read barrier.
5372        return HLoadClass::LoadKind::kDexCacheViaMethod;
5373      default:
5374        break;
5375    }
5376  }
5377  switch (desired_class_load_kind) {
5378    case HLoadClass::LoadKind::kReferrersClass:
5379      break;
5380    case HLoadClass::LoadKind::kBootImageLinkTimeAddress:
5381      DCHECK(!GetCompilerOptions().GetCompilePic());
5382      break;
5383    case HLoadClass::LoadKind::kBootImageLinkTimePcRelative:
5384      DCHECK(GetCompilerOptions().GetCompilePic());
5385      break;
5386    case HLoadClass::LoadKind::kBootImageAddress:
5387      break;
5388    case HLoadClass::LoadKind::kDexCacheAddress:
5389      DCHECK(Runtime::Current()->UseJitCompilation());
5390      break;
5391    case HLoadClass::LoadKind::kDexCachePcRelative:
5392      DCHECK(!Runtime::Current()->UseJitCompilation());
5393      // We disable pc-relative load when there is an irreducible loop, as the optimization
5394      // is incompatible with it.
5395      // TODO: Create as many ArmDexCacheArraysBase instructions as needed for methods
5396      // with irreducible loops.
5397      if (GetGraph()->HasIrreducibleLoops()) {
5398        return HLoadClass::LoadKind::kDexCacheViaMethod;
5399      }
5400      break;
5401    case HLoadClass::LoadKind::kDexCacheViaMethod:
5402      break;
5403  }
5404  return desired_class_load_kind;
5405}
5406
5407void LocationsBuilderARM::VisitLoadClass(HLoadClass* cls) {
5408  if (cls->NeedsAccessCheck()) {
5409    InvokeRuntimeCallingConvention calling_convention;
5410    CodeGenerator::CreateLoadClassLocationSummary(
5411        cls,
5412        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
5413        Location::RegisterLocation(R0),
5414        /* code_generator_supports_read_barrier */ true);
5415    return;
5416  }
5417
5418  LocationSummary::CallKind call_kind = (cls->NeedsEnvironment() || kEmitCompilerReadBarrier)
5419      ? LocationSummary::kCallOnSlowPath
5420      : LocationSummary::kNoCall;
5421  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(cls, call_kind);
5422  HLoadClass::LoadKind load_kind = cls->GetLoadKind();
5423  if (load_kind == HLoadClass::LoadKind::kReferrersClass ||
5424      load_kind == HLoadClass::LoadKind::kDexCacheViaMethod ||
5425      load_kind == HLoadClass::LoadKind::kDexCachePcRelative) {
5426    locations->SetInAt(0, Location::RequiresRegister());
5427  }
5428  locations->SetOut(Location::RequiresRegister());
5429}
5430
5431void InstructionCodeGeneratorARM::VisitLoadClass(HLoadClass* cls) {
5432  LocationSummary* locations = cls->GetLocations();
5433  if (cls->NeedsAccessCheck()) {
5434    codegen_->MoveConstant(locations->GetTemp(0), cls->GetTypeIndex());
5435    codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pInitializeTypeAndVerifyAccess),
5436                            cls,
5437                            cls->GetDexPc(),
5438                            nullptr);
5439    CheckEntrypointTypes<kQuickInitializeTypeAndVerifyAccess, void*, uint32_t>();
5440    return;
5441  }
5442
5443  Location out_loc = locations->Out();
5444  Register out = out_loc.AsRegister<Register>();
5445
5446  bool generate_null_check = false;
5447  switch (cls->GetLoadKind()) {
5448    case HLoadClass::LoadKind::kReferrersClass: {
5449      DCHECK(!cls->CanCallRuntime());
5450      DCHECK(!cls->MustGenerateClinitCheck());
5451      // /* GcRoot<mirror::Class> */ out = current_method->declaring_class_
5452      Register current_method = locations->InAt(0).AsRegister<Register>();
5453      GenerateGcRootFieldLoad(
5454          cls, out_loc, current_method, ArtMethod::DeclaringClassOffset().Int32Value());
5455      break;
5456    }
5457    case HLoadClass::LoadKind::kBootImageLinkTimeAddress: {
5458      DCHECK(!kEmitCompilerReadBarrier);
5459      __ LoadLiteral(out, codegen_->DeduplicateBootImageTypeLiteral(cls->GetDexFile(),
5460                                                                    cls->GetTypeIndex()));
5461      break;
5462    }
5463    case HLoadClass::LoadKind::kBootImageLinkTimePcRelative: {
5464      DCHECK(!kEmitCompilerReadBarrier);
5465      CodeGeneratorARM::PcRelativePatchInfo* labels =
5466          codegen_->NewPcRelativeTypePatch(cls->GetDexFile(), cls->GetTypeIndex());
5467      __ BindTrackedLabel(&labels->movw_label);
5468      __ movw(out, /* placeholder */ 0u);
5469      __ BindTrackedLabel(&labels->movt_label);
5470      __ movt(out, /* placeholder */ 0u);
5471      __ BindTrackedLabel(&labels->add_pc_label);
5472      __ add(out, out, ShifterOperand(PC));
5473      break;
5474    }
5475    case HLoadClass::LoadKind::kBootImageAddress: {
5476      DCHECK(!kEmitCompilerReadBarrier);
5477      DCHECK_NE(cls->GetAddress(), 0u);
5478      uint32_t address = dchecked_integral_cast<uint32_t>(cls->GetAddress());
5479      __ LoadLiteral(out, codegen_->DeduplicateBootImageAddressLiteral(address));
5480      break;
5481    }
5482    case HLoadClass::LoadKind::kDexCacheAddress: {
5483      DCHECK_NE(cls->GetAddress(), 0u);
5484      uint32_t address = dchecked_integral_cast<uint32_t>(cls->GetAddress());
5485      // 16-bit LDR immediate has a 5-bit offset multiplied by the size and that gives
5486      // a 128B range. To try and reduce the number of literals if we load multiple types,
5487      // simply split the dex cache address to a 128B aligned base loaded from a literal
5488      // and the remaining offset embedded in the load.
5489      static_assert(sizeof(GcRoot<mirror::Class>) == 4u, "Expected GC root to be 4 bytes.");
5490      DCHECK_ALIGNED(cls->GetAddress(), 4u);
5491      constexpr size_t offset_bits = /* encoded bits */ 5 + /* scale */ 2;
5492      uint32_t base_address = address & ~MaxInt<uint32_t>(offset_bits);
5493      uint32_t offset = address & MaxInt<uint32_t>(offset_bits);
5494      __ LoadLiteral(out, codegen_->DeduplicateDexCacheAddressLiteral(base_address));
5495      // /* GcRoot<mirror::Class> */ out = *(base_address + offset)
5496      GenerateGcRootFieldLoad(cls, out_loc, out, offset);
5497      generate_null_check = !cls->IsInDexCache();
5498      break;
5499    }
5500    case HLoadClass::LoadKind::kDexCachePcRelative: {
5501      Register base_reg = locations->InAt(0).AsRegister<Register>();
5502      HArmDexCacheArraysBase* base = cls->InputAt(0)->AsArmDexCacheArraysBase();
5503      int32_t offset = cls->GetDexCacheElementOffset() - base->GetElementOffset();
5504      // /* GcRoot<mirror::Class> */ out = *(dex_cache_arrays_base + offset)
5505      GenerateGcRootFieldLoad(cls, out_loc, base_reg, offset);
5506      generate_null_check = !cls->IsInDexCache();
5507      break;
5508    }
5509    case HLoadClass::LoadKind::kDexCacheViaMethod: {
5510      // /* GcRoot<mirror::Class>[] */ out =
5511      //        current_method.ptr_sized_fields_->dex_cache_resolved_types_
5512      Register current_method = locations->InAt(0).AsRegister<Register>();
5513      __ LoadFromOffset(kLoadWord,
5514                        out,
5515                        current_method,
5516                        ArtMethod::DexCacheResolvedTypesOffset(kArmPointerSize).Int32Value());
5517      // /* GcRoot<mirror::Class> */ out = out[type_index]
5518      size_t offset = CodeGenerator::GetCacheOffset(cls->GetTypeIndex());
5519      GenerateGcRootFieldLoad(cls, out_loc, out, offset);
5520      generate_null_check = !cls->IsInDexCache();
5521    }
5522  }
5523
5524  if (generate_null_check || cls->MustGenerateClinitCheck()) {
5525    DCHECK(cls->CanCallRuntime());
5526    SlowPathCode* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathARM(
5527        cls, cls, cls->GetDexPc(), cls->MustGenerateClinitCheck());
5528    codegen_->AddSlowPath(slow_path);
5529    if (generate_null_check) {
5530      __ CompareAndBranchIfZero(out, slow_path->GetEntryLabel());
5531    }
5532    if (cls->MustGenerateClinitCheck()) {
5533      GenerateClassInitializationCheck(slow_path, out);
5534    } else {
5535      __ Bind(slow_path->GetExitLabel());
5536    }
5537  }
5538}
5539
5540void LocationsBuilderARM::VisitClinitCheck(HClinitCheck* check) {
5541  LocationSummary* locations =
5542      new (GetGraph()->GetArena()) LocationSummary(check, LocationSummary::kCallOnSlowPath);
5543  locations->SetInAt(0, Location::RequiresRegister());
5544  if (check->HasUses()) {
5545    locations->SetOut(Location::SameAsFirstInput());
5546  }
5547}
5548
5549void InstructionCodeGeneratorARM::VisitClinitCheck(HClinitCheck* check) {
5550  // We assume the class is not null.
5551  SlowPathCode* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathARM(
5552      check->GetLoadClass(), check, check->GetDexPc(), true);
5553  codegen_->AddSlowPath(slow_path);
5554  GenerateClassInitializationCheck(slow_path,
5555                                   check->GetLocations()->InAt(0).AsRegister<Register>());
5556}
5557
5558void InstructionCodeGeneratorARM::GenerateClassInitializationCheck(
5559    SlowPathCode* slow_path, Register class_reg) {
5560  __ LoadFromOffset(kLoadWord, IP, class_reg, mirror::Class::StatusOffset().Int32Value());
5561  __ cmp(IP, ShifterOperand(mirror::Class::kStatusInitialized));
5562  __ b(slow_path->GetEntryLabel(), LT);
5563  // Even if the initialized flag is set, we may be in a situation where caches are not synced
5564  // properly. Therefore, we do a memory fence.
5565  __ dmb(ISH);
5566  __ Bind(slow_path->GetExitLabel());
5567}
5568
5569HLoadString::LoadKind CodeGeneratorARM::GetSupportedLoadStringKind(
5570    HLoadString::LoadKind desired_string_load_kind) {
5571  if (kEmitCompilerReadBarrier) {
5572    switch (desired_string_load_kind) {
5573      case HLoadString::LoadKind::kBootImageLinkTimeAddress:
5574      case HLoadString::LoadKind::kBootImageLinkTimePcRelative:
5575      case HLoadString::LoadKind::kBootImageAddress:
5576        // TODO: Implement for read barrier.
5577        return HLoadString::LoadKind::kDexCacheViaMethod;
5578      default:
5579        break;
5580    }
5581  }
5582  switch (desired_string_load_kind) {
5583    case HLoadString::LoadKind::kBootImageLinkTimeAddress:
5584      DCHECK(!GetCompilerOptions().GetCompilePic());
5585      break;
5586    case HLoadString::LoadKind::kBootImageLinkTimePcRelative:
5587      DCHECK(GetCompilerOptions().GetCompilePic());
5588      break;
5589    case HLoadString::LoadKind::kBootImageAddress:
5590      break;
5591    case HLoadString::LoadKind::kDexCacheAddress:
5592      DCHECK(Runtime::Current()->UseJitCompilation());
5593      break;
5594    case HLoadString::LoadKind::kDexCachePcRelative:
5595      DCHECK(!Runtime::Current()->UseJitCompilation());
5596      // We disable pc-relative load when there is an irreducible loop, as the optimization
5597      // is incompatible with it.
5598      // TODO: Create as many ArmDexCacheArraysBase instructions as needed for methods
5599      // with irreducible loops.
5600      if (GetGraph()->HasIrreducibleLoops()) {
5601        return HLoadString::LoadKind::kDexCacheViaMethod;
5602      }
5603      break;
5604    case HLoadString::LoadKind::kDexCacheViaMethod:
5605      break;
5606  }
5607  return desired_string_load_kind;
5608}
5609
5610void LocationsBuilderARM::VisitLoadString(HLoadString* load) {
5611  LocationSummary::CallKind call_kind = (load->NeedsEnvironment() || kEmitCompilerReadBarrier)
5612      ? LocationSummary::kCallOnSlowPath
5613      : LocationSummary::kNoCall;
5614  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(load, call_kind);
5615  HLoadString::LoadKind load_kind = load->GetLoadKind();
5616  if (load_kind == HLoadString::LoadKind::kDexCacheViaMethod ||
5617      load_kind == HLoadString::LoadKind::kDexCachePcRelative) {
5618    locations->SetInAt(0, Location::RequiresRegister());
5619  }
5620  locations->SetOut(Location::RequiresRegister());
5621}
5622
5623void InstructionCodeGeneratorARM::VisitLoadString(HLoadString* load) {
5624  LocationSummary* locations = load->GetLocations();
5625  Location out_loc = locations->Out();
5626  Register out = out_loc.AsRegister<Register>();
5627
5628  switch (load->GetLoadKind()) {
5629    case HLoadString::LoadKind::kBootImageLinkTimeAddress: {
5630      DCHECK(!kEmitCompilerReadBarrier);
5631      __ LoadLiteral(out, codegen_->DeduplicateBootImageStringLiteral(load->GetDexFile(),
5632                                                                      load->GetStringIndex()));
5633      return;  // No dex cache slow path.
5634    }
5635    case HLoadString::LoadKind::kBootImageLinkTimePcRelative: {
5636      DCHECK(!kEmitCompilerReadBarrier);
5637      CodeGeneratorARM::PcRelativePatchInfo* labels =
5638          codegen_->NewPcRelativeStringPatch(load->GetDexFile(), load->GetStringIndex());
5639      __ BindTrackedLabel(&labels->movw_label);
5640      __ movw(out, /* placeholder */ 0u);
5641      __ BindTrackedLabel(&labels->movt_label);
5642      __ movt(out, /* placeholder */ 0u);
5643      __ BindTrackedLabel(&labels->add_pc_label);
5644      __ add(out, out, ShifterOperand(PC));
5645      return;  // No dex cache slow path.
5646    }
5647    case HLoadString::LoadKind::kBootImageAddress: {
5648      DCHECK(!kEmitCompilerReadBarrier);
5649      DCHECK_NE(load->GetAddress(), 0u);
5650      uint32_t address = dchecked_integral_cast<uint32_t>(load->GetAddress());
5651      __ LoadLiteral(out, codegen_->DeduplicateBootImageAddressLiteral(address));
5652      return;  // No dex cache slow path.
5653    }
5654    default:
5655      break;
5656  }
5657
5658  // TODO: Re-add the compiler code to do string dex cache lookup again.
5659  SlowPathCode* slow_path = new (GetGraph()->GetArena()) LoadStringSlowPathARM(load);
5660  codegen_->AddSlowPath(slow_path);
5661  __ b(slow_path->GetEntryLabel());
5662  __ Bind(slow_path->GetExitLabel());
5663}
5664
5665static int32_t GetExceptionTlsOffset() {
5666  return Thread::ExceptionOffset<kArmPointerSize>().Int32Value();
5667}
5668
5669void LocationsBuilderARM::VisitLoadException(HLoadException* load) {
5670  LocationSummary* locations =
5671      new (GetGraph()->GetArena()) LocationSummary(load, LocationSummary::kNoCall);
5672  locations->SetOut(Location::RequiresRegister());
5673}
5674
5675void InstructionCodeGeneratorARM::VisitLoadException(HLoadException* load) {
5676  Register out = load->GetLocations()->Out().AsRegister<Register>();
5677  __ LoadFromOffset(kLoadWord, out, TR, GetExceptionTlsOffset());
5678}
5679
5680void LocationsBuilderARM::VisitClearException(HClearException* clear) {
5681  new (GetGraph()->GetArena()) LocationSummary(clear, LocationSummary::kNoCall);
5682}
5683
5684void InstructionCodeGeneratorARM::VisitClearException(HClearException* clear ATTRIBUTE_UNUSED) {
5685  __ LoadImmediate(IP, 0);
5686  __ StoreToOffset(kStoreWord, IP, TR, GetExceptionTlsOffset());
5687}
5688
5689void LocationsBuilderARM::VisitThrow(HThrow* instruction) {
5690  LocationSummary* locations =
5691      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
5692  InvokeRuntimeCallingConvention calling_convention;
5693  locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
5694}
5695
5696void InstructionCodeGeneratorARM::VisitThrow(HThrow* instruction) {
5697  codegen_->InvokeRuntime(
5698      QUICK_ENTRY_POINT(pDeliverException), instruction, instruction->GetDexPc(), nullptr);
5699  CheckEntrypointTypes<kQuickDeliverException, void, mirror::Object*>();
5700}
5701
5702static bool TypeCheckNeedsATemporary(TypeCheckKind type_check_kind) {
5703  return kEmitCompilerReadBarrier &&
5704      (kUseBakerReadBarrier ||
5705       type_check_kind == TypeCheckKind::kAbstractClassCheck ||
5706       type_check_kind == TypeCheckKind::kClassHierarchyCheck ||
5707       type_check_kind == TypeCheckKind::kArrayObjectCheck);
5708}
5709
5710void LocationsBuilderARM::VisitInstanceOf(HInstanceOf* instruction) {
5711  LocationSummary::CallKind call_kind = LocationSummary::kNoCall;
5712  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5713  switch (type_check_kind) {
5714    case TypeCheckKind::kExactCheck:
5715    case TypeCheckKind::kAbstractClassCheck:
5716    case TypeCheckKind::kClassHierarchyCheck:
5717    case TypeCheckKind::kArrayObjectCheck:
5718      call_kind =
5719          kEmitCompilerReadBarrier ? LocationSummary::kCallOnSlowPath : LocationSummary::kNoCall;
5720      break;
5721    case TypeCheckKind::kArrayCheck:
5722    case TypeCheckKind::kUnresolvedCheck:
5723    case TypeCheckKind::kInterfaceCheck:
5724      call_kind = LocationSummary::kCallOnSlowPath;
5725      break;
5726  }
5727
5728  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
5729  locations->SetInAt(0, Location::RequiresRegister());
5730  locations->SetInAt(1, Location::RequiresRegister());
5731  // The "out" register is used as a temporary, so it overlaps with the inputs.
5732  // Note that TypeCheckSlowPathARM uses this register too.
5733  locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
5734  // When read barriers are enabled, we need a temporary register for
5735  // some cases.
5736  if (TypeCheckNeedsATemporary(type_check_kind)) {
5737    locations->AddTemp(Location::RequiresRegister());
5738  }
5739}
5740
5741void InstructionCodeGeneratorARM::VisitInstanceOf(HInstanceOf* instruction) {
5742  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5743  LocationSummary* locations = instruction->GetLocations();
5744  Location obj_loc = locations->InAt(0);
5745  Register obj = obj_loc.AsRegister<Register>();
5746  Register cls = locations->InAt(1).AsRegister<Register>();
5747  Location out_loc = locations->Out();
5748  Register out = out_loc.AsRegister<Register>();
5749  Location maybe_temp_loc = TypeCheckNeedsATemporary(type_check_kind) ?
5750      locations->GetTemp(0) :
5751      Location::NoLocation();
5752  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
5753  uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
5754  uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
5755  uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
5756  Label done, zero;
5757  SlowPathCode* slow_path = nullptr;
5758
5759  // Return 0 if `obj` is null.
5760  // avoid null check if we know obj is not null.
5761  if (instruction->MustDoNullCheck()) {
5762    __ CompareAndBranchIfZero(obj, &zero);
5763  }
5764
5765  // /* HeapReference<Class> */ out = obj->klass_
5766  GenerateReferenceLoadTwoRegisters(instruction, out_loc, obj_loc, class_offset, maybe_temp_loc);
5767
5768  switch (type_check_kind) {
5769    case TypeCheckKind::kExactCheck: {
5770      __ cmp(out, ShifterOperand(cls));
5771      // Classes must be equal for the instanceof to succeed.
5772      __ b(&zero, NE);
5773      __ LoadImmediate(out, 1);
5774      __ b(&done);
5775      break;
5776    }
5777
5778    case TypeCheckKind::kAbstractClassCheck: {
5779      // If the class is abstract, we eagerly fetch the super class of the
5780      // object to avoid doing a comparison we know will fail.
5781      Label loop;
5782      __ Bind(&loop);
5783      // /* HeapReference<Class> */ out = out->super_class_
5784      GenerateReferenceLoadOneRegister(instruction, out_loc, super_offset, maybe_temp_loc);
5785      // If `out` is null, we use it for the result, and jump to `done`.
5786      __ CompareAndBranchIfZero(out, &done);
5787      __ cmp(out, ShifterOperand(cls));
5788      __ b(&loop, NE);
5789      __ LoadImmediate(out, 1);
5790      if (zero.IsLinked()) {
5791        __ b(&done);
5792      }
5793      break;
5794    }
5795
5796    case TypeCheckKind::kClassHierarchyCheck: {
5797      // Walk over the class hierarchy to find a match.
5798      Label loop, success;
5799      __ Bind(&loop);
5800      __ cmp(out, ShifterOperand(cls));
5801      __ b(&success, EQ);
5802      // /* HeapReference<Class> */ out = out->super_class_
5803      GenerateReferenceLoadOneRegister(instruction, out_loc, super_offset, maybe_temp_loc);
5804      __ CompareAndBranchIfNonZero(out, &loop);
5805      // If `out` is null, we use it for the result, and jump to `done`.
5806      __ b(&done);
5807      __ Bind(&success);
5808      __ LoadImmediate(out, 1);
5809      if (zero.IsLinked()) {
5810        __ b(&done);
5811      }
5812      break;
5813    }
5814
5815    case TypeCheckKind::kArrayObjectCheck: {
5816      // Do an exact check.
5817      Label exact_check;
5818      __ cmp(out, ShifterOperand(cls));
5819      __ b(&exact_check, EQ);
5820      // Otherwise, we need to check that the object's class is a non-primitive array.
5821      // /* HeapReference<Class> */ out = out->component_type_
5822      GenerateReferenceLoadOneRegister(instruction, out_loc, component_offset, maybe_temp_loc);
5823      // If `out` is null, we use it for the result, and jump to `done`.
5824      __ CompareAndBranchIfZero(out, &done);
5825      __ LoadFromOffset(kLoadUnsignedHalfword, out, out, primitive_offset);
5826      static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
5827      __ CompareAndBranchIfNonZero(out, &zero);
5828      __ Bind(&exact_check);
5829      __ LoadImmediate(out, 1);
5830      __ b(&done);
5831      break;
5832    }
5833
5834    case TypeCheckKind::kArrayCheck: {
5835      __ cmp(out, ShifterOperand(cls));
5836      DCHECK(locations->OnlyCallsOnSlowPath());
5837      slow_path = new (GetGraph()->GetArena()) TypeCheckSlowPathARM(instruction,
5838                                                                    /* is_fatal */ false);
5839      codegen_->AddSlowPath(slow_path);
5840      __ b(slow_path->GetEntryLabel(), NE);
5841      __ LoadImmediate(out, 1);
5842      if (zero.IsLinked()) {
5843        __ b(&done);
5844      }
5845      break;
5846    }
5847
5848    case TypeCheckKind::kUnresolvedCheck:
5849    case TypeCheckKind::kInterfaceCheck: {
5850      // Note that we indeed only call on slow path, but we always go
5851      // into the slow path for the unresolved and interface check
5852      // cases.
5853      //
5854      // We cannot directly call the InstanceofNonTrivial runtime
5855      // entry point without resorting to a type checking slow path
5856      // here (i.e. by calling InvokeRuntime directly), as it would
5857      // require to assign fixed registers for the inputs of this
5858      // HInstanceOf instruction (following the runtime calling
5859      // convention), which might be cluttered by the potential first
5860      // read barrier emission at the beginning of this method.
5861      //
5862      // TODO: Introduce a new runtime entry point taking the object
5863      // to test (instead of its class) as argument, and let it deal
5864      // with the read barrier issues. This will let us refactor this
5865      // case of the `switch` code as it was previously (with a direct
5866      // call to the runtime not using a type checking slow path).
5867      // This should also be beneficial for the other cases above.
5868      DCHECK(locations->OnlyCallsOnSlowPath());
5869      slow_path = new (GetGraph()->GetArena()) TypeCheckSlowPathARM(instruction,
5870                                                                    /* is_fatal */ false);
5871      codegen_->AddSlowPath(slow_path);
5872      __ b(slow_path->GetEntryLabel());
5873      if (zero.IsLinked()) {
5874        __ b(&done);
5875      }
5876      break;
5877    }
5878  }
5879
5880  if (zero.IsLinked()) {
5881    __ Bind(&zero);
5882    __ LoadImmediate(out, 0);
5883  }
5884
5885  if (done.IsLinked()) {
5886    __ Bind(&done);
5887  }
5888
5889  if (slow_path != nullptr) {
5890    __ Bind(slow_path->GetExitLabel());
5891  }
5892}
5893
5894void LocationsBuilderARM::VisitCheckCast(HCheckCast* instruction) {
5895  LocationSummary::CallKind call_kind = LocationSummary::kNoCall;
5896  bool throws_into_catch = instruction->CanThrowIntoCatchBlock();
5897
5898  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5899  switch (type_check_kind) {
5900    case TypeCheckKind::kExactCheck:
5901    case TypeCheckKind::kAbstractClassCheck:
5902    case TypeCheckKind::kClassHierarchyCheck:
5903    case TypeCheckKind::kArrayObjectCheck:
5904      call_kind = (throws_into_catch || kEmitCompilerReadBarrier) ?
5905          LocationSummary::kCallOnSlowPath :
5906          LocationSummary::kNoCall;  // In fact, call on a fatal (non-returning) slow path.
5907      break;
5908    case TypeCheckKind::kArrayCheck:
5909    case TypeCheckKind::kUnresolvedCheck:
5910    case TypeCheckKind::kInterfaceCheck:
5911      call_kind = LocationSummary::kCallOnSlowPath;
5912      break;
5913  }
5914
5915  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
5916  locations->SetInAt(0, Location::RequiresRegister());
5917  locations->SetInAt(1, Location::RequiresRegister());
5918  // Note that TypeCheckSlowPathARM uses this "temp" register too.
5919  locations->AddTemp(Location::RequiresRegister());
5920  // When read barriers are enabled, we need an additional temporary
5921  // register for some cases.
5922  if (TypeCheckNeedsATemporary(type_check_kind)) {
5923    locations->AddTemp(Location::RequiresRegister());
5924  }
5925}
5926
5927void InstructionCodeGeneratorARM::VisitCheckCast(HCheckCast* instruction) {
5928  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5929  LocationSummary* locations = instruction->GetLocations();
5930  Location obj_loc = locations->InAt(0);
5931  Register obj = obj_loc.AsRegister<Register>();
5932  Register cls = locations->InAt(1).AsRegister<Register>();
5933  Location temp_loc = locations->GetTemp(0);
5934  Register temp = temp_loc.AsRegister<Register>();
5935  Location maybe_temp2_loc = TypeCheckNeedsATemporary(type_check_kind) ?
5936      locations->GetTemp(1) :
5937      Location::NoLocation();
5938  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
5939  uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
5940  uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
5941  uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
5942
5943  bool is_type_check_slow_path_fatal =
5944      (type_check_kind == TypeCheckKind::kExactCheck ||
5945       type_check_kind == TypeCheckKind::kAbstractClassCheck ||
5946       type_check_kind == TypeCheckKind::kClassHierarchyCheck ||
5947       type_check_kind == TypeCheckKind::kArrayObjectCheck) &&
5948      !instruction->CanThrowIntoCatchBlock();
5949  SlowPathCode* type_check_slow_path =
5950      new (GetGraph()->GetArena()) TypeCheckSlowPathARM(instruction,
5951                                                        is_type_check_slow_path_fatal);
5952  codegen_->AddSlowPath(type_check_slow_path);
5953
5954  Label done;
5955  // Avoid null check if we know obj is not null.
5956  if (instruction->MustDoNullCheck()) {
5957    __ CompareAndBranchIfZero(obj, &done);
5958  }
5959
5960  // /* HeapReference<Class> */ temp = obj->klass_
5961  GenerateReferenceLoadTwoRegisters(instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
5962
5963  switch (type_check_kind) {
5964    case TypeCheckKind::kExactCheck:
5965    case TypeCheckKind::kArrayCheck: {
5966      __ cmp(temp, ShifterOperand(cls));
5967      // Jump to slow path for throwing the exception or doing a
5968      // more involved array check.
5969      __ b(type_check_slow_path->GetEntryLabel(), NE);
5970      break;
5971    }
5972
5973    case TypeCheckKind::kAbstractClassCheck: {
5974      // If the class is abstract, we eagerly fetch the super class of the
5975      // object to avoid doing a comparison we know will fail.
5976      Label loop, compare_classes;
5977      __ Bind(&loop);
5978      // /* HeapReference<Class> */ temp = temp->super_class_
5979      GenerateReferenceLoadOneRegister(instruction, temp_loc, super_offset, maybe_temp2_loc);
5980
5981      // If the class reference currently in `temp` is not null, jump
5982      // to the `compare_classes` label to compare it with the checked
5983      // class.
5984      __ CompareAndBranchIfNonZero(temp, &compare_classes);
5985      // Otherwise, jump to the slow path to throw the exception.
5986      //
5987      // But before, move back the object's class into `temp` before
5988      // going into the slow path, as it has been overwritten in the
5989      // meantime.
5990      // /* HeapReference<Class> */ temp = obj->klass_
5991      GenerateReferenceLoadTwoRegisters(
5992          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
5993      __ b(type_check_slow_path->GetEntryLabel());
5994
5995      __ Bind(&compare_classes);
5996      __ cmp(temp, ShifterOperand(cls));
5997      __ b(&loop, NE);
5998      break;
5999    }
6000
6001    case TypeCheckKind::kClassHierarchyCheck: {
6002      // Walk over the class hierarchy to find a match.
6003      Label loop;
6004      __ Bind(&loop);
6005      __ cmp(temp, ShifterOperand(cls));
6006      __ b(&done, EQ);
6007
6008      // /* HeapReference<Class> */ temp = temp->super_class_
6009      GenerateReferenceLoadOneRegister(instruction, temp_loc, super_offset, maybe_temp2_loc);
6010
6011      // If the class reference currently in `temp` is not null, jump
6012      // back at the beginning of the loop.
6013      __ CompareAndBranchIfNonZero(temp, &loop);
6014      // Otherwise, jump to the slow path to throw the exception.
6015      //
6016      // But before, move back the object's class into `temp` before
6017      // going into the slow path, as it has been overwritten in the
6018      // meantime.
6019      // /* HeapReference<Class> */ temp = obj->klass_
6020      GenerateReferenceLoadTwoRegisters(
6021          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
6022      __ b(type_check_slow_path->GetEntryLabel());
6023      break;
6024    }
6025
6026    case TypeCheckKind::kArrayObjectCheck: {
6027      // Do an exact check.
6028      Label check_non_primitive_component_type;
6029      __ cmp(temp, ShifterOperand(cls));
6030      __ b(&done, EQ);
6031
6032      // Otherwise, we need to check that the object's class is a non-primitive array.
6033      // /* HeapReference<Class> */ temp = temp->component_type_
6034      GenerateReferenceLoadOneRegister(instruction, temp_loc, component_offset, maybe_temp2_loc);
6035
6036      // If the component type is not null (i.e. the object is indeed
6037      // an array), jump to label `check_non_primitive_component_type`
6038      // to further check that this component type is not a primitive
6039      // type.
6040      __ CompareAndBranchIfNonZero(temp, &check_non_primitive_component_type);
6041      // Otherwise, jump to the slow path to throw the exception.
6042      //
6043      // But before, move back the object's class into `temp` before
6044      // going into the slow path, as it has been overwritten in the
6045      // meantime.
6046      // /* HeapReference<Class> */ temp = obj->klass_
6047      GenerateReferenceLoadTwoRegisters(
6048          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
6049      __ b(type_check_slow_path->GetEntryLabel());
6050
6051      __ Bind(&check_non_primitive_component_type);
6052      __ LoadFromOffset(kLoadUnsignedHalfword, temp, temp, primitive_offset);
6053      static_assert(Primitive::kPrimNot == 0, "Expected 0 for art::Primitive::kPrimNot");
6054      __ CompareAndBranchIfZero(temp, &done);
6055      // Same comment as above regarding `temp` and the slow path.
6056      // /* HeapReference<Class> */ temp = obj->klass_
6057      GenerateReferenceLoadTwoRegisters(
6058          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
6059      __ b(type_check_slow_path->GetEntryLabel());
6060      break;
6061    }
6062
6063    case TypeCheckKind::kUnresolvedCheck:
6064    case TypeCheckKind::kInterfaceCheck:
6065      // We always go into the type check slow path for the unresolved
6066      // and interface check cases.
6067      //
6068      // We cannot directly call the CheckCast runtime entry point
6069      // without resorting to a type checking slow path here (i.e. by
6070      // calling InvokeRuntime directly), as it would require to
6071      // assign fixed registers for the inputs of this HInstanceOf
6072      // instruction (following the runtime calling convention), which
6073      // might be cluttered by the potential first read barrier
6074      // emission at the beginning of this method.
6075      //
6076      // TODO: Introduce a new runtime entry point taking the object
6077      // to test (instead of its class) as argument, and let it deal
6078      // with the read barrier issues. This will let us refactor this
6079      // case of the `switch` code as it was previously (with a direct
6080      // call to the runtime not using a type checking slow path).
6081      // This should also be beneficial for the other cases above.
6082      __ b(type_check_slow_path->GetEntryLabel());
6083      break;
6084  }
6085  __ Bind(&done);
6086
6087  __ Bind(type_check_slow_path->GetExitLabel());
6088}
6089
6090void LocationsBuilderARM::VisitMonitorOperation(HMonitorOperation* instruction) {
6091  LocationSummary* locations =
6092      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
6093  InvokeRuntimeCallingConvention calling_convention;
6094  locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
6095}
6096
6097void InstructionCodeGeneratorARM::VisitMonitorOperation(HMonitorOperation* instruction) {
6098  codegen_->InvokeRuntime(instruction->IsEnter()
6099        ? QUICK_ENTRY_POINT(pLockObject) : QUICK_ENTRY_POINT(pUnlockObject),
6100      instruction,
6101      instruction->GetDexPc(),
6102      nullptr);
6103  if (instruction->IsEnter()) {
6104    CheckEntrypointTypes<kQuickLockObject, void, mirror::Object*>();
6105  } else {
6106    CheckEntrypointTypes<kQuickUnlockObject, void, mirror::Object*>();
6107  }
6108}
6109
6110void LocationsBuilderARM::VisitAnd(HAnd* instruction) { HandleBitwiseOperation(instruction, AND); }
6111void LocationsBuilderARM::VisitOr(HOr* instruction) { HandleBitwiseOperation(instruction, ORR); }
6112void LocationsBuilderARM::VisitXor(HXor* instruction) { HandleBitwiseOperation(instruction, EOR); }
6113
6114void LocationsBuilderARM::HandleBitwiseOperation(HBinaryOperation* instruction, Opcode opcode) {
6115  LocationSummary* locations =
6116      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
6117  DCHECK(instruction->GetResultType() == Primitive::kPrimInt
6118         || instruction->GetResultType() == Primitive::kPrimLong);
6119  // Note: GVN reorders commutative operations to have the constant on the right hand side.
6120  locations->SetInAt(0, Location::RequiresRegister());
6121  locations->SetInAt(1, ArmEncodableConstantOrRegister(instruction->InputAt(1), opcode));
6122  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
6123}
6124
6125void InstructionCodeGeneratorARM::VisitAnd(HAnd* instruction) {
6126  HandleBitwiseOperation(instruction);
6127}
6128
6129void InstructionCodeGeneratorARM::VisitOr(HOr* instruction) {
6130  HandleBitwiseOperation(instruction);
6131}
6132
6133void InstructionCodeGeneratorARM::VisitXor(HXor* instruction) {
6134  HandleBitwiseOperation(instruction);
6135}
6136
6137
6138void LocationsBuilderARM::VisitBitwiseNegatedRight(HBitwiseNegatedRight* instruction) {
6139  LocationSummary* locations =
6140      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
6141  DCHECK(instruction->GetResultType() == Primitive::kPrimInt
6142         || instruction->GetResultType() == Primitive::kPrimLong);
6143
6144  locations->SetInAt(0, Location::RequiresRegister());
6145  locations->SetInAt(1, Location::RequiresRegister());
6146  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
6147}
6148
6149void InstructionCodeGeneratorARM::VisitBitwiseNegatedRight(HBitwiseNegatedRight* instruction) {
6150  LocationSummary* locations = instruction->GetLocations();
6151  Location first = locations->InAt(0);
6152  Location second = locations->InAt(1);
6153  Location out = locations->Out();
6154
6155  if (instruction->GetResultType() == Primitive::kPrimInt) {
6156    Register first_reg = first.AsRegister<Register>();
6157    ShifterOperand second_reg(second.AsRegister<Register>());
6158    Register out_reg = out.AsRegister<Register>();
6159
6160    switch (instruction->GetOpKind()) {
6161      case HInstruction::kAnd:
6162        __ bic(out_reg, first_reg, second_reg);
6163        break;
6164      case HInstruction::kOr:
6165        __ orn(out_reg, first_reg, second_reg);
6166        break;
6167      // There is no EON on arm.
6168      case HInstruction::kXor:
6169      default:
6170        LOG(FATAL) << "Unexpected instruction " << instruction->DebugName();
6171        UNREACHABLE();
6172    }
6173    return;
6174
6175  } else {
6176    DCHECK_EQ(instruction->GetResultType(), Primitive::kPrimLong);
6177    Register first_low = first.AsRegisterPairLow<Register>();
6178    Register first_high = first.AsRegisterPairHigh<Register>();
6179    ShifterOperand second_low(second.AsRegisterPairLow<Register>());
6180    ShifterOperand second_high(second.AsRegisterPairHigh<Register>());
6181    Register out_low = out.AsRegisterPairLow<Register>();
6182    Register out_high = out.AsRegisterPairHigh<Register>();
6183
6184    switch (instruction->GetOpKind()) {
6185      case HInstruction::kAnd:
6186        __ bic(out_low, first_low, second_low);
6187        __ bic(out_high, first_high, second_high);
6188        break;
6189      case HInstruction::kOr:
6190        __ orn(out_low, first_low, second_low);
6191        __ orn(out_high, first_high, second_high);
6192        break;
6193      // There is no EON on arm.
6194      case HInstruction::kXor:
6195      default:
6196        LOG(FATAL) << "Unexpected instruction " << instruction->DebugName();
6197        UNREACHABLE();
6198    }
6199  }
6200}
6201
6202void InstructionCodeGeneratorARM::GenerateAndConst(Register out, Register first, uint32_t value) {
6203  // Optimize special cases for individual halfs of `and-long` (`and` is simplified earlier).
6204  if (value == 0xffffffffu) {
6205    if (out != first) {
6206      __ mov(out, ShifterOperand(first));
6207    }
6208    return;
6209  }
6210  if (value == 0u) {
6211    __ mov(out, ShifterOperand(0));
6212    return;
6213  }
6214  ShifterOperand so;
6215  if (__ ShifterOperandCanHold(kNoRegister, kNoRegister, AND, value, &so)) {
6216    __ and_(out, first, so);
6217  } else {
6218    DCHECK(__ ShifterOperandCanHold(kNoRegister, kNoRegister, BIC, ~value, &so));
6219    __ bic(out, first, ShifterOperand(~value));
6220  }
6221}
6222
6223void InstructionCodeGeneratorARM::GenerateOrrConst(Register out, Register first, uint32_t value) {
6224  // Optimize special cases for individual halfs of `or-long` (`or` is simplified earlier).
6225  if (value == 0u) {
6226    if (out != first) {
6227      __ mov(out, ShifterOperand(first));
6228    }
6229    return;
6230  }
6231  if (value == 0xffffffffu) {
6232    __ mvn(out, ShifterOperand(0));
6233    return;
6234  }
6235  ShifterOperand so;
6236  if (__ ShifterOperandCanHold(kNoRegister, kNoRegister, ORR, value, &so)) {
6237    __ orr(out, first, so);
6238  } else {
6239    DCHECK(__ ShifterOperandCanHold(kNoRegister, kNoRegister, ORN, ~value, &so));
6240    __ orn(out, first, ShifterOperand(~value));
6241  }
6242}
6243
6244void InstructionCodeGeneratorARM::GenerateEorConst(Register out, Register first, uint32_t value) {
6245  // Optimize special case for individual halfs of `xor-long` (`xor` is simplified earlier).
6246  if (value == 0u) {
6247    if (out != first) {
6248      __ mov(out, ShifterOperand(first));
6249    }
6250    return;
6251  }
6252  __ eor(out, first, ShifterOperand(value));
6253}
6254
6255void InstructionCodeGeneratorARM::GenerateAddLongConst(Location out,
6256                                                       Location first,
6257                                                       uint64_t value) {
6258  Register out_low = out.AsRegisterPairLow<Register>();
6259  Register out_high = out.AsRegisterPairHigh<Register>();
6260  Register first_low = first.AsRegisterPairLow<Register>();
6261  Register first_high = first.AsRegisterPairHigh<Register>();
6262  uint32_t value_low = Low32Bits(value);
6263  uint32_t value_high = High32Bits(value);
6264  if (value_low == 0u) {
6265    if (out_low != first_low) {
6266      __ mov(out_low, ShifterOperand(first_low));
6267    }
6268    __ AddConstant(out_high, first_high, value_high);
6269    return;
6270  }
6271  __ AddConstantSetFlags(out_low, first_low, value_low);
6272  ShifterOperand so;
6273  if (__ ShifterOperandCanHold(out_high, first_high, ADC, value_high, kCcDontCare, &so)) {
6274    __ adc(out_high, first_high, so);
6275  } else if (__ ShifterOperandCanHold(out_low, first_low, SBC, ~value_high, kCcDontCare, &so)) {
6276    __ sbc(out_high, first_high, so);
6277  } else {
6278    LOG(FATAL) << "Unexpected constant " << value_high;
6279    UNREACHABLE();
6280  }
6281}
6282
6283void InstructionCodeGeneratorARM::HandleBitwiseOperation(HBinaryOperation* instruction) {
6284  LocationSummary* locations = instruction->GetLocations();
6285  Location first = locations->InAt(0);
6286  Location second = locations->InAt(1);
6287  Location out = locations->Out();
6288
6289  if (second.IsConstant()) {
6290    uint64_t value = static_cast<uint64_t>(Int64FromConstant(second.GetConstant()));
6291    uint32_t value_low = Low32Bits(value);
6292    if (instruction->GetResultType() == Primitive::kPrimInt) {
6293      Register first_reg = first.AsRegister<Register>();
6294      Register out_reg = out.AsRegister<Register>();
6295      if (instruction->IsAnd()) {
6296        GenerateAndConst(out_reg, first_reg, value_low);
6297      } else if (instruction->IsOr()) {
6298        GenerateOrrConst(out_reg, first_reg, value_low);
6299      } else {
6300        DCHECK(instruction->IsXor());
6301        GenerateEorConst(out_reg, first_reg, value_low);
6302      }
6303    } else {
6304      DCHECK_EQ(instruction->GetResultType(), Primitive::kPrimLong);
6305      uint32_t value_high = High32Bits(value);
6306      Register first_low = first.AsRegisterPairLow<Register>();
6307      Register first_high = first.AsRegisterPairHigh<Register>();
6308      Register out_low = out.AsRegisterPairLow<Register>();
6309      Register out_high = out.AsRegisterPairHigh<Register>();
6310      if (instruction->IsAnd()) {
6311        GenerateAndConst(out_low, first_low, value_low);
6312        GenerateAndConst(out_high, first_high, value_high);
6313      } else if (instruction->IsOr()) {
6314        GenerateOrrConst(out_low, first_low, value_low);
6315        GenerateOrrConst(out_high, first_high, value_high);
6316      } else {
6317        DCHECK(instruction->IsXor());
6318        GenerateEorConst(out_low, first_low, value_low);
6319        GenerateEorConst(out_high, first_high, value_high);
6320      }
6321    }
6322    return;
6323  }
6324
6325  if (instruction->GetResultType() == Primitive::kPrimInt) {
6326    Register first_reg = first.AsRegister<Register>();
6327    ShifterOperand second_reg(second.AsRegister<Register>());
6328    Register out_reg = out.AsRegister<Register>();
6329    if (instruction->IsAnd()) {
6330      __ and_(out_reg, first_reg, second_reg);
6331    } else if (instruction->IsOr()) {
6332      __ orr(out_reg, first_reg, second_reg);
6333    } else {
6334      DCHECK(instruction->IsXor());
6335      __ eor(out_reg, first_reg, second_reg);
6336    }
6337  } else {
6338    DCHECK_EQ(instruction->GetResultType(), Primitive::kPrimLong);
6339    Register first_low = first.AsRegisterPairLow<Register>();
6340    Register first_high = first.AsRegisterPairHigh<Register>();
6341    ShifterOperand second_low(second.AsRegisterPairLow<Register>());
6342    ShifterOperand second_high(second.AsRegisterPairHigh<Register>());
6343    Register out_low = out.AsRegisterPairLow<Register>();
6344    Register out_high = out.AsRegisterPairHigh<Register>();
6345    if (instruction->IsAnd()) {
6346      __ and_(out_low, first_low, second_low);
6347      __ and_(out_high, first_high, second_high);
6348    } else if (instruction->IsOr()) {
6349      __ orr(out_low, first_low, second_low);
6350      __ orr(out_high, first_high, second_high);
6351    } else {
6352      DCHECK(instruction->IsXor());
6353      __ eor(out_low, first_low, second_low);
6354      __ eor(out_high, first_high, second_high);
6355    }
6356  }
6357}
6358
6359void InstructionCodeGeneratorARM::GenerateReferenceLoadOneRegister(HInstruction* instruction,
6360                                                                   Location out,
6361                                                                   uint32_t offset,
6362                                                                   Location maybe_temp) {
6363  Register out_reg = out.AsRegister<Register>();
6364  if (kEmitCompilerReadBarrier) {
6365    DCHECK(maybe_temp.IsRegister()) << maybe_temp;
6366    if (kUseBakerReadBarrier) {
6367      // Load with fast path based Baker's read barrier.
6368      // /* HeapReference<Object> */ out = *(out + offset)
6369      codegen_->GenerateFieldLoadWithBakerReadBarrier(
6370          instruction, out, out_reg, offset, maybe_temp, /* needs_null_check */ false);
6371    } else {
6372      // Load with slow path based read barrier.
6373      // Save the value of `out` into `maybe_temp` before overwriting it
6374      // in the following move operation, as we will need it for the
6375      // read barrier below.
6376      __ Mov(maybe_temp.AsRegister<Register>(), out_reg);
6377      // /* HeapReference<Object> */ out = *(out + offset)
6378      __ LoadFromOffset(kLoadWord, out_reg, out_reg, offset);
6379      codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset);
6380    }
6381  } else {
6382    // Plain load with no read barrier.
6383    // /* HeapReference<Object> */ out = *(out + offset)
6384    __ LoadFromOffset(kLoadWord, out_reg, out_reg, offset);
6385    __ MaybeUnpoisonHeapReference(out_reg);
6386  }
6387}
6388
6389void InstructionCodeGeneratorARM::GenerateReferenceLoadTwoRegisters(HInstruction* instruction,
6390                                                                    Location out,
6391                                                                    Location obj,
6392                                                                    uint32_t offset,
6393                                                                    Location maybe_temp) {
6394  Register out_reg = out.AsRegister<Register>();
6395  Register obj_reg = obj.AsRegister<Register>();
6396  if (kEmitCompilerReadBarrier) {
6397    if (kUseBakerReadBarrier) {
6398      DCHECK(maybe_temp.IsRegister()) << maybe_temp;
6399      // Load with fast path based Baker's read barrier.
6400      // /* HeapReference<Object> */ out = *(obj + offset)
6401      codegen_->GenerateFieldLoadWithBakerReadBarrier(
6402          instruction, out, obj_reg, offset, maybe_temp, /* needs_null_check */ false);
6403    } else {
6404      // Load with slow path based read barrier.
6405      // /* HeapReference<Object> */ out = *(obj + offset)
6406      __ LoadFromOffset(kLoadWord, out_reg, obj_reg, offset);
6407      codegen_->GenerateReadBarrierSlow(instruction, out, out, obj, offset);
6408    }
6409  } else {
6410    // Plain load with no read barrier.
6411    // /* HeapReference<Object> */ out = *(obj + offset)
6412    __ LoadFromOffset(kLoadWord, out_reg, obj_reg, offset);
6413    __ MaybeUnpoisonHeapReference(out_reg);
6414  }
6415}
6416
6417void InstructionCodeGeneratorARM::GenerateGcRootFieldLoad(HInstruction* instruction,
6418                                                          Location root,
6419                                                          Register obj,
6420                                                          uint32_t offset) {
6421  Register root_reg = root.AsRegister<Register>();
6422  if (kEmitCompilerReadBarrier) {
6423    if (kUseBakerReadBarrier) {
6424      // Fast path implementation of art::ReadBarrier::BarrierForRoot when
6425      // Baker's read barrier are used:
6426      //
6427      //   root = obj.field;
6428      //   if (Thread::Current()->GetIsGcMarking()) {
6429      //     root = ReadBarrier::Mark(root)
6430      //   }
6431
6432      // /* GcRoot<mirror::Object> */ root = *(obj + offset)
6433      __ LoadFromOffset(kLoadWord, root_reg, obj, offset);
6434      static_assert(
6435          sizeof(mirror::CompressedReference<mirror::Object>) == sizeof(GcRoot<mirror::Object>),
6436          "art::mirror::CompressedReference<mirror::Object> and art::GcRoot<mirror::Object> "
6437          "have different sizes.");
6438      static_assert(sizeof(mirror::CompressedReference<mirror::Object>) == sizeof(int32_t),
6439                    "art::mirror::CompressedReference<mirror::Object> and int32_t "
6440                    "have different sizes.");
6441
6442      // Slow path marking the GC root `root`.
6443      SlowPathCode* slow_path =
6444          new (GetGraph()->GetArena()) ReadBarrierMarkSlowPathARM(instruction, root);
6445      codegen_->AddSlowPath(slow_path);
6446
6447      // IP = Thread::Current()->GetIsGcMarking()
6448      __ LoadFromOffset(
6449          kLoadWord, IP, TR, Thread::IsGcMarkingOffset<kArmPointerSize>().Int32Value());
6450      __ CompareAndBranchIfNonZero(IP, slow_path->GetEntryLabel());
6451      __ Bind(slow_path->GetExitLabel());
6452    } else {
6453      // GC root loaded through a slow path for read barriers other
6454      // than Baker's.
6455      // /* GcRoot<mirror::Object>* */ root = obj + offset
6456      __ AddConstant(root_reg, obj, offset);
6457      // /* mirror::Object* */ root = root->Read()
6458      codegen_->GenerateReadBarrierForRootSlow(instruction, root, root);
6459    }
6460  } else {
6461    // Plain GC root load with no read barrier.
6462    // /* GcRoot<mirror::Object> */ root = *(obj + offset)
6463    __ LoadFromOffset(kLoadWord, root_reg, obj, offset);
6464    // Note that GC roots are not affected by heap poisoning, thus we
6465    // do not have to unpoison `root_reg` here.
6466  }
6467}
6468
6469void CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier(HInstruction* instruction,
6470                                                             Location ref,
6471                                                             Register obj,
6472                                                             uint32_t offset,
6473                                                             Location temp,
6474                                                             bool needs_null_check) {
6475  DCHECK(kEmitCompilerReadBarrier);
6476  DCHECK(kUseBakerReadBarrier);
6477
6478  // /* HeapReference<Object> */ ref = *(obj + offset)
6479  Location no_index = Location::NoLocation();
6480  ScaleFactor no_scale_factor = TIMES_1;
6481  GenerateReferenceLoadWithBakerReadBarrier(
6482      instruction, ref, obj, offset, no_index, no_scale_factor, temp, needs_null_check);
6483}
6484
6485void CodeGeneratorARM::GenerateArrayLoadWithBakerReadBarrier(HInstruction* instruction,
6486                                                             Location ref,
6487                                                             Register obj,
6488                                                             uint32_t data_offset,
6489                                                             Location index,
6490                                                             Location temp,
6491                                                             bool needs_null_check) {
6492  DCHECK(kEmitCompilerReadBarrier);
6493  DCHECK(kUseBakerReadBarrier);
6494
6495  static_assert(
6496      sizeof(mirror::HeapReference<mirror::Object>) == sizeof(int32_t),
6497      "art::mirror::HeapReference<art::mirror::Object> and int32_t have different sizes.");
6498  // /* HeapReference<Object> */ ref =
6499  //     *(obj + data_offset + index * sizeof(HeapReference<Object>))
6500  ScaleFactor scale_factor = TIMES_4;
6501  GenerateReferenceLoadWithBakerReadBarrier(
6502      instruction, ref, obj, data_offset, index, scale_factor, temp, needs_null_check);
6503}
6504
6505void CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier(HInstruction* instruction,
6506                                                                 Location ref,
6507                                                                 Register obj,
6508                                                                 uint32_t offset,
6509                                                                 Location index,
6510                                                                 ScaleFactor scale_factor,
6511                                                                 Location temp,
6512                                                                 bool needs_null_check) {
6513  DCHECK(kEmitCompilerReadBarrier);
6514  DCHECK(kUseBakerReadBarrier);
6515
6516  // In slow path based read barriers, the read barrier call is
6517  // inserted after the original load. However, in fast path based
6518  // Baker's read barriers, we need to perform the load of
6519  // mirror::Object::monitor_ *before* the original reference load.
6520  // This load-load ordering is required by the read barrier.
6521  // The fast path/slow path (for Baker's algorithm) should look like:
6522  //
6523  //   uint32_t rb_state = Lockword(obj->monitor_).ReadBarrierState();
6524  //   lfence;  // Load fence or artificial data dependency to prevent load-load reordering
6525  //   HeapReference<Object> ref = *src;  // Original reference load.
6526  //   bool is_gray = (rb_state == ReadBarrier::gray_ptr_);
6527  //   if (is_gray) {
6528  //     ref = ReadBarrier::Mark(ref);  // Performed by runtime entrypoint slow path.
6529  //   }
6530  //
6531  // Note: the original implementation in ReadBarrier::Barrier is
6532  // slightly more complex as it performs additional checks that we do
6533  // not do here for performance reasons.
6534
6535  Register ref_reg = ref.AsRegister<Register>();
6536  Register temp_reg = temp.AsRegister<Register>();
6537  uint32_t monitor_offset = mirror::Object::MonitorOffset().Int32Value();
6538
6539  // /* int32_t */ monitor = obj->monitor_
6540  __ LoadFromOffset(kLoadWord, temp_reg, obj, monitor_offset);
6541  if (needs_null_check) {
6542    MaybeRecordImplicitNullCheck(instruction);
6543  }
6544  // /* LockWord */ lock_word = LockWord(monitor)
6545  static_assert(sizeof(LockWord) == sizeof(int32_t),
6546                "art::LockWord and int32_t have different sizes.");
6547
6548  // Introduce a dependency on the lock_word including the rb_state,
6549  // which shall prevent load-load reordering without using
6550  // a memory barrier (which would be more expensive).
6551  // `obj` is unchanged by this operation, but its value now depends
6552  // on `temp_reg`.
6553  __ add(obj, obj, ShifterOperand(temp_reg, LSR, 32));
6554
6555  // The actual reference load.
6556  if (index.IsValid()) {
6557    // Load types involving an "index": ArrayGet and
6558    // UnsafeGetObject/UnsafeGetObjectVolatile intrinsics.
6559    // /* HeapReference<Object> */ ref = *(obj + offset + (index << scale_factor))
6560    if (index.IsConstant()) {
6561      size_t computed_offset =
6562          (index.GetConstant()->AsIntConstant()->GetValue() << scale_factor) + offset;
6563      __ LoadFromOffset(kLoadWord, ref_reg, obj, computed_offset);
6564    } else {
6565      // Handle the special case of the
6566      // UnsafeGetObject/UnsafeGetObjectVolatile intrinsics, which use
6567      // a register pair as index ("long offset"), of which only the low
6568      // part contains data.
6569      Register index_reg = index.IsRegisterPair()
6570          ? index.AsRegisterPairLow<Register>()
6571          : index.AsRegister<Register>();
6572      __ add(IP, obj, ShifterOperand(index_reg, LSL, scale_factor));
6573      __ LoadFromOffset(kLoadWord, ref_reg, IP, offset);
6574    }
6575  } else {
6576    // /* HeapReference<Object> */ ref = *(obj + offset)
6577    __ LoadFromOffset(kLoadWord, ref_reg, obj, offset);
6578  }
6579
6580  // Object* ref = ref_addr->AsMirrorPtr()
6581  __ MaybeUnpoisonHeapReference(ref_reg);
6582
6583  // Slow path marking the object `ref` when it is gray.
6584  SlowPathCode* slow_path =
6585      new (GetGraph()->GetArena()) ReadBarrierMarkSlowPathARM(instruction, ref);
6586  AddSlowPath(slow_path);
6587
6588  // if (rb_state == ReadBarrier::gray_ptr_)
6589  //   ref = ReadBarrier::Mark(ref);
6590  // Given the numeric representation, it's enough to check the low bit of the
6591  // rb_state. We do that by shifting the bit out of the lock word with LSRS
6592  // which can be a 16-bit instruction unlike the TST immediate.
6593  static_assert(ReadBarrier::white_ptr_ == 0, "Expecting white to have value 0");
6594  static_assert(ReadBarrier::gray_ptr_ == 1, "Expecting gray to have value 1");
6595  static_assert(ReadBarrier::black_ptr_ == 2, "Expecting black to have value 2");
6596  __ Lsrs(temp_reg, temp_reg, LockWord::kReadBarrierStateShift + 1);
6597  __ b(slow_path->GetEntryLabel(), CS);  // Carry flag is the last bit shifted out by LSRS.
6598  __ Bind(slow_path->GetExitLabel());
6599}
6600
6601void CodeGeneratorARM::GenerateReadBarrierSlow(HInstruction* instruction,
6602                                               Location out,
6603                                               Location ref,
6604                                               Location obj,
6605                                               uint32_t offset,
6606                                               Location index) {
6607  DCHECK(kEmitCompilerReadBarrier);
6608
6609  // Insert a slow path based read barrier *after* the reference load.
6610  //
6611  // If heap poisoning is enabled, the unpoisoning of the loaded
6612  // reference will be carried out by the runtime within the slow
6613  // path.
6614  //
6615  // Note that `ref` currently does not get unpoisoned (when heap
6616  // poisoning is enabled), which is alright as the `ref` argument is
6617  // not used by the artReadBarrierSlow entry point.
6618  //
6619  // TODO: Unpoison `ref` when it is used by artReadBarrierSlow.
6620  SlowPathCode* slow_path = new (GetGraph()->GetArena())
6621      ReadBarrierForHeapReferenceSlowPathARM(instruction, out, ref, obj, offset, index);
6622  AddSlowPath(slow_path);
6623
6624  __ b(slow_path->GetEntryLabel());
6625  __ Bind(slow_path->GetExitLabel());
6626}
6627
6628void CodeGeneratorARM::MaybeGenerateReadBarrierSlow(HInstruction* instruction,
6629                                                    Location out,
6630                                                    Location ref,
6631                                                    Location obj,
6632                                                    uint32_t offset,
6633                                                    Location index) {
6634  if (kEmitCompilerReadBarrier) {
6635    // Baker's read barriers shall be handled by the fast path
6636    // (CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier).
6637    DCHECK(!kUseBakerReadBarrier);
6638    // If heap poisoning is enabled, unpoisoning will be taken care of
6639    // by the runtime within the slow path.
6640    GenerateReadBarrierSlow(instruction, out, ref, obj, offset, index);
6641  } else if (kPoisonHeapReferences) {
6642    __ UnpoisonHeapReference(out.AsRegister<Register>());
6643  }
6644}
6645
6646void CodeGeneratorARM::GenerateReadBarrierForRootSlow(HInstruction* instruction,
6647                                                      Location out,
6648                                                      Location root) {
6649  DCHECK(kEmitCompilerReadBarrier);
6650
6651  // Insert a slow path based read barrier *after* the GC root load.
6652  //
6653  // Note that GC roots are not affected by heap poisoning, so we do
6654  // not need to do anything special for this here.
6655  SlowPathCode* slow_path =
6656      new (GetGraph()->GetArena()) ReadBarrierForRootSlowPathARM(instruction, out, root);
6657  AddSlowPath(slow_path);
6658
6659  __ b(slow_path->GetEntryLabel());
6660  __ Bind(slow_path->GetExitLabel());
6661}
6662
6663HInvokeStaticOrDirect::DispatchInfo CodeGeneratorARM::GetSupportedInvokeStaticOrDirectDispatch(
6664      const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info,
6665      MethodReference target_method) {
6666  HInvokeStaticOrDirect::DispatchInfo dispatch_info = desired_dispatch_info;
6667  // We disable pc-relative load when there is an irreducible loop, as the optimization
6668  // is incompatible with it.
6669  // TODO: Create as many ArmDexCacheArraysBase instructions as needed for methods
6670  // with irreducible loops.
6671  if (GetGraph()->HasIrreducibleLoops() &&
6672      (dispatch_info.method_load_kind ==
6673          HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative)) {
6674    dispatch_info.method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod;
6675  }
6676
6677  if (dispatch_info.code_ptr_location == HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative) {
6678    const DexFile& outer_dex_file = GetGraph()->GetDexFile();
6679    if (&outer_dex_file != target_method.dex_file) {
6680      // Calls across dex files are more likely to exceed the available BL range,
6681      // so use absolute patch with fixup if available and kCallArtMethod otherwise.
6682      HInvokeStaticOrDirect::CodePtrLocation code_ptr_location =
6683          (desired_dispatch_info.method_load_kind ==
6684           HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup)
6685          ? HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup
6686          : HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod;
6687      return HInvokeStaticOrDirect::DispatchInfo {
6688        dispatch_info.method_load_kind,
6689        code_ptr_location,
6690        dispatch_info.method_load_data,
6691        0u
6692      };
6693    }
6694  }
6695  return dispatch_info;
6696}
6697
6698Register CodeGeneratorARM::GetInvokeStaticOrDirectExtraParameter(HInvokeStaticOrDirect* invoke,
6699                                                                 Register temp) {
6700  DCHECK_EQ(invoke->InputCount(), invoke->GetNumberOfArguments() + 1u);
6701  Location location = invoke->GetLocations()->InAt(invoke->GetSpecialInputIndex());
6702  if (!invoke->GetLocations()->Intrinsified()) {
6703    return location.AsRegister<Register>();
6704  }
6705  // For intrinsics we allow any location, so it may be on the stack.
6706  if (!location.IsRegister()) {
6707    __ LoadFromOffset(kLoadWord, temp, SP, location.GetStackIndex());
6708    return temp;
6709  }
6710  // For register locations, check if the register was saved. If so, get it from the stack.
6711  // Note: There is a chance that the register was saved but not overwritten, so we could
6712  // save one load. However, since this is just an intrinsic slow path we prefer this
6713  // simple and more robust approach rather that trying to determine if that's the case.
6714  SlowPathCode* slow_path = GetCurrentSlowPath();
6715  DCHECK(slow_path != nullptr);  // For intrinsified invokes the call is emitted on the slow path.
6716  if (slow_path->IsCoreRegisterSaved(location.AsRegister<Register>())) {
6717    int stack_offset = slow_path->GetStackOffsetOfCoreRegister(location.AsRegister<Register>());
6718    __ LoadFromOffset(kLoadWord, temp, SP, stack_offset);
6719    return temp;
6720  }
6721  return location.AsRegister<Register>();
6722}
6723
6724void CodeGeneratorARM::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) {
6725  // For better instruction scheduling we load the direct code pointer before the method pointer.
6726  switch (invoke->GetCodePtrLocation()) {
6727    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup:
6728      // LR = code address from literal pool with link-time patch.
6729      __ LoadLiteral(LR, DeduplicateMethodCodeLiteral(invoke->GetTargetMethod()));
6730      break;
6731    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect:
6732      // LR = invoke->GetDirectCodePtr();
6733      __ LoadImmediate(LR, invoke->GetDirectCodePtr());
6734      break;
6735    default:
6736      break;
6737  }
6738
6739  Location callee_method = temp;  // For all kinds except kRecursive, callee will be in temp.
6740  switch (invoke->GetMethodLoadKind()) {
6741    case HInvokeStaticOrDirect::MethodLoadKind::kStringInit:
6742      // temp = thread->string_init_entrypoint
6743      __ LoadFromOffset(kLoadWord, temp.AsRegister<Register>(), TR, invoke->GetStringInitOffset());
6744      break;
6745    case HInvokeStaticOrDirect::MethodLoadKind::kRecursive:
6746      callee_method = invoke->GetLocations()->InAt(invoke->GetSpecialInputIndex());
6747      break;
6748    case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddress:
6749      __ LoadImmediate(temp.AsRegister<Register>(), invoke->GetMethodAddress());
6750      break;
6751    case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup:
6752      __ LoadLiteral(temp.AsRegister<Register>(),
6753                     DeduplicateMethodAddressLiteral(invoke->GetTargetMethod()));
6754      break;
6755    case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: {
6756      HArmDexCacheArraysBase* base =
6757          invoke->InputAt(invoke->GetSpecialInputIndex())->AsArmDexCacheArraysBase();
6758      Register base_reg = GetInvokeStaticOrDirectExtraParameter(invoke,
6759                                                                temp.AsRegister<Register>());
6760      int32_t offset = invoke->GetDexCacheArrayOffset() - base->GetElementOffset();
6761      __ LoadFromOffset(kLoadWord, temp.AsRegister<Register>(), base_reg, offset);
6762      break;
6763    }
6764    case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: {
6765      Location current_method = invoke->GetLocations()->InAt(invoke->GetSpecialInputIndex());
6766      Register method_reg;
6767      Register reg = temp.AsRegister<Register>();
6768      if (current_method.IsRegister()) {
6769        method_reg = current_method.AsRegister<Register>();
6770      } else {
6771        DCHECK(invoke->GetLocations()->Intrinsified());
6772        DCHECK(!current_method.IsValid());
6773        method_reg = reg;
6774        __ LoadFromOffset(kLoadWord, reg, SP, kCurrentMethodStackOffset);
6775      }
6776      // /* ArtMethod*[] */ temp = temp.ptr_sized_fields_->dex_cache_resolved_methods_;
6777      __ LoadFromOffset(kLoadWord,
6778                        reg,
6779                        method_reg,
6780                        ArtMethod::DexCacheResolvedMethodsOffset(kArmPointerSize).Int32Value());
6781      // temp = temp[index_in_cache];
6782      // Note: Don't use invoke->GetTargetMethod() as it may point to a different dex file.
6783      uint32_t index_in_cache = invoke->GetDexMethodIndex();
6784      __ LoadFromOffset(kLoadWord, reg, reg, CodeGenerator::GetCachePointerOffset(index_in_cache));
6785      break;
6786    }
6787  }
6788
6789  switch (invoke->GetCodePtrLocation()) {
6790    case HInvokeStaticOrDirect::CodePtrLocation::kCallSelf:
6791      __ bl(GetFrameEntryLabel());
6792      break;
6793    case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative:
6794      relative_call_patches_.emplace_back(invoke->GetTargetMethod());
6795      __ BindTrackedLabel(&relative_call_patches_.back().label);
6796      // Arbitrarily branch to the BL itself, override at link time.
6797      __ bl(&relative_call_patches_.back().label);
6798      break;
6799    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup:
6800    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect:
6801      // LR prepared above for better instruction scheduling.
6802      // LR()
6803      __ blx(LR);
6804      break;
6805    case HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod:
6806      // LR = callee_method->entry_point_from_quick_compiled_code_
6807      __ LoadFromOffset(
6808          kLoadWord, LR, callee_method.AsRegister<Register>(),
6809          ArtMethod::EntryPointFromQuickCompiledCodeOffset(kArmPointerSize).Int32Value());
6810      // LR()
6811      __ blx(LR);
6812      break;
6813  }
6814
6815  DCHECK(!IsLeafMethod());
6816}
6817
6818void CodeGeneratorARM::GenerateVirtualCall(HInvokeVirtual* invoke, Location temp_location) {
6819  Register temp = temp_location.AsRegister<Register>();
6820  uint32_t method_offset = mirror::Class::EmbeddedVTableEntryOffset(
6821      invoke->GetVTableIndex(), kArmPointerSize).Uint32Value();
6822
6823  // Use the calling convention instead of the location of the receiver, as
6824  // intrinsics may have put the receiver in a different register. In the intrinsics
6825  // slow path, the arguments have been moved to the right place, so here we are
6826  // guaranteed that the receiver is the first register of the calling convention.
6827  InvokeDexCallingConvention calling_convention;
6828  Register receiver = calling_convention.GetRegisterAt(0);
6829  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
6830  // /* HeapReference<Class> */ temp = receiver->klass_
6831  __ LoadFromOffset(kLoadWord, temp, receiver, class_offset);
6832  MaybeRecordImplicitNullCheck(invoke);
6833  // Instead of simply (possibly) unpoisoning `temp` here, we should
6834  // emit a read barrier for the previous class reference load.
6835  // However this is not required in practice, as this is an
6836  // intermediate/temporary reference and because the current
6837  // concurrent copying collector keeps the from-space memory
6838  // intact/accessible until the end of the marking phase (the
6839  // concurrent copying collector may not in the future).
6840  __ MaybeUnpoisonHeapReference(temp);
6841  // temp = temp->GetMethodAt(method_offset);
6842  uint32_t entry_point = ArtMethod::EntryPointFromQuickCompiledCodeOffset(
6843      kArmPointerSize).Int32Value();
6844  __ LoadFromOffset(kLoadWord, temp, temp, method_offset);
6845  // LR = temp->GetEntryPoint();
6846  __ LoadFromOffset(kLoadWord, LR, temp, entry_point);
6847  // LR();
6848  __ blx(LR);
6849}
6850
6851CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativeStringPatch(
6852    const DexFile& dex_file, uint32_t string_index) {
6853  return NewPcRelativePatch(dex_file, string_index, &pc_relative_string_patches_);
6854}
6855
6856CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativeTypePatch(
6857    const DexFile& dex_file, uint32_t type_index) {
6858  return NewPcRelativePatch(dex_file, type_index, &pc_relative_type_patches_);
6859}
6860
6861CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativeDexCacheArrayPatch(
6862    const DexFile& dex_file, uint32_t element_offset) {
6863  return NewPcRelativePatch(dex_file, element_offset, &pc_relative_dex_cache_patches_);
6864}
6865
6866CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativePatch(
6867    const DexFile& dex_file, uint32_t offset_or_index, ArenaDeque<PcRelativePatchInfo>* patches) {
6868  patches->emplace_back(dex_file, offset_or_index);
6869  return &patches->back();
6870}
6871
6872Literal* CodeGeneratorARM::DeduplicateBootImageStringLiteral(const DexFile& dex_file,
6873                                                             uint32_t string_index) {
6874  return boot_image_string_patches_.GetOrCreate(
6875      StringReference(&dex_file, string_index),
6876      [this]() { return __ NewLiteral<uint32_t>(/* placeholder */ 0u); });
6877}
6878
6879Literal* CodeGeneratorARM::DeduplicateBootImageTypeLiteral(const DexFile& dex_file,
6880                                                           uint32_t type_index) {
6881  return boot_image_type_patches_.GetOrCreate(
6882      TypeReference(&dex_file, type_index),
6883      [this]() { return __ NewLiteral<uint32_t>(/* placeholder */ 0u); });
6884}
6885
6886Literal* CodeGeneratorARM::DeduplicateBootImageAddressLiteral(uint32_t address) {
6887  bool needs_patch = GetCompilerOptions().GetIncludePatchInformation();
6888  Uint32ToLiteralMap* map = needs_patch ? &boot_image_address_patches_ : &uint32_literals_;
6889  return DeduplicateUint32Literal(dchecked_integral_cast<uint32_t>(address), map);
6890}
6891
6892Literal* CodeGeneratorARM::DeduplicateDexCacheAddressLiteral(uint32_t address) {
6893  return DeduplicateUint32Literal(address, &uint32_literals_);
6894}
6895
6896void CodeGeneratorARM::EmitLinkerPatches(ArenaVector<LinkerPatch>* linker_patches) {
6897  DCHECK(linker_patches->empty());
6898  size_t size =
6899      method_patches_.size() +
6900      call_patches_.size() +
6901      relative_call_patches_.size() +
6902      /* MOVW+MOVT for each base */ 2u * pc_relative_dex_cache_patches_.size() +
6903      boot_image_string_patches_.size() +
6904      /* MOVW+MOVT for each base */ 2u * pc_relative_string_patches_.size() +
6905      boot_image_type_patches_.size() +
6906      /* MOVW+MOVT for each base */ 2u * pc_relative_type_patches_.size() +
6907      boot_image_address_patches_.size();
6908  linker_patches->reserve(size);
6909  for (const auto& entry : method_patches_) {
6910    const MethodReference& target_method = entry.first;
6911    Literal* literal = entry.second;
6912    DCHECK(literal->GetLabel()->IsBound());
6913    uint32_t literal_offset = literal->GetLabel()->Position();
6914    linker_patches->push_back(LinkerPatch::MethodPatch(literal_offset,
6915                                                       target_method.dex_file,
6916                                                       target_method.dex_method_index));
6917  }
6918  for (const auto& entry : call_patches_) {
6919    const MethodReference& target_method = entry.first;
6920    Literal* literal = entry.second;
6921    DCHECK(literal->GetLabel()->IsBound());
6922    uint32_t literal_offset = literal->GetLabel()->Position();
6923    linker_patches->push_back(LinkerPatch::CodePatch(literal_offset,
6924                                                     target_method.dex_file,
6925                                                     target_method.dex_method_index));
6926  }
6927  for (const MethodPatchInfo<Label>& info : relative_call_patches_) {
6928    uint32_t literal_offset = info.label.Position();
6929    linker_patches->push_back(LinkerPatch::RelativeCodePatch(literal_offset,
6930                                                             info.target_method.dex_file,
6931                                                             info.target_method.dex_method_index));
6932  }
6933  for (const PcRelativePatchInfo& info : pc_relative_dex_cache_patches_) {
6934    const DexFile& dex_file = info.target_dex_file;
6935    size_t base_element_offset = info.offset_or_index;
6936    DCHECK(info.add_pc_label.IsBound());
6937    uint32_t add_pc_offset = dchecked_integral_cast<uint32_t>(info.add_pc_label.Position());
6938    // Add MOVW patch.
6939    DCHECK(info.movw_label.IsBound());
6940    uint32_t movw_offset = dchecked_integral_cast<uint32_t>(info.movw_label.Position());
6941    linker_patches->push_back(LinkerPatch::DexCacheArrayPatch(movw_offset,
6942                                                              &dex_file,
6943                                                              add_pc_offset,
6944                                                              base_element_offset));
6945    // Add MOVT patch.
6946    DCHECK(info.movt_label.IsBound());
6947    uint32_t movt_offset = dchecked_integral_cast<uint32_t>(info.movt_label.Position());
6948    linker_patches->push_back(LinkerPatch::DexCacheArrayPatch(movt_offset,
6949                                                              &dex_file,
6950                                                              add_pc_offset,
6951                                                              base_element_offset));
6952  }
6953  for (const auto& entry : boot_image_string_patches_) {
6954    const StringReference& target_string = entry.first;
6955    Literal* literal = entry.second;
6956    DCHECK(literal->GetLabel()->IsBound());
6957    uint32_t literal_offset = literal->GetLabel()->Position();
6958    linker_patches->push_back(LinkerPatch::StringPatch(literal_offset,
6959                                                       target_string.dex_file,
6960                                                       target_string.string_index));
6961  }
6962  for (const PcRelativePatchInfo& info : pc_relative_string_patches_) {
6963    const DexFile& dex_file = info.target_dex_file;
6964    uint32_t string_index = info.offset_or_index;
6965    DCHECK(info.add_pc_label.IsBound());
6966    uint32_t add_pc_offset = dchecked_integral_cast<uint32_t>(info.add_pc_label.Position());
6967    // Add MOVW patch.
6968    DCHECK(info.movw_label.IsBound());
6969    uint32_t movw_offset = dchecked_integral_cast<uint32_t>(info.movw_label.Position());
6970    linker_patches->push_back(LinkerPatch::RelativeStringPatch(movw_offset,
6971                                                               &dex_file,
6972                                                               add_pc_offset,
6973                                                               string_index));
6974    // Add MOVT patch.
6975    DCHECK(info.movt_label.IsBound());
6976    uint32_t movt_offset = dchecked_integral_cast<uint32_t>(info.movt_label.Position());
6977    linker_patches->push_back(LinkerPatch::RelativeStringPatch(movt_offset,
6978                                                               &dex_file,
6979                                                               add_pc_offset,
6980                                                               string_index));
6981  }
6982  for (const auto& entry : boot_image_type_patches_) {
6983    const TypeReference& target_type = entry.first;
6984    Literal* literal = entry.second;
6985    DCHECK(literal->GetLabel()->IsBound());
6986    uint32_t literal_offset = literal->GetLabel()->Position();
6987    linker_patches->push_back(LinkerPatch::TypePatch(literal_offset,
6988                                                     target_type.dex_file,
6989                                                     target_type.type_index));
6990  }
6991  for (const PcRelativePatchInfo& info : pc_relative_type_patches_) {
6992    const DexFile& dex_file = info.target_dex_file;
6993    uint32_t type_index = info.offset_or_index;
6994    DCHECK(info.add_pc_label.IsBound());
6995    uint32_t add_pc_offset = dchecked_integral_cast<uint32_t>(info.add_pc_label.Position());
6996    // Add MOVW patch.
6997    DCHECK(info.movw_label.IsBound());
6998    uint32_t movw_offset = dchecked_integral_cast<uint32_t>(info.movw_label.Position());
6999    linker_patches->push_back(LinkerPatch::RelativeTypePatch(movw_offset,
7000                                                             &dex_file,
7001                                                             add_pc_offset,
7002                                                             type_index));
7003    // Add MOVT patch.
7004    DCHECK(info.movt_label.IsBound());
7005    uint32_t movt_offset = dchecked_integral_cast<uint32_t>(info.movt_label.Position());
7006    linker_patches->push_back(LinkerPatch::RelativeTypePatch(movt_offset,
7007                                                             &dex_file,
7008                                                             add_pc_offset,
7009                                                             type_index));
7010  }
7011  for (const auto& entry : boot_image_address_patches_) {
7012    DCHECK(GetCompilerOptions().GetIncludePatchInformation());
7013    Literal* literal = entry.second;
7014    DCHECK(literal->GetLabel()->IsBound());
7015    uint32_t literal_offset = literal->GetLabel()->Position();
7016    linker_patches->push_back(LinkerPatch::RecordPosition(literal_offset));
7017  }
7018}
7019
7020Literal* CodeGeneratorARM::DeduplicateUint32Literal(uint32_t value, Uint32ToLiteralMap* map) {
7021  return map->GetOrCreate(
7022      value,
7023      [this, value]() { return __ NewLiteral<uint32_t>(value); });
7024}
7025
7026Literal* CodeGeneratorARM::DeduplicateMethodLiteral(MethodReference target_method,
7027                                                    MethodToLiteralMap* map) {
7028  return map->GetOrCreate(
7029      target_method,
7030      [this]() { return __ NewLiteral<uint32_t>(/* placeholder */ 0u); });
7031}
7032
7033Literal* CodeGeneratorARM::DeduplicateMethodAddressLiteral(MethodReference target_method) {
7034  return DeduplicateMethodLiteral(target_method, &method_patches_);
7035}
7036
7037Literal* CodeGeneratorARM::DeduplicateMethodCodeLiteral(MethodReference target_method) {
7038  return DeduplicateMethodLiteral(target_method, &call_patches_);
7039}
7040
7041void LocationsBuilderARM::VisitMultiplyAccumulate(HMultiplyAccumulate* instr) {
7042  LocationSummary* locations =
7043      new (GetGraph()->GetArena()) LocationSummary(instr, LocationSummary::kNoCall);
7044  locations->SetInAt(HMultiplyAccumulate::kInputAccumulatorIndex,
7045                     Location::RequiresRegister());
7046  locations->SetInAt(HMultiplyAccumulate::kInputMulLeftIndex, Location::RequiresRegister());
7047  locations->SetInAt(HMultiplyAccumulate::kInputMulRightIndex, Location::RequiresRegister());
7048  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
7049}
7050
7051void InstructionCodeGeneratorARM::VisitMultiplyAccumulate(HMultiplyAccumulate* instr) {
7052  LocationSummary* locations = instr->GetLocations();
7053  Register res = locations->Out().AsRegister<Register>();
7054  Register accumulator =
7055      locations->InAt(HMultiplyAccumulate::kInputAccumulatorIndex).AsRegister<Register>();
7056  Register mul_left =
7057      locations->InAt(HMultiplyAccumulate::kInputMulLeftIndex).AsRegister<Register>();
7058  Register mul_right =
7059      locations->InAt(HMultiplyAccumulate::kInputMulRightIndex).AsRegister<Register>();
7060
7061  if (instr->GetOpKind() == HInstruction::kAdd) {
7062    __ mla(res, mul_left, mul_right, accumulator);
7063  } else {
7064    __ mls(res, mul_left, mul_right, accumulator);
7065  }
7066}
7067
7068void LocationsBuilderARM::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) {
7069  // Nothing to do, this should be removed during prepare for register allocator.
7070  LOG(FATAL) << "Unreachable";
7071}
7072
7073void InstructionCodeGeneratorARM::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) {
7074  // Nothing to do, this should be removed during prepare for register allocator.
7075  LOG(FATAL) << "Unreachable";
7076}
7077
7078// Simple implementation of packed switch - generate cascaded compare/jumps.
7079void LocationsBuilderARM::VisitPackedSwitch(HPackedSwitch* switch_instr) {
7080  LocationSummary* locations =
7081      new (GetGraph()->GetArena()) LocationSummary(switch_instr, LocationSummary::kNoCall);
7082  locations->SetInAt(0, Location::RequiresRegister());
7083  if (switch_instr->GetNumEntries() > kPackedSwitchCompareJumpThreshold &&
7084      codegen_->GetAssembler()->IsThumb()) {
7085    locations->AddTemp(Location::RequiresRegister());  // We need a temp for the table base.
7086    if (switch_instr->GetStartValue() != 0) {
7087      locations->AddTemp(Location::RequiresRegister());  // We need a temp for the bias.
7088    }
7089  }
7090}
7091
7092void InstructionCodeGeneratorARM::VisitPackedSwitch(HPackedSwitch* switch_instr) {
7093  int32_t lower_bound = switch_instr->GetStartValue();
7094  uint32_t num_entries = switch_instr->GetNumEntries();
7095  LocationSummary* locations = switch_instr->GetLocations();
7096  Register value_reg = locations->InAt(0).AsRegister<Register>();
7097  HBasicBlock* default_block = switch_instr->GetDefaultBlock();
7098
7099  if (num_entries <= kPackedSwitchCompareJumpThreshold || !codegen_->GetAssembler()->IsThumb()) {
7100    // Create a series of compare/jumps.
7101    Register temp_reg = IP;
7102    // Note: It is fine for the below AddConstantSetFlags() using IP register to temporarily store
7103    // the immediate, because IP is used as the destination register. For the other
7104    // AddConstantSetFlags() and GenerateCompareWithImmediate(), the immediate values are constant,
7105    // and they can be encoded in the instruction without making use of IP register.
7106    __ AddConstantSetFlags(temp_reg, value_reg, -lower_bound);
7107
7108    const ArenaVector<HBasicBlock*>& successors = switch_instr->GetBlock()->GetSuccessors();
7109    // Jump to successors[0] if value == lower_bound.
7110    __ b(codegen_->GetLabelOf(successors[0]), EQ);
7111    int32_t last_index = 0;
7112    for (; num_entries - last_index > 2; last_index += 2) {
7113      __ AddConstantSetFlags(temp_reg, temp_reg, -2);
7114      // Jump to successors[last_index + 1] if value < case_value[last_index + 2].
7115      __ b(codegen_->GetLabelOf(successors[last_index + 1]), LO);
7116      // Jump to successors[last_index + 2] if value == case_value[last_index + 2].
7117      __ b(codegen_->GetLabelOf(successors[last_index + 2]), EQ);
7118    }
7119    if (num_entries - last_index == 2) {
7120      // The last missing case_value.
7121      __ CmpConstant(temp_reg, 1);
7122      __ b(codegen_->GetLabelOf(successors[last_index + 1]), EQ);
7123    }
7124
7125    // And the default for any other value.
7126    if (!codegen_->GoesToNextBlock(switch_instr->GetBlock(), default_block)) {
7127      __ b(codegen_->GetLabelOf(default_block));
7128    }
7129  } else {
7130    // Create a table lookup.
7131    Register temp_reg = locations->GetTemp(0).AsRegister<Register>();
7132
7133    // Materialize a pointer to the switch table
7134    std::vector<Label*> labels(num_entries);
7135    const ArenaVector<HBasicBlock*>& successors = switch_instr->GetBlock()->GetSuccessors();
7136    for (uint32_t i = 0; i < num_entries; i++) {
7137      labels[i] = codegen_->GetLabelOf(successors[i]);
7138    }
7139    JumpTable* table = __ CreateJumpTable(std::move(labels), temp_reg);
7140
7141    // Remove the bias.
7142    Register key_reg;
7143    if (lower_bound != 0) {
7144      key_reg = locations->GetTemp(1).AsRegister<Register>();
7145      __ AddConstant(key_reg, value_reg, -lower_bound);
7146    } else {
7147      key_reg = value_reg;
7148    }
7149
7150    // Check whether the value is in the table, jump to default block if not.
7151    __ CmpConstant(key_reg, num_entries - 1);
7152    __ b(codegen_->GetLabelOf(default_block), Condition::HI);
7153
7154    // Load the displacement from the table.
7155    __ ldr(temp_reg, Address(temp_reg, key_reg, Shift::LSL, 2));
7156
7157    // Dispatch is a direct add to the PC (for Thumb2).
7158    __ EmitJumpTableDispatch(table, temp_reg);
7159  }
7160}
7161
7162void LocationsBuilderARM::VisitArmDexCacheArraysBase(HArmDexCacheArraysBase* base) {
7163  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(base);
7164  locations->SetOut(Location::RequiresRegister());
7165}
7166
7167void InstructionCodeGeneratorARM::VisitArmDexCacheArraysBase(HArmDexCacheArraysBase* base) {
7168  Register base_reg = base->GetLocations()->Out().AsRegister<Register>();
7169  CodeGeneratorARM::PcRelativePatchInfo* labels =
7170      codegen_->NewPcRelativeDexCacheArrayPatch(base->GetDexFile(), base->GetElementOffset());
7171  __ BindTrackedLabel(&labels->movw_label);
7172  __ movw(base_reg, /* placeholder */ 0u);
7173  __ BindTrackedLabel(&labels->movt_label);
7174  __ movt(base_reg, /* placeholder */ 0u);
7175  __ BindTrackedLabel(&labels->add_pc_label);
7176  __ add(base_reg, base_reg, ShifterOperand(PC));
7177}
7178
7179void CodeGeneratorARM::MoveFromReturnRegister(Location trg, Primitive::Type type) {
7180  if (!trg.IsValid()) {
7181    DCHECK_EQ(type, Primitive::kPrimVoid);
7182    return;
7183  }
7184
7185  DCHECK_NE(type, Primitive::kPrimVoid);
7186
7187  Location return_loc = InvokeDexCallingConventionVisitorARM().GetReturnLocation(type);
7188  if (return_loc.Equals(trg)) {
7189    return;
7190  }
7191
7192  // TODO: Consider pairs in the parallel move resolver, then this could be nicely merged
7193  //       with the last branch.
7194  if (type == Primitive::kPrimLong) {
7195    HParallelMove parallel_move(GetGraph()->GetArena());
7196    parallel_move.AddMove(return_loc.ToLow(), trg.ToLow(), Primitive::kPrimInt, nullptr);
7197    parallel_move.AddMove(return_loc.ToHigh(), trg.ToHigh(), Primitive::kPrimInt, nullptr);
7198    GetMoveResolver()->EmitNativeCode(&parallel_move);
7199  } else if (type == Primitive::kPrimDouble) {
7200    HParallelMove parallel_move(GetGraph()->GetArena());
7201    parallel_move.AddMove(return_loc.ToLow(), trg.ToLow(), Primitive::kPrimFloat, nullptr);
7202    parallel_move.AddMove(return_loc.ToHigh(), trg.ToHigh(), Primitive::kPrimFloat, nullptr);
7203    GetMoveResolver()->EmitNativeCode(&parallel_move);
7204  } else {
7205    // Let the parallel move resolver take care of all of this.
7206    HParallelMove parallel_move(GetGraph()->GetArena());
7207    parallel_move.AddMove(return_loc, trg, type, nullptr);
7208    GetMoveResolver()->EmitNativeCode(&parallel_move);
7209  }
7210}
7211
7212void LocationsBuilderARM::VisitClassTableGet(HClassTableGet* instruction) {
7213  LocationSummary* locations =
7214      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
7215  locations->SetInAt(0, Location::RequiresRegister());
7216  locations->SetOut(Location::RequiresRegister());
7217}
7218
7219void InstructionCodeGeneratorARM::VisitClassTableGet(HClassTableGet* instruction) {
7220  LocationSummary* locations = instruction->GetLocations();
7221  if (instruction->GetTableKind() == HClassTableGet::TableKind::kVTable) {
7222    uint32_t method_offset = mirror::Class::EmbeddedVTableEntryOffset(
7223        instruction->GetIndex(), kArmPointerSize).SizeValue();
7224    __ LoadFromOffset(kLoadWord,
7225                      locations->Out().AsRegister<Register>(),
7226                      locations->InAt(0).AsRegister<Register>(),
7227                      method_offset);
7228  } else {
7229    uint32_t method_offset = static_cast<uint32_t>(ImTable::OffsetOfElement(
7230        instruction->GetIndex(), kArmPointerSize));
7231    __ LoadFromOffset(kLoadWord,
7232                      locations->Out().AsRegister<Register>(),
7233                      locations->InAt(0).AsRegister<Register>(),
7234                      mirror::Class::ImtPtrOffset(kArmPointerSize).Uint32Value());
7235    __ LoadFromOffset(kLoadWord,
7236                      locations->Out().AsRegister<Register>(),
7237                      locations->Out().AsRegister<Register>(),
7238                      method_offset);
7239  }
7240}
7241
7242#undef __
7243#undef QUICK_ENTRY_POINT
7244
7245}  // namespace arm
7246}  // namespace art
7247