code_generator_arm.cc revision ccf15bca330f9a23337b1a4b5850f7fcc6c1bf15 
1/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "code_generator_arm.h"
18
19#include "arch/arm/instruction_set_features_arm.h"
20#include "art_method.h"
21#include "code_generator_utils.h"
22#include "compiled_method.h"
23#include "entrypoints/quick/quick_entrypoints.h"
24#include "gc/accounting/card_table.h"
25#include "intrinsics.h"
26#include "intrinsics_arm.h"
27#include "mirror/array-inl.h"
28#include "mirror/class-inl.h"
29#include "thread.h"
30#include "utils/arm/assembler_arm.h"
31#include "utils/arm/managed_register_arm.h"
32#include "utils/assembler.h"
33#include "utils/stack_checks.h"
34
35namespace art {
36
37template<class MirrorType>
38class GcRoot;
39
40namespace arm {
41
42static bool ExpectedPairLayout(Location location) {
43  // We expected this for both core and fpu register pairs.
44  return ((location.low() & 1) == 0) && (location.low() + 1 == location.high());
45}
46
47static constexpr int kCurrentMethodStackOffset = 0;
48static constexpr Register kMethodRegisterArgument = R0;
49
50static constexpr Register kCoreAlwaysSpillRegister = R5;
51static constexpr Register kCoreCalleeSaves[] =
52    { R5, R6, R7, R8, R10, R11, LR };
53static constexpr SRegister kFpuCalleeSaves[] =
54    { S16, S17, S18, S19, S20, S21, S22, S23, S24, S25, S26, S27, S28, S29, S30, S31 };
55
56// D31 cannot be split into two S registers, and the register allocator only works on
57// S registers. Therefore there is no need to block it.
58static constexpr DRegister DTMP = D31;
59
60static constexpr uint32_t kPackedSwitchCompareJumpThreshold = 7;
61
62// NOLINT on __ macro to suppress wrong warning/fix (misc-macro-parentheses) from clang-tidy.
63#define __ down_cast<ArmAssembler*>(codegen->GetAssembler())->  // NOLINT
64#define QUICK_ENTRY_POINT(x) QUICK_ENTRYPOINT_OFFSET(kArmPointerSize, x).Int32Value()
65
66class NullCheckSlowPathARM : public SlowPathCode {
67 public:
68  explicit NullCheckSlowPathARM(HNullCheck* instruction) : SlowPathCode(instruction) {}
69
70  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
71    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
72    __ Bind(GetEntryLabel());
73    if (instruction_->CanThrowIntoCatchBlock()) {
74      // Live registers will be restored in the catch block if caught.
75      SaveLiveRegisters(codegen, instruction_->GetLocations());
76    }
77    arm_codegen->InvokeRuntime(
78        QUICK_ENTRY_POINT(pThrowNullPointer), instruction_, instruction_->GetDexPc(), this);
79    CheckEntrypointTypes<kQuickThrowNullPointer, void, void>();
80  }
81
82  bool IsFatal() const OVERRIDE { return true; }
83
84  const char* GetDescription() const OVERRIDE { return "NullCheckSlowPathARM"; }
85
86 private:
87  DISALLOW_COPY_AND_ASSIGN(NullCheckSlowPathARM);
88};
89
90class DivZeroCheckSlowPathARM : public SlowPathCode {
91 public:
92  explicit DivZeroCheckSlowPathARM(HDivZeroCheck* instruction) : SlowPathCode(instruction) {}
93
94  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
95    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
96    __ Bind(GetEntryLabel());
97    if (instruction_->CanThrowIntoCatchBlock()) {
98      // Live registers will be restored in the catch block if caught.
99      SaveLiveRegisters(codegen, instruction_->GetLocations());
100    }
101    arm_codegen->InvokeRuntime(
102        QUICK_ENTRY_POINT(pThrowDivZero), instruction_, instruction_->GetDexPc(), this);
103    CheckEntrypointTypes<kQuickThrowDivZero, void, void>();
104  }
105
106  bool IsFatal() const OVERRIDE { return true; }
107
108  const char* GetDescription() const OVERRIDE { return "DivZeroCheckSlowPathARM"; }
109
110 private:
111  DISALLOW_COPY_AND_ASSIGN(DivZeroCheckSlowPathARM);
112};
113
114class SuspendCheckSlowPathARM : public SlowPathCode {
115 public:
116  SuspendCheckSlowPathARM(HSuspendCheck* instruction, HBasicBlock* successor)
117      : SlowPathCode(instruction), successor_(successor) {}
118
119  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
120    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
121    __ Bind(GetEntryLabel());
122    arm_codegen->InvokeRuntime(
123        QUICK_ENTRY_POINT(pTestSuspend), instruction_, instruction_->GetDexPc(), this);
124    CheckEntrypointTypes<kQuickTestSuspend, void, void>();
125    if (successor_ == nullptr) {
126      __ b(GetReturnLabel());
127    } else {
128      __ b(arm_codegen->GetLabelOf(successor_));
129    }
130  }
131
132  Label* GetReturnLabel() {
133    DCHECK(successor_ == nullptr);
134    return &return_label_;
135  }
136
137  HBasicBlock* GetSuccessor() const {
138    return successor_;
139  }
140
141  const char* GetDescription() const OVERRIDE { return "SuspendCheckSlowPathARM"; }
142
143 private:
144  // If not null, the block to branch to after the suspend check.
145  HBasicBlock* const successor_;
146
147  // If `successor_` is null, the label to branch to after the suspend check.
148  Label return_label_;
149
150  DISALLOW_COPY_AND_ASSIGN(SuspendCheckSlowPathARM);
151};
152
153class BoundsCheckSlowPathARM : public SlowPathCode {
154 public:
155  explicit BoundsCheckSlowPathARM(HBoundsCheck* instruction)
156      : SlowPathCode(instruction) {}
157
158  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
159    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
160    LocationSummary* locations = instruction_->GetLocations();
161
162    __ Bind(GetEntryLabel());
163    if (instruction_->CanThrowIntoCatchBlock()) {
164      // Live registers will be restored in the catch block if caught.
165      SaveLiveRegisters(codegen, instruction_->GetLocations());
166    }
167    // We're moving two locations to locations that could overlap, so we need a parallel
168    // move resolver.
169    InvokeRuntimeCallingConvention calling_convention;
170    codegen->EmitParallelMoves(
171        locations->InAt(0),
172        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
173        Primitive::kPrimInt,
174        locations->InAt(1),
175        Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
176        Primitive::kPrimInt);
177    uint32_t entry_point_offset = instruction_->AsBoundsCheck()->IsStringCharAt()
178        ? QUICK_ENTRY_POINT(pThrowStringBounds)
179        : QUICK_ENTRY_POINT(pThrowArrayBounds);
180    arm_codegen->InvokeRuntime(entry_point_offset, instruction_, instruction_->GetDexPc(), this);
181    CheckEntrypointTypes<kQuickThrowStringBounds, void, int32_t, int32_t>();
182    CheckEntrypointTypes<kQuickThrowArrayBounds, void, int32_t, int32_t>();
183  }
184
185  bool IsFatal() const OVERRIDE { return true; }
186
187  const char* GetDescription() const OVERRIDE { return "BoundsCheckSlowPathARM"; }
188
189 private:
190  DISALLOW_COPY_AND_ASSIGN(BoundsCheckSlowPathARM);
191};
192
193class LoadClassSlowPathARM : public SlowPathCode {
194 public:
195  LoadClassSlowPathARM(HLoadClass* cls,
196                       HInstruction* at,
197                       uint32_t dex_pc,
198                       bool do_clinit)
199      : SlowPathCode(at), cls_(cls), at_(at), dex_pc_(dex_pc), do_clinit_(do_clinit) {
200    DCHECK(at->IsLoadClass() || at->IsClinitCheck());
201  }
202
203  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
204    LocationSummary* locations = at_->GetLocations();
205
206    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
207    __ Bind(GetEntryLabel());
208    SaveLiveRegisters(codegen, locations);
209
210    InvokeRuntimeCallingConvention calling_convention;
211    __ LoadImmediate(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex());
212    int32_t entry_point_offset = do_clinit_
213        ? QUICK_ENTRY_POINT(pInitializeStaticStorage)
214        : QUICK_ENTRY_POINT(pInitializeType);
215    arm_codegen->InvokeRuntime(entry_point_offset, at_, dex_pc_, this);
216    if (do_clinit_) {
217      CheckEntrypointTypes<kQuickInitializeStaticStorage, void*, uint32_t>();
218    } else {
219      CheckEntrypointTypes<kQuickInitializeType, void*, uint32_t>();
220    }
221
222    // Move the class to the desired location.
223    Location out = locations->Out();
224    if (out.IsValid()) {
225      DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
226      arm_codegen->Move32(locations->Out(), Location::RegisterLocation(R0));
227    }
228    RestoreLiveRegisters(codegen, locations);
229    __ b(GetExitLabel());
230  }
231
232  const char* GetDescription() const OVERRIDE { return "LoadClassSlowPathARM"; }
233
234 private:
235  // The class this slow path will load.
236  HLoadClass* const cls_;
237
238  // The instruction where this slow path is happening.
239  // (Might be the load class or an initialization check).
240  HInstruction* const at_;
241
242  // The dex PC of `at_`.
243  const uint32_t dex_pc_;
244
245  // Whether to initialize the class.
246  const bool do_clinit_;
247
248  DISALLOW_COPY_AND_ASSIGN(LoadClassSlowPathARM);
249};
250
251class LoadStringSlowPathARM : public SlowPathCode {
252 public:
253  explicit LoadStringSlowPathARM(HLoadString* instruction) : SlowPathCode(instruction) {}
254
255  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
256    LocationSummary* locations = instruction_->GetLocations();
257    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg()));
258
259    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
260    __ Bind(GetEntryLabel());
261    SaveLiveRegisters(codegen, locations);
262
263    InvokeRuntimeCallingConvention calling_convention;
264    const uint32_t string_index = instruction_->AsLoadString()->GetStringIndex();
265    __ LoadImmediate(calling_convention.GetRegisterAt(0), string_index);
266    arm_codegen->InvokeRuntime(
267        QUICK_ENTRY_POINT(pResolveString), instruction_, instruction_->GetDexPc(), this);
268    CheckEntrypointTypes<kQuickResolveString, void*, uint32_t>();
269    arm_codegen->Move32(locations->Out(), Location::RegisterLocation(R0));
270
271    RestoreLiveRegisters(codegen, locations);
272    __ b(GetExitLabel());
273  }
274
275  const char* GetDescription() const OVERRIDE { return "LoadStringSlowPathARM"; }
276
277 private:
278  DISALLOW_COPY_AND_ASSIGN(LoadStringSlowPathARM);
279};
280
281class TypeCheckSlowPathARM : public SlowPathCode {
282 public:
283  TypeCheckSlowPathARM(HInstruction* instruction, bool is_fatal)
284      : SlowPathCode(instruction), is_fatal_(is_fatal) {}
285
286  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
287    LocationSummary* locations = instruction_->GetLocations();
288    Location object_class = instruction_->IsCheckCast() ? locations->GetTemp(0)
289                                                        : locations->Out();
290    DCHECK(instruction_->IsCheckCast()
291           || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg()));
292
293    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
294    __ Bind(GetEntryLabel());
295
296    if (!is_fatal_) {
297      SaveLiveRegisters(codegen, locations);
298    }
299
300    // We're moving two locations to locations that could overlap, so we need a parallel
301    // move resolver.
302    InvokeRuntimeCallingConvention calling_convention;
303    codegen->EmitParallelMoves(
304        locations->InAt(1),
305        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
306        Primitive::kPrimNot,
307        object_class,
308        Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
309        Primitive::kPrimNot);
310
311    if (instruction_->IsInstanceOf()) {
312      arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pInstanceofNonTrivial),
313                                 instruction_,
314                                 instruction_->GetDexPc(),
315                                 this);
316      CheckEntrypointTypes<
317          kQuickInstanceofNonTrivial, size_t, const mirror::Class*, const mirror::Class*>();
318      arm_codegen->Move32(locations->Out(), Location::RegisterLocation(R0));
319    } else {
320      DCHECK(instruction_->IsCheckCast());
321      arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pCheckCast),
322                                 instruction_,
323                                 instruction_->GetDexPc(),
324                                 this);
325      CheckEntrypointTypes<kQuickCheckCast, void, const mirror::Class*, const mirror::Class*>();
326    }
327
328    if (!is_fatal_) {
329      RestoreLiveRegisters(codegen, locations);
330      __ b(GetExitLabel());
331    }
332  }
333
334  const char* GetDescription() const OVERRIDE { return "TypeCheckSlowPathARM"; }
335
336  bool IsFatal() const OVERRIDE { return is_fatal_; }
337
338 private:
339  const bool is_fatal_;
340
341  DISALLOW_COPY_AND_ASSIGN(TypeCheckSlowPathARM);
342};
343
344class DeoptimizationSlowPathARM : public SlowPathCode {
345 public:
346  explicit DeoptimizationSlowPathARM(HDeoptimize* instruction)
347    : SlowPathCode(instruction) {}
348
349  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
350    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
351    __ Bind(GetEntryLabel());
352    SaveLiveRegisters(codegen, instruction_->GetLocations());
353    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pDeoptimize),
354                               instruction_,
355                               instruction_->GetDexPc(),
356                               this);
357    CheckEntrypointTypes<kQuickDeoptimize, void, void>();
358  }
359
360  const char* GetDescription() const OVERRIDE { return "DeoptimizationSlowPathARM"; }
361
362 private:
363  DISALLOW_COPY_AND_ASSIGN(DeoptimizationSlowPathARM);
364};
365
366class ArraySetSlowPathARM : public SlowPathCode {
367 public:
368  explicit ArraySetSlowPathARM(HInstruction* instruction) : SlowPathCode(instruction) {}
369
370  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
371    LocationSummary* locations = instruction_->GetLocations();
372    __ Bind(GetEntryLabel());
373    SaveLiveRegisters(codegen, locations);
374
375    InvokeRuntimeCallingConvention calling_convention;
376    HParallelMove parallel_move(codegen->GetGraph()->GetArena());
377    parallel_move.AddMove(
378        locations->InAt(0),
379        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
380        Primitive::kPrimNot,
381        nullptr);
382    parallel_move.AddMove(
383        locations->InAt(1),
384        Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
385        Primitive::kPrimInt,
386        nullptr);
387    parallel_move.AddMove(
388        locations->InAt(2),
389        Location::RegisterLocation(calling_convention.GetRegisterAt(2)),
390        Primitive::kPrimNot,
391        nullptr);
392    codegen->GetMoveResolver()->EmitNativeCode(&parallel_move);
393
394    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
395    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pAputObject),
396                               instruction_,
397                               instruction_->GetDexPc(),
398                               this);
399    CheckEntrypointTypes<kQuickAputObject, void, mirror::Array*, int32_t, mirror::Object*>();
400    RestoreLiveRegisters(codegen, locations);
401    __ b(GetExitLabel());
402  }
403
404  const char* GetDescription() const OVERRIDE { return "ArraySetSlowPathARM"; }
405
406 private:
407  DISALLOW_COPY_AND_ASSIGN(ArraySetSlowPathARM);
408};
409
410// Slow path marking an object during a read barrier.
411class ReadBarrierMarkSlowPathARM : public SlowPathCode {
412 public:
413  ReadBarrierMarkSlowPathARM(HInstruction* instruction, Location obj)
414      : SlowPathCode(instruction), obj_(obj) {
415    DCHECK(kEmitCompilerReadBarrier);
416  }
417
418  const char* GetDescription() const OVERRIDE { return "ReadBarrierMarkSlowPathARM"; }
419
420  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
421    LocationSummary* locations = instruction_->GetLocations();
422    Register reg = obj_.AsRegister<Register>();
423    DCHECK(locations->CanCall());
424    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg));
425    DCHECK(instruction_->IsInstanceFieldGet() ||
426           instruction_->IsStaticFieldGet() ||
427           instruction_->IsArrayGet() ||
428           instruction_->IsLoadClass() ||
429           instruction_->IsLoadString() ||
430           instruction_->IsInstanceOf() ||
431           instruction_->IsCheckCast() ||
432           (instruction_->IsInvokeVirtual() && instruction_->GetLocations()->Intrinsified()) ||
433           (instruction_->IsInvokeStaticOrDirect() && instruction_->GetLocations()->Intrinsified()))
434        << "Unexpected instruction in read barrier marking slow path: "
435        << instruction_->DebugName();
436
437    __ Bind(GetEntryLabel());
438    // No need to save live registers; it's taken care of by the
439    // entrypoint. Also, there is no need to update the stack mask,
440    // as this runtime call will not trigger a garbage collection.
441    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
442    DCHECK_NE(reg, SP);
443    DCHECK_NE(reg, LR);
444    DCHECK_NE(reg, PC);
445    // IP is used internally by the ReadBarrierMarkRegX entry point
446    // as a temporary, it cannot be the entry point's input/output.
447    DCHECK_NE(reg, IP);
448    DCHECK(0 <= reg && reg < kNumberOfCoreRegisters) << reg;
449    // "Compact" slow path, saving two moves.
450    //
451    // Instead of using the standard runtime calling convention (input
452    // and output in R0):
453    //
454    //   R0 <- obj
455    //   R0 <- ReadBarrierMark(R0)
456    //   obj <- R0
457    //
458    // we just use rX (the register holding `obj`) as input and output
459    // of a dedicated entrypoint:
460    //
461    //   rX <- ReadBarrierMarkRegX(rX)
462    //
463    int32_t entry_point_offset =
464        CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(reg);
465    // This runtime call does not require a stack map.
466    arm_codegen->InvokeRuntimeWithoutRecordingPcInfo(entry_point_offset, instruction_, this);
467    __ b(GetExitLabel());
468  }
469
470 private:
471  const Location obj_;
472
473  DISALLOW_COPY_AND_ASSIGN(ReadBarrierMarkSlowPathARM);
474};
475
476// Slow path generating a read barrier for a heap reference.
477class ReadBarrierForHeapReferenceSlowPathARM : public SlowPathCode {
478 public:
479  ReadBarrierForHeapReferenceSlowPathARM(HInstruction* instruction,
480                                         Location out,
481                                         Location ref,
482                                         Location obj,
483                                         uint32_t offset,
484                                         Location index)
485      : SlowPathCode(instruction),
486        out_(out),
487        ref_(ref),
488        obj_(obj),
489        offset_(offset),
490        index_(index) {
491    DCHECK(kEmitCompilerReadBarrier);
492    // If `obj` is equal to `out` or `ref`, it means the initial object
493    // has been overwritten by (or after) the heap object reference load
494    // to be instrumented, e.g.:
495    //
496    //   __ LoadFromOffset(kLoadWord, out, out, offset);
497    //   codegen_->GenerateReadBarrierSlow(instruction, out_loc, out_loc, out_loc, offset);
498    //
499    // In that case, we have lost the information about the original
500    // object, and the emitted read barrier cannot work properly.
501    DCHECK(!obj.Equals(out)) << "obj=" << obj << " out=" << out;
502    DCHECK(!obj.Equals(ref)) << "obj=" << obj << " ref=" << ref;
503  }
504
505  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
506    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
507    LocationSummary* locations = instruction_->GetLocations();
508    Register reg_out = out_.AsRegister<Register>();
509    DCHECK(locations->CanCall());
510    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out));
511    DCHECK(instruction_->IsInstanceFieldGet() ||
512           instruction_->IsStaticFieldGet() ||
513           instruction_->IsArrayGet() ||
514           instruction_->IsInstanceOf() ||
515           instruction_->IsCheckCast() ||
516           (instruction_->IsInvokeVirtual()) && instruction_->GetLocations()->Intrinsified())
517        << "Unexpected instruction in read barrier for heap reference slow path: "
518        << instruction_->DebugName();
519
520    __ Bind(GetEntryLabel());
521    SaveLiveRegisters(codegen, locations);
522
523    // We may have to change the index's value, but as `index_` is a
524    // constant member (like other "inputs" of this slow path),
525    // introduce a copy of it, `index`.
526    Location index = index_;
527    if (index_.IsValid()) {
528      // Handle `index_` for HArrayGet and UnsafeGetObject/UnsafeGetObjectVolatile intrinsics.
529      if (instruction_->IsArrayGet()) {
530        // Compute the actual memory offset and store it in `index`.
531        Register index_reg = index_.AsRegister<Register>();
532        DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg));
533        if (codegen->IsCoreCalleeSaveRegister(index_reg)) {
534          // We are about to change the value of `index_reg` (see the
535          // calls to art::arm::Thumb2Assembler::Lsl and
536          // art::arm::Thumb2Assembler::AddConstant below), but it has
537          // not been saved by the previous call to
538          // art::SlowPathCode::SaveLiveRegisters, as it is a
539          // callee-save register --
540          // art::SlowPathCode::SaveLiveRegisters does not consider
541          // callee-save registers, as it has been designed with the
542          // assumption that callee-save registers are supposed to be
543          // handled by the called function.  So, as a callee-save
544          // register, `index_reg` _would_ eventually be saved onto
545          // the stack, but it would be too late: we would have
546          // changed its value earlier.  Therefore, we manually save
547          // it here into another freely available register,
548          // `free_reg`, chosen of course among the caller-save
549          // registers (as a callee-save `free_reg` register would
550          // exhibit the same problem).
551          //
552          // Note we could have requested a temporary register from
553          // the register allocator instead; but we prefer not to, as
554          // this is a slow path, and we know we can find a
555          // caller-save register that is available.
556          Register free_reg = FindAvailableCallerSaveRegister(codegen);
557          __ Mov(free_reg, index_reg);
558          index_reg = free_reg;
559          index = Location::RegisterLocation(index_reg);
560        } else {
561          // The initial register stored in `index_` has already been
562          // saved in the call to art::SlowPathCode::SaveLiveRegisters
563          // (as it is not a callee-save register), so we can freely
564          // use it.
565        }
566        // Shifting the index value contained in `index_reg` by the scale
567        // factor (2) cannot overflow in practice, as the runtime is
568        // unable to allocate object arrays with a size larger than
569        // 2^26 - 1 (that is, 2^28 - 4 bytes).
570        __ Lsl(index_reg, index_reg, TIMES_4);
571        static_assert(
572            sizeof(mirror::HeapReference<mirror::Object>) == sizeof(int32_t),
573            "art::mirror::HeapReference<art::mirror::Object> and int32_t have different sizes.");
574        __ AddConstant(index_reg, index_reg, offset_);
575      } else {
576        // In the case of the UnsafeGetObject/UnsafeGetObjectVolatile
577        // intrinsics, `index_` is not shifted by a scale factor of 2
578        // (as in the case of ArrayGet), as it is actually an offset
579        // to an object field within an object.
580        DCHECK(instruction_->IsInvoke()) << instruction_->DebugName();
581        DCHECK(instruction_->GetLocations()->Intrinsified());
582        DCHECK((instruction_->AsInvoke()->GetIntrinsic() == Intrinsics::kUnsafeGetObject) ||
583               (instruction_->AsInvoke()->GetIntrinsic() == Intrinsics::kUnsafeGetObjectVolatile))
584            << instruction_->AsInvoke()->GetIntrinsic();
585        DCHECK_EQ(offset_, 0U);
586        DCHECK(index_.IsRegisterPair());
587        // UnsafeGet's offset location is a register pair, the low
588        // part contains the correct offset.
589        index = index_.ToLow();
590      }
591    }
592
593    // We're moving two or three locations to locations that could
594    // overlap, so we need a parallel move resolver.
595    InvokeRuntimeCallingConvention calling_convention;
596    HParallelMove parallel_move(codegen->GetGraph()->GetArena());
597    parallel_move.AddMove(ref_,
598                          Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
599                          Primitive::kPrimNot,
600                          nullptr);
601    parallel_move.AddMove(obj_,
602                          Location::RegisterLocation(calling_convention.GetRegisterAt(1)),
603                          Primitive::kPrimNot,
604                          nullptr);
605    if (index.IsValid()) {
606      parallel_move.AddMove(index,
607                            Location::RegisterLocation(calling_convention.GetRegisterAt(2)),
608                            Primitive::kPrimInt,
609                            nullptr);
610      codegen->GetMoveResolver()->EmitNativeCode(&parallel_move);
611    } else {
612      codegen->GetMoveResolver()->EmitNativeCode(&parallel_move);
613      __ LoadImmediate(calling_convention.GetRegisterAt(2), offset_);
614    }
615    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pReadBarrierSlow),
616                               instruction_,
617                               instruction_->GetDexPc(),
618                               this);
619    CheckEntrypointTypes<
620        kQuickReadBarrierSlow, mirror::Object*, mirror::Object*, mirror::Object*, uint32_t>();
621    arm_codegen->Move32(out_, Location::RegisterLocation(R0));
622
623    RestoreLiveRegisters(codegen, locations);
624    __ b(GetExitLabel());
625  }
626
627  const char* GetDescription() const OVERRIDE { return "ReadBarrierForHeapReferenceSlowPathARM"; }
628
629 private:
630  Register FindAvailableCallerSaveRegister(CodeGenerator* codegen) {
631    size_t ref = static_cast<int>(ref_.AsRegister<Register>());
632    size_t obj = static_cast<int>(obj_.AsRegister<Register>());
633    for (size_t i = 0, e = codegen->GetNumberOfCoreRegisters(); i < e; ++i) {
634      if (i != ref && i != obj && !codegen->IsCoreCalleeSaveRegister(i)) {
635        return static_cast<Register>(i);
636      }
637    }
638    // We shall never fail to find a free caller-save register, as
639    // there are more than two core caller-save registers on ARM
640    // (meaning it is possible to find one which is different from
641    // `ref` and `obj`).
642    DCHECK_GT(codegen->GetNumberOfCoreCallerSaveRegisters(), 2u);
643    LOG(FATAL) << "Could not find a free caller-save register";
644    UNREACHABLE();
645  }
646
647  const Location out_;
648  const Location ref_;
649  const Location obj_;
650  const uint32_t offset_;
651  // An additional location containing an index to an array.
652  // Only used for HArrayGet and the UnsafeGetObject &
653  // UnsafeGetObjectVolatile intrinsics.
654  const Location index_;
655
656  DISALLOW_COPY_AND_ASSIGN(ReadBarrierForHeapReferenceSlowPathARM);
657};
658
659// Slow path generating a read barrier for a GC root.
660class ReadBarrierForRootSlowPathARM : public SlowPathCode {
661 public:
662  ReadBarrierForRootSlowPathARM(HInstruction* instruction, Location out, Location root)
663      : SlowPathCode(instruction), out_(out), root_(root) {
664    DCHECK(kEmitCompilerReadBarrier);
665  }
666
667  void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
668    LocationSummary* locations = instruction_->GetLocations();
669    Register reg_out = out_.AsRegister<Register>();
670    DCHECK(locations->CanCall());
671    DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out));
672    DCHECK(instruction_->IsLoadClass() || instruction_->IsLoadString())
673        << "Unexpected instruction in read barrier for GC root slow path: "
674        << instruction_->DebugName();
675
676    __ Bind(GetEntryLabel());
677    SaveLiveRegisters(codegen, locations);
678
679    InvokeRuntimeCallingConvention calling_convention;
680    CodeGeneratorARM* arm_codegen = down_cast<CodeGeneratorARM*>(codegen);
681    arm_codegen->Move32(Location::RegisterLocation(calling_convention.GetRegisterAt(0)), root_);
682    arm_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pReadBarrierForRootSlow),
683                               instruction_,
684                               instruction_->GetDexPc(),
685                               this);
686    CheckEntrypointTypes<kQuickReadBarrierForRootSlow, mirror::Object*, GcRoot<mirror::Object>*>();
687    arm_codegen->Move32(out_, Location::RegisterLocation(R0));
688
689    RestoreLiveRegisters(codegen, locations);
690    __ b(GetExitLabel());
691  }
692
693  const char* GetDescription() const OVERRIDE { return "ReadBarrierForRootSlowPathARM"; }
694
695 private:
696  const Location out_;
697  const Location root_;
698
699  DISALLOW_COPY_AND_ASSIGN(ReadBarrierForRootSlowPathARM);
700};
701
702#undef __
703// NOLINT on __ macro to suppress wrong warning/fix (misc-macro-parentheses) from clang-tidy.
704#define __ down_cast<ArmAssembler*>(GetAssembler())->  // NOLINT
705
706inline Condition ARMCondition(IfCondition cond) {
707  switch (cond) {
708    case kCondEQ: return EQ;
709    case kCondNE: return NE;
710    case kCondLT: return LT;
711    case kCondLE: return LE;
712    case kCondGT: return GT;
713    case kCondGE: return GE;
714    case kCondB:  return LO;
715    case kCondBE: return LS;
716    case kCondA:  return HI;
717    case kCondAE: return HS;
718  }
719  LOG(FATAL) << "Unreachable";
720  UNREACHABLE();
721}
722
723// Maps signed condition to unsigned condition.
724inline Condition ARMUnsignedCondition(IfCondition cond) {
725  switch (cond) {
726    case kCondEQ: return EQ;
727    case kCondNE: return NE;
728    // Signed to unsigned.
729    case kCondLT: return LO;
730    case kCondLE: return LS;
731    case kCondGT: return HI;
732    case kCondGE: return HS;
733    // Unsigned remain unchanged.
734    case kCondB:  return LO;
735    case kCondBE: return LS;
736    case kCondA:  return HI;
737    case kCondAE: return HS;
738  }
739  LOG(FATAL) << "Unreachable";
740  UNREACHABLE();
741}
742
743inline Condition ARMFPCondition(IfCondition cond, bool gt_bias) {
744  // The ARM condition codes can express all the necessary branches, see the
745  // "Meaning (floating-point)" column in the table A8-1 of the ARMv7 reference manual.
746  // There is no dex instruction or HIR that would need the missing conditions
747  // "equal or unordered" or "not equal".
748  switch (cond) {
749    case kCondEQ: return EQ;
750    case kCondNE: return NE /* unordered */;
751    case kCondLT: return gt_bias ? CC : LT /* unordered */;
752    case kCondLE: return gt_bias ? LS : LE /* unordered */;
753    case kCondGT: return gt_bias ? HI /* unordered */ : GT;
754    case kCondGE: return gt_bias ? CS /* unordered */ : GE;
755    default:
756      LOG(FATAL) << "UNREACHABLE";
757      UNREACHABLE();
758  }
759}
760
761void CodeGeneratorARM::DumpCoreRegister(std::ostream& stream, int reg) const {
762  stream << Register(reg);
763}
764
765void CodeGeneratorARM::DumpFloatingPointRegister(std::ostream& stream, int reg) const {
766  stream << SRegister(reg);
767}
768
769size_t CodeGeneratorARM::SaveCoreRegister(size_t stack_index, uint32_t reg_id) {
770  __ StoreToOffset(kStoreWord, static_cast<Register>(reg_id), SP, stack_index);
771  return kArmWordSize;
772}
773
774size_t CodeGeneratorARM::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) {
775  __ LoadFromOffset(kLoadWord, static_cast<Register>(reg_id), SP, stack_index);
776  return kArmWordSize;
777}
778
779size_t CodeGeneratorARM::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) {
780  __ StoreSToOffset(static_cast<SRegister>(reg_id), SP, stack_index);
781  return kArmWordSize;
782}
783
784size_t CodeGeneratorARM::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) {
785  __ LoadSFromOffset(static_cast<SRegister>(reg_id), SP, stack_index);
786  return kArmWordSize;
787}
788
789CodeGeneratorARM::CodeGeneratorARM(HGraph* graph,
790                                   const ArmInstructionSetFeatures& isa_features,
791                                   const CompilerOptions& compiler_options,
792                                   OptimizingCompilerStats* stats)
793    : CodeGenerator(graph,
794                    kNumberOfCoreRegisters,
795                    kNumberOfSRegisters,
796                    kNumberOfRegisterPairs,
797                    ComputeRegisterMask(reinterpret_cast<const int*>(kCoreCalleeSaves),
798                                        arraysize(kCoreCalleeSaves)),
799                    ComputeRegisterMask(reinterpret_cast<const int*>(kFpuCalleeSaves),
800                                        arraysize(kFpuCalleeSaves)),
801                    compiler_options,
802                    stats),
803      block_labels_(nullptr),
804      location_builder_(graph, this),
805      instruction_visitor_(graph, this),
806      move_resolver_(graph->GetArena(), this),
807      assembler_(graph->GetArena()),
808      isa_features_(isa_features),
809      uint32_literals_(std::less<uint32_t>(),
810                       graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
811      method_patches_(MethodReferenceComparator(),
812                      graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
813      call_patches_(MethodReferenceComparator(),
814                    graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
815      relative_call_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
816      pc_relative_dex_cache_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
817      boot_image_string_patches_(StringReferenceValueComparator(),
818                                 graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
819      pc_relative_string_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
820      boot_image_type_patches_(TypeReferenceValueComparator(),
821                               graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
822      pc_relative_type_patches_(graph->GetArena()->Adapter(kArenaAllocCodeGenerator)),
823      boot_image_address_patches_(std::less<uint32_t>(),
824                                  graph->GetArena()->Adapter(kArenaAllocCodeGenerator)) {
825  // Always save the LR register to mimic Quick.
826  AddAllocatedRegister(Location::RegisterLocation(LR));
827}
828
829void CodeGeneratorARM::Finalize(CodeAllocator* allocator) {
830  // Ensure that we fix up branches and literal loads and emit the literal pool.
831  __ FinalizeCode();
832
833  // Adjust native pc offsets in stack maps.
834  for (size_t i = 0, num = stack_map_stream_.GetNumberOfStackMaps(); i != num; ++i) {
835    uint32_t old_position = stack_map_stream_.GetStackMap(i).native_pc_offset;
836    uint32_t new_position = __ GetAdjustedPosition(old_position);
837    stack_map_stream_.SetStackMapNativePcOffset(i, new_position);
838  }
839  // Adjust pc offsets for the disassembly information.
840  if (disasm_info_ != nullptr) {
841    GeneratedCodeInterval* frame_entry_interval = disasm_info_->GetFrameEntryInterval();
842    frame_entry_interval->start = __ GetAdjustedPosition(frame_entry_interval->start);
843    frame_entry_interval->end = __ GetAdjustedPosition(frame_entry_interval->end);
844    for (auto& it : *disasm_info_->GetInstructionIntervals()) {
845      it.second.start = __ GetAdjustedPosition(it.second.start);
846      it.second.end = __ GetAdjustedPosition(it.second.end);
847    }
848    for (auto& it : *disasm_info_->GetSlowPathIntervals()) {
849      it.code_interval.start = __ GetAdjustedPosition(it.code_interval.start);
850      it.code_interval.end = __ GetAdjustedPosition(it.code_interval.end);
851    }
852  }
853
854  CodeGenerator::Finalize(allocator);
855}
856
857void CodeGeneratorARM::SetupBlockedRegisters() const {
858  // Don't allocate the dalvik style register pair passing.
859  blocked_register_pairs_[R1_R2] = true;
860
861  // Stack register, LR and PC are always reserved.
862  blocked_core_registers_[SP] = true;
863  blocked_core_registers_[LR] = true;
864  blocked_core_registers_[PC] = true;
865
866  // Reserve thread register.
867  blocked_core_registers_[TR] = true;
868
869  // Reserve temp register.
870  blocked_core_registers_[IP] = true;
871
872  if (GetGraph()->IsDebuggable()) {
873    // Stubs do not save callee-save floating point registers. If the graph
874    // is debuggable, we need to deal with these registers differently. For
875    // now, just block them.
876    for (size_t i = 0; i < arraysize(kFpuCalleeSaves); ++i) {
877      blocked_fpu_registers_[kFpuCalleeSaves[i]] = true;
878    }
879  }
880
881  UpdateBlockedPairRegisters();
882}
883
884void CodeGeneratorARM::UpdateBlockedPairRegisters() const {
885  for (int i = 0; i < kNumberOfRegisterPairs; i++) {
886    ArmManagedRegister current =
887        ArmManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i));
888    if (blocked_core_registers_[current.AsRegisterPairLow()]
889        || blocked_core_registers_[current.AsRegisterPairHigh()]) {
890      blocked_register_pairs_[i] = true;
891    }
892  }
893}
894
895InstructionCodeGeneratorARM::InstructionCodeGeneratorARM(HGraph* graph, CodeGeneratorARM* codegen)
896      : InstructionCodeGenerator(graph, codegen),
897        assembler_(codegen->GetAssembler()),
898        codegen_(codegen) {}
899
900void CodeGeneratorARM::ComputeSpillMask() {
901  core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_;
902  DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved";
903  // There is no easy instruction to restore just the PC on thumb2. We spill and
904  // restore another arbitrary register.
905  core_spill_mask_ |= (1 << kCoreAlwaysSpillRegister);
906  fpu_spill_mask_ = allocated_registers_.GetFloatingPointRegisters() & fpu_callee_save_mask_;
907  // We use vpush and vpop for saving and restoring floating point registers, which take
908  // a SRegister and the number of registers to save/restore after that SRegister. We
909  // therefore update the `fpu_spill_mask_` to also contain those registers not allocated,
910  // but in the range.
911  if (fpu_spill_mask_ != 0) {
912    uint32_t least_significant_bit = LeastSignificantBit(fpu_spill_mask_);
913    uint32_t most_significant_bit = MostSignificantBit(fpu_spill_mask_);
914    for (uint32_t i = least_significant_bit + 1 ; i < most_significant_bit; ++i) {
915      fpu_spill_mask_ |= (1 << i);
916    }
917  }
918}
919
920static dwarf::Reg DWARFReg(Register reg) {
921  return dwarf::Reg::ArmCore(static_cast<int>(reg));
922}
923
924static dwarf::Reg DWARFReg(SRegister reg) {
925  return dwarf::Reg::ArmFp(static_cast<int>(reg));
926}
927
928void CodeGeneratorARM::GenerateFrameEntry() {
929  bool skip_overflow_check =
930      IsLeafMethod() && !FrameNeedsStackCheck(GetFrameSize(), InstructionSet::kArm);
931  DCHECK(GetCompilerOptions().GetImplicitStackOverflowChecks());
932  __ Bind(&frame_entry_label_);
933
934  if (HasEmptyFrame()) {
935    return;
936  }
937
938  if (!skip_overflow_check) {
939    __ AddConstant(IP, SP, -static_cast<int32_t>(GetStackOverflowReservedBytes(kArm)));
940    __ LoadFromOffset(kLoadWord, IP, IP, 0);
941    RecordPcInfo(nullptr, 0);
942  }
943
944  __ PushList(core_spill_mask_);
945  __ cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(core_spill_mask_));
946  __ cfi().RelOffsetForMany(DWARFReg(kMethodRegisterArgument), 0, core_spill_mask_, kArmWordSize);
947  if (fpu_spill_mask_ != 0) {
948    SRegister start_register = SRegister(LeastSignificantBit(fpu_spill_mask_));
949    __ vpushs(start_register, POPCOUNT(fpu_spill_mask_));
950    __ cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(fpu_spill_mask_));
951    __ cfi().RelOffsetForMany(DWARFReg(S0), 0, fpu_spill_mask_, kArmWordSize);
952  }
953  int adjust = GetFrameSize() - FrameEntrySpillSize();
954  __ AddConstant(SP, -adjust);
955  __ cfi().AdjustCFAOffset(adjust);
956  __ StoreToOffset(kStoreWord, kMethodRegisterArgument, SP, 0);
957}
958
959void CodeGeneratorARM::GenerateFrameExit() {
960  if (HasEmptyFrame()) {
961    __ bx(LR);
962    return;
963  }
964  __ cfi().RememberState();
965  int adjust = GetFrameSize() - FrameEntrySpillSize();
966  __ AddConstant(SP, adjust);
967  __ cfi().AdjustCFAOffset(-adjust);
968  if (fpu_spill_mask_ != 0) {
969    SRegister start_register = SRegister(LeastSignificantBit(fpu_spill_mask_));
970    __ vpops(start_register, POPCOUNT(fpu_spill_mask_));
971    __ cfi().AdjustCFAOffset(-static_cast<int>(kArmPointerSize) * POPCOUNT(fpu_spill_mask_));
972    __ cfi().RestoreMany(DWARFReg(SRegister(0)), fpu_spill_mask_);
973  }
974  // Pop LR into PC to return.
975  DCHECK_NE(core_spill_mask_ & (1 << LR), 0U);
976  uint32_t pop_mask = (core_spill_mask_ & (~(1 << LR))) | 1 << PC;
977  __ PopList(pop_mask);
978  __ cfi().RestoreState();
979  __ cfi().DefCFAOffset(GetFrameSize());
980}
981
982void CodeGeneratorARM::Bind(HBasicBlock* block) {
983  Label* label = GetLabelOf(block);
984  __ BindTrackedLabel(label);
985}
986
987Location InvokeDexCallingConventionVisitorARM::GetNextLocation(Primitive::Type type) {
988  switch (type) {
989    case Primitive::kPrimBoolean:
990    case Primitive::kPrimByte:
991    case Primitive::kPrimChar:
992    case Primitive::kPrimShort:
993    case Primitive::kPrimInt:
994    case Primitive::kPrimNot: {
995      uint32_t index = gp_index_++;
996      uint32_t stack_index = stack_index_++;
997      if (index < calling_convention.GetNumberOfRegisters()) {
998        return Location::RegisterLocation(calling_convention.GetRegisterAt(index));
999      } else {
1000        return Location::StackSlot(calling_convention.GetStackOffsetOf(stack_index));
1001      }
1002    }
1003
1004    case Primitive::kPrimLong: {
1005      uint32_t index = gp_index_;
1006      uint32_t stack_index = stack_index_;
1007      gp_index_ += 2;
1008      stack_index_ += 2;
1009      if (index + 1 < calling_convention.GetNumberOfRegisters()) {
1010        if (calling_convention.GetRegisterAt(index) == R1) {
1011          // Skip R1, and use R2_R3 instead.
1012          gp_index_++;
1013          index++;
1014        }
1015      }
1016      if (index + 1 < calling_convention.GetNumberOfRegisters()) {
1017        DCHECK_EQ(calling_convention.GetRegisterAt(index) + 1,
1018                  calling_convention.GetRegisterAt(index + 1));
1019
1020        return Location::RegisterPairLocation(calling_convention.GetRegisterAt(index),
1021                                              calling_convention.GetRegisterAt(index + 1));
1022      } else {
1023        return Location::DoubleStackSlot(calling_convention.GetStackOffsetOf(stack_index));
1024      }
1025    }
1026
1027    case Primitive::kPrimFloat: {
1028      uint32_t stack_index = stack_index_++;
1029      if (float_index_ % 2 == 0) {
1030        float_index_ = std::max(double_index_, float_index_);
1031      }
1032      if (float_index_ < calling_convention.GetNumberOfFpuRegisters()) {
1033        return Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(float_index_++));
1034      } else {
1035        return Location::StackSlot(calling_convention.GetStackOffsetOf(stack_index));
1036      }
1037    }
1038
1039    case Primitive::kPrimDouble: {
1040      double_index_ = std::max(double_index_, RoundUp(float_index_, 2));
1041      uint32_t stack_index = stack_index_;
1042      stack_index_ += 2;
1043      if (double_index_ + 1 < calling_convention.GetNumberOfFpuRegisters()) {
1044        uint32_t index = double_index_;
1045        double_index_ += 2;
1046        Location result = Location::FpuRegisterPairLocation(
1047          calling_convention.GetFpuRegisterAt(index),
1048          calling_convention.GetFpuRegisterAt(index + 1));
1049        DCHECK(ExpectedPairLayout(result));
1050        return result;
1051      } else {
1052        return Location::DoubleStackSlot(calling_convention.GetStackOffsetOf(stack_index));
1053      }
1054    }
1055
1056    case Primitive::kPrimVoid:
1057      LOG(FATAL) << "Unexpected parameter type " << type;
1058      break;
1059  }
1060  return Location::NoLocation();
1061}
1062
1063Location InvokeDexCallingConventionVisitorARM::GetReturnLocation(Primitive::Type type) const {
1064  switch (type) {
1065    case Primitive::kPrimBoolean:
1066    case Primitive::kPrimByte:
1067    case Primitive::kPrimChar:
1068    case Primitive::kPrimShort:
1069    case Primitive::kPrimInt:
1070    case Primitive::kPrimNot: {
1071      return Location::RegisterLocation(R0);
1072    }
1073
1074    case Primitive::kPrimFloat: {
1075      return Location::FpuRegisterLocation(S0);
1076    }
1077
1078    case Primitive::kPrimLong: {
1079      return Location::RegisterPairLocation(R0, R1);
1080    }
1081
1082    case Primitive::kPrimDouble: {
1083      return Location::FpuRegisterPairLocation(S0, S1);
1084    }
1085
1086    case Primitive::kPrimVoid:
1087      return Location::NoLocation();
1088  }
1089
1090  UNREACHABLE();
1091}
1092
1093Location InvokeDexCallingConventionVisitorARM::GetMethodLocation() const {
1094  return Location::RegisterLocation(kMethodRegisterArgument);
1095}
1096
1097void CodeGeneratorARM::Move32(Location destination, Location source) {
1098  if (source.Equals(destination)) {
1099    return;
1100  }
1101  if (destination.IsRegister()) {
1102    if (source.IsRegister()) {
1103      __ Mov(destination.AsRegister<Register>(), source.AsRegister<Register>());
1104    } else if (source.IsFpuRegister()) {
1105      __ vmovrs(destination.AsRegister<Register>(), source.AsFpuRegister<SRegister>());
1106    } else {
1107      __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex());
1108    }
1109  } else if (destination.IsFpuRegister()) {
1110    if (source.IsRegister()) {
1111      __ vmovsr(destination.AsFpuRegister<SRegister>(), source.AsRegister<Register>());
1112    } else if (source.IsFpuRegister()) {
1113      __ vmovs(destination.AsFpuRegister<SRegister>(), source.AsFpuRegister<SRegister>());
1114    } else {
1115      __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex());
1116    }
1117  } else {
1118    DCHECK(destination.IsStackSlot()) << destination;
1119    if (source.IsRegister()) {
1120      __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), SP, destination.GetStackIndex());
1121    } else if (source.IsFpuRegister()) {
1122      __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex());
1123    } else {
1124      DCHECK(source.IsStackSlot()) << source;
1125      __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex());
1126      __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
1127    }
1128  }
1129}
1130
1131void CodeGeneratorARM::Move64(Location destination, Location source) {
1132  if (source.Equals(destination)) {
1133    return;
1134  }
1135  if (destination.IsRegisterPair()) {
1136    if (source.IsRegisterPair()) {
1137      EmitParallelMoves(
1138          Location::RegisterLocation(source.AsRegisterPairHigh<Register>()),
1139          Location::RegisterLocation(destination.AsRegisterPairHigh<Register>()),
1140          Primitive::kPrimInt,
1141          Location::RegisterLocation(source.AsRegisterPairLow<Register>()),
1142          Location::RegisterLocation(destination.AsRegisterPairLow<Register>()),
1143          Primitive::kPrimInt);
1144    } else if (source.IsFpuRegister()) {
1145      UNIMPLEMENTED(FATAL);
1146    } else if (source.IsFpuRegisterPair()) {
1147      __ vmovrrd(destination.AsRegisterPairLow<Register>(),
1148                 destination.AsRegisterPairHigh<Register>(),
1149                 FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()));
1150    } else {
1151      DCHECK(source.IsDoubleStackSlot());
1152      DCHECK(ExpectedPairLayout(destination));
1153      __ LoadFromOffset(kLoadWordPair, destination.AsRegisterPairLow<Register>(),
1154                        SP, source.GetStackIndex());
1155    }
1156  } else if (destination.IsFpuRegisterPair()) {
1157    if (source.IsDoubleStackSlot()) {
1158      __ LoadDFromOffset(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
1159                         SP,
1160                         source.GetStackIndex());
1161    } else if (source.IsRegisterPair()) {
1162      __ vmovdrr(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
1163                 source.AsRegisterPairLow<Register>(),
1164                 source.AsRegisterPairHigh<Register>());
1165    } else {
1166      UNIMPLEMENTED(FATAL);
1167    }
1168  } else {
1169    DCHECK(destination.IsDoubleStackSlot());
1170    if (source.IsRegisterPair()) {
1171      // No conflict possible, so just do the moves.
1172      if (source.AsRegisterPairLow<Register>() == R1) {
1173        DCHECK_EQ(source.AsRegisterPairHigh<Register>(), R2);
1174        __ StoreToOffset(kStoreWord, R1, SP, destination.GetStackIndex());
1175        __ StoreToOffset(kStoreWord, R2, SP, destination.GetHighStackIndex(kArmWordSize));
1176      } else {
1177        __ StoreToOffset(kStoreWordPair, source.AsRegisterPairLow<Register>(),
1178                         SP, destination.GetStackIndex());
1179      }
1180    } else if (source.IsFpuRegisterPair()) {
1181      __ StoreDToOffset(FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()),
1182                        SP,
1183                        destination.GetStackIndex());
1184    } else {
1185      DCHECK(source.IsDoubleStackSlot());
1186      EmitParallelMoves(
1187          Location::StackSlot(source.GetStackIndex()),
1188          Location::StackSlot(destination.GetStackIndex()),
1189          Primitive::kPrimInt,
1190          Location::StackSlot(source.GetHighStackIndex(kArmWordSize)),
1191          Location::StackSlot(destination.GetHighStackIndex(kArmWordSize)),
1192          Primitive::kPrimInt);
1193    }
1194  }
1195}
1196
1197void CodeGeneratorARM::MoveConstant(Location location, int32_t value) {
1198  DCHECK(location.IsRegister());
1199  __ LoadImmediate(location.AsRegister<Register>(), value);
1200}
1201
1202void CodeGeneratorARM::MoveLocation(Location dst, Location src, Primitive::Type dst_type) {
1203  HParallelMove move(GetGraph()->GetArena());
1204  move.AddMove(src, dst, dst_type, nullptr);
1205  GetMoveResolver()->EmitNativeCode(&move);
1206}
1207
1208void CodeGeneratorARM::AddLocationAsTemp(Location location, LocationSummary* locations) {
1209  if (location.IsRegister()) {
1210    locations->AddTemp(location);
1211  } else if (location.IsRegisterPair()) {
1212    locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairLow<Register>()));
1213    locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairHigh<Register>()));
1214  } else {
1215    UNIMPLEMENTED(FATAL) << "AddLocationAsTemp not implemented for location " << location;
1216  }
1217}
1218
1219void CodeGeneratorARM::InvokeRuntime(QuickEntrypointEnum entrypoint,
1220                                     HInstruction* instruction,
1221                                     uint32_t dex_pc,
1222                                     SlowPathCode* slow_path) {
1223  InvokeRuntime(GetThreadOffset<kArmPointerSize>(entrypoint).Int32Value(),
1224                instruction,
1225                dex_pc,
1226                slow_path);
1227}
1228
1229void CodeGeneratorARM::InvokeRuntime(int32_t entry_point_offset,
1230                                     HInstruction* instruction,
1231                                     uint32_t dex_pc,
1232                                     SlowPathCode* slow_path) {
1233  ValidateInvokeRuntime(instruction, slow_path);
1234  __ LoadFromOffset(kLoadWord, LR, TR, entry_point_offset);
1235  __ blx(LR);
1236  RecordPcInfo(instruction, dex_pc, slow_path);
1237}
1238
1239void CodeGeneratorARM::InvokeRuntimeWithoutRecordingPcInfo(int32_t entry_point_offset,
1240                                                           HInstruction* instruction,
1241                                                           SlowPathCode* slow_path) {
1242  ValidateInvokeRuntimeWithoutRecordingPcInfo(instruction, slow_path);
1243  __ LoadFromOffset(kLoadWord, LR, TR, entry_point_offset);
1244  __ blx(LR);
1245}
1246
1247void InstructionCodeGeneratorARM::HandleGoto(HInstruction* got, HBasicBlock* successor) {
1248  DCHECK(!successor->IsExitBlock());
1249
1250  HBasicBlock* block = got->GetBlock();
1251  HInstruction* previous = got->GetPrevious();
1252
1253  HLoopInformation* info = block->GetLoopInformation();
1254  if (info != nullptr && info->IsBackEdge(*block) && info->HasSuspendCheck()) {
1255    codegen_->ClearSpillSlotsFromLoopPhisInStackMap(info->GetSuspendCheck());
1256    GenerateSuspendCheck(info->GetSuspendCheck(), successor);
1257    return;
1258  }
1259
1260  if (block->IsEntryBlock() && (previous != nullptr) && previous->IsSuspendCheck()) {
1261    GenerateSuspendCheck(previous->AsSuspendCheck(), nullptr);
1262  }
1263  if (!codegen_->GoesToNextBlock(got->GetBlock(), successor)) {
1264    __ b(codegen_->GetLabelOf(successor));
1265  }
1266}
1267
1268void LocationsBuilderARM::VisitGoto(HGoto* got) {
1269  got->SetLocations(nullptr);
1270}
1271
1272void InstructionCodeGeneratorARM::VisitGoto(HGoto* got) {
1273  HandleGoto(got, got->GetSuccessor());
1274}
1275
1276void LocationsBuilderARM::VisitTryBoundary(HTryBoundary* try_boundary) {
1277  try_boundary->SetLocations(nullptr);
1278}
1279
1280void InstructionCodeGeneratorARM::VisitTryBoundary(HTryBoundary* try_boundary) {
1281  HBasicBlock* successor = try_boundary->GetNormalFlowSuccessor();
1282  if (!successor->IsExitBlock()) {
1283    HandleGoto(try_boundary, successor);
1284  }
1285}
1286
1287void LocationsBuilderARM::VisitExit(HExit* exit) {
1288  exit->SetLocations(nullptr);
1289}
1290
1291void InstructionCodeGeneratorARM::VisitExit(HExit* exit ATTRIBUTE_UNUSED) {
1292}
1293
1294void InstructionCodeGeneratorARM::GenerateVcmp(HInstruction* instruction) {
1295  Primitive::Type type = instruction->InputAt(0)->GetType();
1296  Location lhs_loc = instruction->GetLocations()->InAt(0);
1297  Location rhs_loc = instruction->GetLocations()->InAt(1);
1298  if (rhs_loc.IsConstant()) {
1299    // 0.0 is the only immediate that can be encoded directly in
1300    // a VCMP instruction.
1301    //
1302    // Both the JLS (section 15.20.1) and the JVMS (section 6.5)
1303    // specify that in a floating-point comparison, positive zero
1304    // and negative zero are considered equal, so we can use the
1305    // literal 0.0 for both cases here.
1306    //
1307    // Note however that some methods (Float.equal, Float.compare,
1308    // Float.compareTo, Double.equal, Double.compare,
1309    // Double.compareTo, Math.max, Math.min, StrictMath.max,
1310    // StrictMath.min) consider 0.0 to be (strictly) greater than
1311    // -0.0. So if we ever translate calls to these methods into a
1312    // HCompare instruction, we must handle the -0.0 case with
1313    // care here.
1314    DCHECK(rhs_loc.GetConstant()->IsArithmeticZero());
1315    if (type == Primitive::kPrimFloat) {
1316      __ vcmpsz(lhs_loc.AsFpuRegister<SRegister>());
1317    } else {
1318      DCHECK_EQ(type, Primitive::kPrimDouble);
1319      __ vcmpdz(FromLowSToD(lhs_loc.AsFpuRegisterPairLow<SRegister>()));
1320    }
1321  } else {
1322    if (type == Primitive::kPrimFloat) {
1323      __ vcmps(lhs_loc.AsFpuRegister<SRegister>(), rhs_loc.AsFpuRegister<SRegister>());
1324    } else {
1325      DCHECK_EQ(type, Primitive::kPrimDouble);
1326      __ vcmpd(FromLowSToD(lhs_loc.AsFpuRegisterPairLow<SRegister>()),
1327               FromLowSToD(rhs_loc.AsFpuRegisterPairLow<SRegister>()));
1328    }
1329  }
1330}
1331
1332void InstructionCodeGeneratorARM::GenerateFPJumps(HCondition* cond,
1333                                                  Label* true_label,
1334                                                  Label* false_label ATTRIBUTE_UNUSED) {
1335  __ vmstat();  // transfer FP status register to ARM APSR.
1336  __ b(true_label, ARMFPCondition(cond->GetCondition(), cond->IsGtBias()));
1337}
1338
1339void InstructionCodeGeneratorARM::GenerateLongComparesAndJumps(HCondition* cond,
1340                                                               Label* true_label,
1341                                                               Label* false_label) {
1342  LocationSummary* locations = cond->GetLocations();
1343  Location left = locations->InAt(0);
1344  Location right = locations->InAt(1);
1345  IfCondition if_cond = cond->GetCondition();
1346
1347  Register left_high = left.AsRegisterPairHigh<Register>();
1348  Register left_low = left.AsRegisterPairLow<Register>();
1349  IfCondition true_high_cond = if_cond;
1350  IfCondition false_high_cond = cond->GetOppositeCondition();
1351  Condition final_condition = ARMUnsignedCondition(if_cond);  // unsigned on lower part
1352
1353  // Set the conditions for the test, remembering that == needs to be
1354  // decided using the low words.
1355  // TODO: consider avoiding jumps with temporary and CMP low+SBC high
1356  switch (if_cond) {
1357    case kCondEQ:
1358    case kCondNE:
1359      // Nothing to do.
1360      break;
1361    case kCondLT:
1362      false_high_cond = kCondGT;
1363      break;
1364    case kCondLE:
1365      true_high_cond = kCondLT;
1366      break;
1367    case kCondGT:
1368      false_high_cond = kCondLT;
1369      break;
1370    case kCondGE:
1371      true_high_cond = kCondGT;
1372      break;
1373    case kCondB:
1374      false_high_cond = kCondA;
1375      break;
1376    case kCondBE:
1377      true_high_cond = kCondB;
1378      break;
1379    case kCondA:
1380      false_high_cond = kCondB;
1381      break;
1382    case kCondAE:
1383      true_high_cond = kCondA;
1384      break;
1385  }
1386  if (right.IsConstant()) {
1387    int64_t value = right.GetConstant()->AsLongConstant()->GetValue();
1388    int32_t val_low = Low32Bits(value);
1389    int32_t val_high = High32Bits(value);
1390
1391    __ CmpConstant(left_high, val_high);
1392    if (if_cond == kCondNE) {
1393      __ b(true_label, ARMCondition(true_high_cond));
1394    } else if (if_cond == kCondEQ) {
1395      __ b(false_label, ARMCondition(false_high_cond));
1396    } else {
1397      __ b(true_label, ARMCondition(true_high_cond));
1398      __ b(false_label, ARMCondition(false_high_cond));
1399    }
1400    // Must be equal high, so compare the lows.
1401    __ CmpConstant(left_low, val_low);
1402  } else {
1403    Register right_high = right.AsRegisterPairHigh<Register>();
1404    Register right_low = right.AsRegisterPairLow<Register>();
1405
1406    __ cmp(left_high, ShifterOperand(right_high));
1407    if (if_cond == kCondNE) {
1408      __ b(true_label, ARMCondition(true_high_cond));
1409    } else if (if_cond == kCondEQ) {
1410      __ b(false_label, ARMCondition(false_high_cond));
1411    } else {
1412      __ b(true_label, ARMCondition(true_high_cond));
1413      __ b(false_label, ARMCondition(false_high_cond));
1414    }
1415    // Must be equal high, so compare the lows.
1416    __ cmp(left_low, ShifterOperand(right_low));
1417  }
1418  // The last comparison might be unsigned.
1419  // TODO: optimize cases where this is always true/false
1420  __ b(true_label, final_condition);
1421}
1422
1423void InstructionCodeGeneratorARM::GenerateCompareTestAndBranch(HCondition* condition,
1424                                                               Label* true_target_in,
1425                                                               Label* false_target_in) {
1426  // Generated branching requires both targets to be explicit. If either of the
1427  // targets is nullptr (fallthrough) use and bind `fallthrough_target` instead.
1428  Label fallthrough_target;
1429  Label* true_target = true_target_in == nullptr ? &fallthrough_target : true_target_in;
1430  Label* false_target = false_target_in == nullptr ? &fallthrough_target : false_target_in;
1431
1432  Primitive::Type type = condition->InputAt(0)->GetType();
1433  switch (type) {
1434    case Primitive::kPrimLong:
1435      GenerateLongComparesAndJumps(condition, true_target, false_target);
1436      break;
1437    case Primitive::kPrimFloat:
1438    case Primitive::kPrimDouble:
1439      GenerateVcmp(condition);
1440      GenerateFPJumps(condition, true_target, false_target);
1441      break;
1442    default:
1443      LOG(FATAL) << "Unexpected compare type " << type;
1444  }
1445
1446  if (false_target != &fallthrough_target) {
1447    __ b(false_target);
1448  }
1449
1450  if (fallthrough_target.IsLinked()) {
1451    __ Bind(&fallthrough_target);
1452  }
1453}
1454
1455void InstructionCodeGeneratorARM::GenerateTestAndBranch(HInstruction* instruction,
1456                                                        size_t condition_input_index,
1457                                                        Label* true_target,
1458                                                        Label* false_target) {
1459  HInstruction* cond = instruction->InputAt(condition_input_index);
1460
1461  if (true_target == nullptr && false_target == nullptr) {
1462    // Nothing to do. The code always falls through.
1463    return;
1464  } else if (cond->IsIntConstant()) {
1465    // Constant condition, statically compared against "true" (integer value 1).
1466    if (cond->AsIntConstant()->IsTrue()) {
1467      if (true_target != nullptr) {
1468        __ b(true_target);
1469      }
1470    } else {
1471      DCHECK(cond->AsIntConstant()->IsFalse()) << cond->AsIntConstant()->GetValue();
1472      if (false_target != nullptr) {
1473        __ b(false_target);
1474      }
1475    }
1476    return;
1477  }
1478
1479  // The following code generates these patterns:
1480  //  (1) true_target == nullptr && false_target != nullptr
1481  //        - opposite condition true => branch to false_target
1482  //  (2) true_target != nullptr && false_target == nullptr
1483  //        - condition true => branch to true_target
1484  //  (3) true_target != nullptr && false_target != nullptr
1485  //        - condition true => branch to true_target
1486  //        - branch to false_target
1487  if (IsBooleanValueOrMaterializedCondition(cond)) {
1488    // Condition has been materialized, compare the output to 0.
1489    Location cond_val = instruction->GetLocations()->InAt(condition_input_index);
1490    DCHECK(cond_val.IsRegister());
1491    if (true_target == nullptr) {
1492      __ CompareAndBranchIfZero(cond_val.AsRegister<Register>(), false_target);
1493    } else {
1494      __ CompareAndBranchIfNonZero(cond_val.AsRegister<Register>(), true_target);
1495    }
1496  } else {
1497    // Condition has not been materialized. Use its inputs as the comparison and
1498    // its condition as the branch condition.
1499    HCondition* condition = cond->AsCondition();
1500
1501    // If this is a long or FP comparison that has been folded into
1502    // the HCondition, generate the comparison directly.
1503    Primitive::Type type = condition->InputAt(0)->GetType();
1504    if (type == Primitive::kPrimLong || Primitive::IsFloatingPointType(type)) {
1505      GenerateCompareTestAndBranch(condition, true_target, false_target);
1506      return;
1507    }
1508
1509    LocationSummary* locations = cond->GetLocations();
1510    DCHECK(locations->InAt(0).IsRegister());
1511    Register left = locations->InAt(0).AsRegister<Register>();
1512    Location right = locations->InAt(1);
1513    if (right.IsRegister()) {
1514      __ cmp(left, ShifterOperand(right.AsRegister<Register>()));
1515    } else {
1516      DCHECK(right.IsConstant());
1517      __ CmpConstant(left, CodeGenerator::GetInt32ValueOf(right.GetConstant()));
1518    }
1519    if (true_target == nullptr) {
1520      __ b(false_target, ARMCondition(condition->GetOppositeCondition()));
1521    } else {
1522      __ b(true_target, ARMCondition(condition->GetCondition()));
1523    }
1524  }
1525
1526  // If neither branch falls through (case 3), the conditional branch to `true_target`
1527  // was already emitted (case 2) and we need to emit a jump to `false_target`.
1528  if (true_target != nullptr && false_target != nullptr) {
1529    __ b(false_target);
1530  }
1531}
1532
1533void LocationsBuilderARM::VisitIf(HIf* if_instr) {
1534  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(if_instr);
1535  if (IsBooleanValueOrMaterializedCondition(if_instr->InputAt(0))) {
1536    locations->SetInAt(0, Location::RequiresRegister());
1537  }
1538}
1539
1540void InstructionCodeGeneratorARM::VisitIf(HIf* if_instr) {
1541  HBasicBlock* true_successor = if_instr->IfTrueSuccessor();
1542  HBasicBlock* false_successor = if_instr->IfFalseSuccessor();
1543  Label* true_target = codegen_->GoesToNextBlock(if_instr->GetBlock(), true_successor) ?
1544      nullptr : codegen_->GetLabelOf(true_successor);
1545  Label* false_target = codegen_->GoesToNextBlock(if_instr->GetBlock(), false_successor) ?
1546      nullptr : codegen_->GetLabelOf(false_successor);
1547  GenerateTestAndBranch(if_instr, /* condition_input_index */ 0, true_target, false_target);
1548}
1549
1550void LocationsBuilderARM::VisitDeoptimize(HDeoptimize* deoptimize) {
1551  LocationSummary* locations = new (GetGraph()->GetArena())
1552      LocationSummary(deoptimize, LocationSummary::kCallOnSlowPath);
1553  if (IsBooleanValueOrMaterializedCondition(deoptimize->InputAt(0))) {
1554    locations->SetInAt(0, Location::RequiresRegister());
1555  }
1556}
1557
1558void InstructionCodeGeneratorARM::VisitDeoptimize(HDeoptimize* deoptimize) {
1559  SlowPathCode* slow_path = deopt_slow_paths_.NewSlowPath<DeoptimizationSlowPathARM>(deoptimize);
1560  GenerateTestAndBranch(deoptimize,
1561                        /* condition_input_index */ 0,
1562                        slow_path->GetEntryLabel(),
1563                        /* false_target */ nullptr);
1564}
1565
1566void LocationsBuilderARM::VisitSelect(HSelect* select) {
1567  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(select);
1568  if (Primitive::IsFloatingPointType(select->GetType())) {
1569    locations->SetInAt(0, Location::RequiresFpuRegister());
1570    locations->SetInAt(1, Location::RequiresFpuRegister());
1571  } else {
1572    locations->SetInAt(0, Location::RequiresRegister());
1573    locations->SetInAt(1, Location::RequiresRegister());
1574  }
1575  if (IsBooleanValueOrMaterializedCondition(select->GetCondition())) {
1576    locations->SetInAt(2, Location::RequiresRegister());
1577  }
1578  locations->SetOut(Location::SameAsFirstInput());
1579}
1580
1581void InstructionCodeGeneratorARM::VisitSelect(HSelect* select) {
1582  LocationSummary* locations = select->GetLocations();
1583  Label false_target;
1584  GenerateTestAndBranch(select,
1585                        /* condition_input_index */ 2,
1586                        /* true_target */ nullptr,
1587                        &false_target);
1588  codegen_->MoveLocation(locations->Out(), locations->InAt(1), select->GetType());
1589  __ Bind(&false_target);
1590}
1591
1592void LocationsBuilderARM::VisitNativeDebugInfo(HNativeDebugInfo* info) {
1593  new (GetGraph()->GetArena()) LocationSummary(info);
1594}
1595
1596void InstructionCodeGeneratorARM::VisitNativeDebugInfo(HNativeDebugInfo*) {
1597  // MaybeRecordNativeDebugInfo is already called implicitly in CodeGenerator::Compile.
1598}
1599
1600void CodeGeneratorARM::GenerateNop() {
1601  __ nop();
1602}
1603
1604void LocationsBuilderARM::HandleCondition(HCondition* cond) {
1605  LocationSummary* locations =
1606      new (GetGraph()->GetArena()) LocationSummary(cond, LocationSummary::kNoCall);
1607  // Handle the long/FP comparisons made in instruction simplification.
1608  switch (cond->InputAt(0)->GetType()) {
1609    case Primitive::kPrimLong:
1610      locations->SetInAt(0, Location::RequiresRegister());
1611      locations->SetInAt(1, Location::RegisterOrConstant(cond->InputAt(1)));
1612      if (!cond->IsEmittedAtUseSite()) {
1613        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1614      }
1615      break;
1616
1617    case Primitive::kPrimFloat:
1618    case Primitive::kPrimDouble:
1619      locations->SetInAt(0, Location::RequiresFpuRegister());
1620      locations->SetInAt(1, ArithmeticZeroOrFpuRegister(cond->InputAt(1)));
1621      if (!cond->IsEmittedAtUseSite()) {
1622        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
1623      }
1624      break;
1625
1626    default:
1627      locations->SetInAt(0, Location::RequiresRegister());
1628      locations->SetInAt(1, Location::RegisterOrConstant(cond->InputAt(1)));
1629      if (!cond->IsEmittedAtUseSite()) {
1630        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
1631      }
1632  }
1633}
1634
1635void InstructionCodeGeneratorARM::HandleCondition(HCondition* cond) {
1636  if (cond->IsEmittedAtUseSite()) {
1637    return;
1638  }
1639
1640  LocationSummary* locations = cond->GetLocations();
1641  Location left = locations->InAt(0);
1642  Location right = locations->InAt(1);
1643  Register out = locations->Out().AsRegister<Register>();
1644  Label true_label, false_label;
1645
1646  switch (cond->InputAt(0)->GetType()) {
1647    default: {
1648      // Integer case.
1649      if (right.IsRegister()) {
1650        __ cmp(left.AsRegister<Register>(), ShifterOperand(right.AsRegister<Register>()));
1651      } else {
1652        DCHECK(right.IsConstant());
1653        __ CmpConstant(left.AsRegister<Register>(),
1654                       CodeGenerator::GetInt32ValueOf(right.GetConstant()));
1655      }
1656      __ it(ARMCondition(cond->GetCondition()), kItElse);
1657      __ mov(locations->Out().AsRegister<Register>(), ShifterOperand(1),
1658             ARMCondition(cond->GetCondition()));
1659      __ mov(locations->Out().AsRegister<Register>(), ShifterOperand(0),
1660             ARMCondition(cond->GetOppositeCondition()));
1661      return;
1662    }
1663    case Primitive::kPrimLong:
1664      GenerateLongComparesAndJumps(cond, &true_label, &false_label);
1665      break;
1666    case Primitive::kPrimFloat:
1667    case Primitive::kPrimDouble:
1668      GenerateVcmp(cond);
1669      GenerateFPJumps(cond, &true_label, &false_label);
1670      break;
1671  }
1672
1673  // Convert the jumps into the result.
1674  Label done_label;
1675
1676  // False case: result = 0.
1677  __ Bind(&false_label);
1678  __ LoadImmediate(out, 0);
1679  __ b(&done_label);
1680
1681  // True case: result = 1.
1682  __ Bind(&true_label);
1683  __ LoadImmediate(out, 1);
1684  __ Bind(&done_label);
1685}
1686
1687void LocationsBuilderARM::VisitEqual(HEqual* comp) {
1688  HandleCondition(comp);
1689}
1690
1691void InstructionCodeGeneratorARM::VisitEqual(HEqual* comp) {
1692  HandleCondition(comp);
1693}
1694
1695void LocationsBuilderARM::VisitNotEqual(HNotEqual* comp) {
1696  HandleCondition(comp);
1697}
1698
1699void InstructionCodeGeneratorARM::VisitNotEqual(HNotEqual* comp) {
1700  HandleCondition(comp);
1701}
1702
1703void LocationsBuilderARM::VisitLessThan(HLessThan* comp) {
1704  HandleCondition(comp);
1705}
1706
1707void InstructionCodeGeneratorARM::VisitLessThan(HLessThan* comp) {
1708  HandleCondition(comp);
1709}
1710
1711void LocationsBuilderARM::VisitLessThanOrEqual(HLessThanOrEqual* comp) {
1712  HandleCondition(comp);
1713}
1714
1715void InstructionCodeGeneratorARM::VisitLessThanOrEqual(HLessThanOrEqual* comp) {
1716  HandleCondition(comp);
1717}
1718
1719void LocationsBuilderARM::VisitGreaterThan(HGreaterThan* comp) {
1720  HandleCondition(comp);
1721}
1722
1723void InstructionCodeGeneratorARM::VisitGreaterThan(HGreaterThan* comp) {
1724  HandleCondition(comp);
1725}
1726
1727void LocationsBuilderARM::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) {
1728  HandleCondition(comp);
1729}
1730
1731void InstructionCodeGeneratorARM::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) {
1732  HandleCondition(comp);
1733}
1734
1735void LocationsBuilderARM::VisitBelow(HBelow* comp) {
1736  HandleCondition(comp);
1737}
1738
1739void InstructionCodeGeneratorARM::VisitBelow(HBelow* comp) {
1740  HandleCondition(comp);
1741}
1742
1743void LocationsBuilderARM::VisitBelowOrEqual(HBelowOrEqual* comp) {
1744  HandleCondition(comp);
1745}
1746
1747void InstructionCodeGeneratorARM::VisitBelowOrEqual(HBelowOrEqual* comp) {
1748  HandleCondition(comp);
1749}
1750
1751void LocationsBuilderARM::VisitAbove(HAbove* comp) {
1752  HandleCondition(comp);
1753}
1754
1755void InstructionCodeGeneratorARM::VisitAbove(HAbove* comp) {
1756  HandleCondition(comp);
1757}
1758
1759void LocationsBuilderARM::VisitAboveOrEqual(HAboveOrEqual* comp) {
1760  HandleCondition(comp);
1761}
1762
1763void InstructionCodeGeneratorARM::VisitAboveOrEqual(HAboveOrEqual* comp) {
1764  HandleCondition(comp);
1765}
1766
1767void LocationsBuilderARM::VisitIntConstant(HIntConstant* constant) {
1768  LocationSummary* locations =
1769      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1770  locations->SetOut(Location::ConstantLocation(constant));
1771}
1772
1773void InstructionCodeGeneratorARM::VisitIntConstant(HIntConstant* constant ATTRIBUTE_UNUSED) {
1774  // Will be generated at use site.
1775}
1776
1777void LocationsBuilderARM::VisitNullConstant(HNullConstant* constant) {
1778  LocationSummary* locations =
1779      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1780  locations->SetOut(Location::ConstantLocation(constant));
1781}
1782
1783void InstructionCodeGeneratorARM::VisitNullConstant(HNullConstant* constant ATTRIBUTE_UNUSED) {
1784  // Will be generated at use site.
1785}
1786
1787void LocationsBuilderARM::VisitLongConstant(HLongConstant* constant) {
1788  LocationSummary* locations =
1789      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1790  locations->SetOut(Location::ConstantLocation(constant));
1791}
1792
1793void InstructionCodeGeneratorARM::VisitLongConstant(HLongConstant* constant ATTRIBUTE_UNUSED) {
1794  // Will be generated at use site.
1795}
1796
1797void LocationsBuilderARM::VisitFloatConstant(HFloatConstant* constant) {
1798  LocationSummary* locations =
1799      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1800  locations->SetOut(Location::ConstantLocation(constant));
1801}
1802
1803void InstructionCodeGeneratorARM::VisitFloatConstant(HFloatConstant* constant ATTRIBUTE_UNUSED) {
1804  // Will be generated at use site.
1805}
1806
1807void LocationsBuilderARM::VisitDoubleConstant(HDoubleConstant* constant) {
1808  LocationSummary* locations =
1809      new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
1810  locations->SetOut(Location::ConstantLocation(constant));
1811}
1812
1813void InstructionCodeGeneratorARM::VisitDoubleConstant(HDoubleConstant* constant ATTRIBUTE_UNUSED) {
1814  // Will be generated at use site.
1815}
1816
1817void LocationsBuilderARM::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) {
1818  memory_barrier->SetLocations(nullptr);
1819}
1820
1821void InstructionCodeGeneratorARM::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) {
1822  codegen_->GenerateMemoryBarrier(memory_barrier->GetBarrierKind());
1823}
1824
1825void LocationsBuilderARM::VisitReturnVoid(HReturnVoid* ret) {
1826  ret->SetLocations(nullptr);
1827}
1828
1829void InstructionCodeGeneratorARM::VisitReturnVoid(HReturnVoid* ret ATTRIBUTE_UNUSED) {
1830  codegen_->GenerateFrameExit();
1831}
1832
1833void LocationsBuilderARM::VisitReturn(HReturn* ret) {
1834  LocationSummary* locations =
1835      new (GetGraph()->GetArena()) LocationSummary(ret, LocationSummary::kNoCall);
1836  locations->SetInAt(0, parameter_visitor_.GetReturnLocation(ret->InputAt(0)->GetType()));
1837}
1838
1839void InstructionCodeGeneratorARM::VisitReturn(HReturn* ret ATTRIBUTE_UNUSED) {
1840  codegen_->GenerateFrameExit();
1841}
1842
1843void LocationsBuilderARM::VisitInvokeUnresolved(HInvokeUnresolved* invoke) {
1844  // The trampoline uses the same calling convention as dex calling conventions,
1845  // except instead of loading arg0/r0 with the target Method*, arg0/r0 will contain
1846  // the method_idx.
1847  HandleInvoke(invoke);
1848}
1849
1850void InstructionCodeGeneratorARM::VisitInvokeUnresolved(HInvokeUnresolved* invoke) {
1851  codegen_->GenerateInvokeUnresolvedRuntimeCall(invoke);
1852}
1853
1854void LocationsBuilderARM::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) {
1855  // Explicit clinit checks triggered by static invokes must have been pruned by
1856  // art::PrepareForRegisterAllocation.
1857  DCHECK(!invoke->IsStaticWithExplicitClinitCheck());
1858
1859  IntrinsicLocationsBuilderARM intrinsic(GetGraph()->GetArena(),
1860                                         codegen_->GetAssembler(),
1861                                         codegen_->GetInstructionSetFeatures());
1862  if (intrinsic.TryDispatch(invoke)) {
1863    if (invoke->GetLocations()->CanCall() && invoke->HasPcRelativeDexCache()) {
1864      invoke->GetLocations()->SetInAt(invoke->GetSpecialInputIndex(), Location::Any());
1865    }
1866    return;
1867  }
1868
1869  HandleInvoke(invoke);
1870
1871  // For PC-relative dex cache the invoke has an extra input, the PC-relative address base.
1872  if (invoke->HasPcRelativeDexCache()) {
1873    invoke->GetLocations()->SetInAt(invoke->GetSpecialInputIndex(), Location::RequiresRegister());
1874  }
1875}
1876
1877static bool TryGenerateIntrinsicCode(HInvoke* invoke, CodeGeneratorARM* codegen) {
1878  if (invoke->GetLocations()->Intrinsified()) {
1879    IntrinsicCodeGeneratorARM intrinsic(codegen);
1880    intrinsic.Dispatch(invoke);
1881    return true;
1882  }
1883  return false;
1884}
1885
1886void InstructionCodeGeneratorARM::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) {
1887  // Explicit clinit checks triggered by static invokes must have been pruned by
1888  // art::PrepareForRegisterAllocation.
1889  DCHECK(!invoke->IsStaticWithExplicitClinitCheck());
1890
1891  if (TryGenerateIntrinsicCode(invoke, codegen_)) {
1892    return;
1893  }
1894
1895  LocationSummary* locations = invoke->GetLocations();
1896  codegen_->GenerateStaticOrDirectCall(
1897      invoke, locations->HasTemps() ? locations->GetTemp(0) : Location::NoLocation());
1898  codegen_->RecordPcInfo(invoke, invoke->GetDexPc());
1899}
1900
1901void LocationsBuilderARM::HandleInvoke(HInvoke* invoke) {
1902  InvokeDexCallingConventionVisitorARM calling_convention_visitor;
1903  CodeGenerator::CreateCommonInvokeLocationSummary(invoke, &calling_convention_visitor);
1904}
1905
1906void LocationsBuilderARM::VisitInvokeVirtual(HInvokeVirtual* invoke) {
1907  IntrinsicLocationsBuilderARM intrinsic(GetGraph()->GetArena(),
1908                                         codegen_->GetAssembler(),
1909                                         codegen_->GetInstructionSetFeatures());
1910  if (intrinsic.TryDispatch(invoke)) {
1911    return;
1912  }
1913
1914  HandleInvoke(invoke);
1915}
1916
1917void InstructionCodeGeneratorARM::VisitInvokeVirtual(HInvokeVirtual* invoke) {
1918  if (TryGenerateIntrinsicCode(invoke, codegen_)) {
1919    return;
1920  }
1921
1922  codegen_->GenerateVirtualCall(invoke, invoke->GetLocations()->GetTemp(0));
1923  DCHECK(!codegen_->IsLeafMethod());
1924  codegen_->RecordPcInfo(invoke, invoke->GetDexPc());
1925}
1926
1927void LocationsBuilderARM::VisitInvokeInterface(HInvokeInterface* invoke) {
1928  HandleInvoke(invoke);
1929  // Add the hidden argument.
1930  invoke->GetLocations()->AddTemp(Location::RegisterLocation(R12));
1931}
1932
1933void InstructionCodeGeneratorARM::VisitInvokeInterface(HInvokeInterface* invoke) {
1934  // TODO: b/18116999, our IMTs can miss an IncompatibleClassChangeError.
1935  LocationSummary* locations = invoke->GetLocations();
1936  Register temp = locations->GetTemp(0).AsRegister<Register>();
1937  Register hidden_reg = locations->GetTemp(1).AsRegister<Register>();
1938  Location receiver = locations->InAt(0);
1939  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
1940
1941  // Set the hidden argument. This is safe to do this here, as R12
1942  // won't be modified thereafter, before the `blx` (call) instruction.
1943  DCHECK_EQ(R12, hidden_reg);
1944  __ LoadImmediate(hidden_reg, invoke->GetDexMethodIndex());
1945
1946  if (receiver.IsStackSlot()) {
1947    __ LoadFromOffset(kLoadWord, temp, SP, receiver.GetStackIndex());
1948    // /* HeapReference<Class> */ temp = temp->klass_
1949    __ LoadFromOffset(kLoadWord, temp, temp, class_offset);
1950  } else {
1951    // /* HeapReference<Class> */ temp = receiver->klass_
1952    __ LoadFromOffset(kLoadWord, temp, receiver.AsRegister<Register>(), class_offset);
1953  }
1954  codegen_->MaybeRecordImplicitNullCheck(invoke);
1955  // Instead of simply (possibly) unpoisoning `temp` here, we should
1956  // emit a read barrier for the previous class reference load.
1957  // However this is not required in practice, as this is an
1958  // intermediate/temporary reference and because the current
1959  // concurrent copying collector keeps the from-space memory
1960  // intact/accessible until the end of the marking phase (the
1961  // concurrent copying collector may not in the future).
1962  __ MaybeUnpoisonHeapReference(temp);
1963  __ LoadFromOffset(kLoadWord, temp, temp,
1964        mirror::Class::ImtPtrOffset(kArmPointerSize).Uint32Value());
1965  uint32_t method_offset = static_cast<uint32_t>(ImTable::OffsetOfElement(
1966      invoke->GetImtIndex(), kArmPointerSize));
1967  // temp = temp->GetImtEntryAt(method_offset);
1968  __ LoadFromOffset(kLoadWord, temp, temp, method_offset);
1969  uint32_t entry_point =
1970      ArtMethod::EntryPointFromQuickCompiledCodeOffset(kArmPointerSize).Int32Value();
1971  // LR = temp->GetEntryPoint();
1972  __ LoadFromOffset(kLoadWord, LR, temp, entry_point);
1973  // LR();
1974  __ blx(LR);
1975  DCHECK(!codegen_->IsLeafMethod());
1976  codegen_->RecordPcInfo(invoke, invoke->GetDexPc());
1977}
1978
1979void LocationsBuilderARM::VisitNeg(HNeg* neg) {
1980  LocationSummary* locations =
1981      new (GetGraph()->GetArena()) LocationSummary(neg, LocationSummary::kNoCall);
1982  switch (neg->GetResultType()) {
1983    case Primitive::kPrimInt: {
1984      locations->SetInAt(0, Location::RequiresRegister());
1985      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
1986      break;
1987    }
1988    case Primitive::kPrimLong: {
1989      locations->SetInAt(0, Location::RequiresRegister());
1990      locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1991      break;
1992    }
1993
1994    case Primitive::kPrimFloat:
1995    case Primitive::kPrimDouble:
1996      locations->SetInAt(0, Location::RequiresFpuRegister());
1997      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
1998      break;
1999
2000    default:
2001      LOG(FATAL) << "Unexpected neg type " << neg->GetResultType();
2002  }
2003}
2004
2005void InstructionCodeGeneratorARM::VisitNeg(HNeg* neg) {
2006  LocationSummary* locations = neg->GetLocations();
2007  Location out = locations->Out();
2008  Location in = locations->InAt(0);
2009  switch (neg->GetResultType()) {
2010    case Primitive::kPrimInt:
2011      DCHECK(in.IsRegister());
2012      __ rsb(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(0));
2013      break;
2014
2015    case Primitive::kPrimLong:
2016      DCHECK(in.IsRegisterPair());
2017      // out.lo = 0 - in.lo (and update the carry/borrow (C) flag)
2018      __ rsbs(out.AsRegisterPairLow<Register>(),
2019              in.AsRegisterPairLow<Register>(),
2020              ShifterOperand(0));
2021      // We cannot emit an RSC (Reverse Subtract with Carry)
2022      // instruction here, as it does not exist in the Thumb-2
2023      // instruction set.  We use the following approach
2024      // using SBC and SUB instead.
2025      //
2026      // out.hi = -C
2027      __ sbc(out.AsRegisterPairHigh<Register>(),
2028             out.AsRegisterPairHigh<Register>(),
2029             ShifterOperand(out.AsRegisterPairHigh<Register>()));
2030      // out.hi = out.hi - in.hi
2031      __ sub(out.AsRegisterPairHigh<Register>(),
2032             out.AsRegisterPairHigh<Register>(),
2033             ShifterOperand(in.AsRegisterPairHigh<Register>()));
2034      break;
2035
2036    case Primitive::kPrimFloat:
2037      DCHECK(in.IsFpuRegister());
2038      __ vnegs(out.AsFpuRegister<SRegister>(), in.AsFpuRegister<SRegister>());
2039      break;
2040
2041    case Primitive::kPrimDouble:
2042      DCHECK(in.IsFpuRegisterPair());
2043      __ vnegd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2044               FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2045      break;
2046
2047    default:
2048      LOG(FATAL) << "Unexpected neg type " << neg->GetResultType();
2049  }
2050}
2051
2052void LocationsBuilderARM::VisitTypeConversion(HTypeConversion* conversion) {
2053  Primitive::Type result_type = conversion->GetResultType();
2054  Primitive::Type input_type = conversion->GetInputType();
2055  DCHECK_NE(result_type, input_type);
2056
2057  // The float-to-long, double-to-long and long-to-float type conversions
2058  // rely on a call to the runtime.
2059  LocationSummary::CallKind call_kind =
2060      (((input_type == Primitive::kPrimFloat || input_type == Primitive::kPrimDouble)
2061        && result_type == Primitive::kPrimLong)
2062       || (input_type == Primitive::kPrimLong && result_type == Primitive::kPrimFloat))
2063      ? LocationSummary::kCallOnMainOnly
2064      : LocationSummary::kNoCall;
2065  LocationSummary* locations =
2066      new (GetGraph()->GetArena()) LocationSummary(conversion, call_kind);
2067
2068  // The Java language does not allow treating boolean as an integral type but
2069  // our bit representation makes it safe.
2070
2071  switch (result_type) {
2072    case Primitive::kPrimByte:
2073      switch (input_type) {
2074        case Primitive::kPrimLong:
2075          // Type conversion from long to byte is a result of code transformations.
2076        case Primitive::kPrimBoolean:
2077          // Boolean input is a result of code transformations.
2078        case Primitive::kPrimShort:
2079        case Primitive::kPrimInt:
2080        case Primitive::kPrimChar:
2081          // Processing a Dex `int-to-byte' instruction.
2082          locations->SetInAt(0, Location::RequiresRegister());
2083          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2084          break;
2085
2086        default:
2087          LOG(FATAL) << "Unexpected type conversion from " << input_type
2088                     << " to " << result_type;
2089      }
2090      break;
2091
2092    case Primitive::kPrimShort:
2093      switch (input_type) {
2094        case Primitive::kPrimLong:
2095          // Type conversion from long to short is a result of code transformations.
2096        case Primitive::kPrimBoolean:
2097          // Boolean input is a result of code transformations.
2098        case Primitive::kPrimByte:
2099        case Primitive::kPrimInt:
2100        case Primitive::kPrimChar:
2101          // Processing a Dex `int-to-short' instruction.
2102          locations->SetInAt(0, Location::RequiresRegister());
2103          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2104          break;
2105
2106        default:
2107          LOG(FATAL) << "Unexpected type conversion from " << input_type
2108                     << " to " << result_type;
2109      }
2110      break;
2111
2112    case Primitive::kPrimInt:
2113      switch (input_type) {
2114        case Primitive::kPrimLong:
2115          // Processing a Dex `long-to-int' instruction.
2116          locations->SetInAt(0, Location::Any());
2117          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2118          break;
2119
2120        case Primitive::kPrimFloat:
2121          // Processing a Dex `float-to-int' instruction.
2122          locations->SetInAt(0, Location::RequiresFpuRegister());
2123          locations->SetOut(Location::RequiresRegister());
2124          locations->AddTemp(Location::RequiresFpuRegister());
2125          break;
2126
2127        case Primitive::kPrimDouble:
2128          // Processing a Dex `double-to-int' instruction.
2129          locations->SetInAt(0, Location::RequiresFpuRegister());
2130          locations->SetOut(Location::RequiresRegister());
2131          locations->AddTemp(Location::RequiresFpuRegister());
2132          break;
2133
2134        default:
2135          LOG(FATAL) << "Unexpected type conversion from " << input_type
2136                     << " to " << result_type;
2137      }
2138      break;
2139
2140    case Primitive::kPrimLong:
2141      switch (input_type) {
2142        case Primitive::kPrimBoolean:
2143          // Boolean input is a result of code transformations.
2144        case Primitive::kPrimByte:
2145        case Primitive::kPrimShort:
2146        case Primitive::kPrimInt:
2147        case Primitive::kPrimChar:
2148          // Processing a Dex `int-to-long' instruction.
2149          locations->SetInAt(0, Location::RequiresRegister());
2150          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2151          break;
2152
2153        case Primitive::kPrimFloat: {
2154          // Processing a Dex `float-to-long' instruction.
2155          InvokeRuntimeCallingConvention calling_convention;
2156          locations->SetInAt(0, Location::FpuRegisterLocation(
2157              calling_convention.GetFpuRegisterAt(0)));
2158          locations->SetOut(Location::RegisterPairLocation(R0, R1));
2159          break;
2160        }
2161
2162        case Primitive::kPrimDouble: {
2163          // Processing a Dex `double-to-long' instruction.
2164          InvokeRuntimeCallingConvention calling_convention;
2165          locations->SetInAt(0, Location::FpuRegisterPairLocation(
2166              calling_convention.GetFpuRegisterAt(0),
2167              calling_convention.GetFpuRegisterAt(1)));
2168          locations->SetOut(Location::RegisterPairLocation(R0, R1));
2169          break;
2170        }
2171
2172        default:
2173          LOG(FATAL) << "Unexpected type conversion from " << input_type
2174                     << " to " << result_type;
2175      }
2176      break;
2177
2178    case Primitive::kPrimChar:
2179      switch (input_type) {
2180        case Primitive::kPrimLong:
2181          // Type conversion from long to char is a result of code transformations.
2182        case Primitive::kPrimBoolean:
2183          // Boolean input is a result of code transformations.
2184        case Primitive::kPrimByte:
2185        case Primitive::kPrimShort:
2186        case Primitive::kPrimInt:
2187          // Processing a Dex `int-to-char' instruction.
2188          locations->SetInAt(0, Location::RequiresRegister());
2189          locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2190          break;
2191
2192        default:
2193          LOG(FATAL) << "Unexpected type conversion from " << input_type
2194                     << " to " << result_type;
2195      }
2196      break;
2197
2198    case Primitive::kPrimFloat:
2199      switch (input_type) {
2200        case Primitive::kPrimBoolean:
2201          // Boolean input is a result of code transformations.
2202        case Primitive::kPrimByte:
2203        case Primitive::kPrimShort:
2204        case Primitive::kPrimInt:
2205        case Primitive::kPrimChar:
2206          // Processing a Dex `int-to-float' instruction.
2207          locations->SetInAt(0, Location::RequiresRegister());
2208          locations->SetOut(Location::RequiresFpuRegister());
2209          break;
2210
2211        case Primitive::kPrimLong: {
2212          // Processing a Dex `long-to-float' instruction.
2213          InvokeRuntimeCallingConvention calling_convention;
2214          locations->SetInAt(0, Location::RegisterPairLocation(
2215              calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1)));
2216          locations->SetOut(Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0)));
2217          break;
2218        }
2219
2220        case Primitive::kPrimDouble:
2221          // Processing a Dex `double-to-float' instruction.
2222          locations->SetInAt(0, Location::RequiresFpuRegister());
2223          locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2224          break;
2225
2226        default:
2227          LOG(FATAL) << "Unexpected type conversion from " << input_type
2228                     << " to " << result_type;
2229      };
2230      break;
2231
2232    case Primitive::kPrimDouble:
2233      switch (input_type) {
2234        case Primitive::kPrimBoolean:
2235          // Boolean input is a result of code transformations.
2236        case Primitive::kPrimByte:
2237        case Primitive::kPrimShort:
2238        case Primitive::kPrimInt:
2239        case Primitive::kPrimChar:
2240          // Processing a Dex `int-to-double' instruction.
2241          locations->SetInAt(0, Location::RequiresRegister());
2242          locations->SetOut(Location::RequiresFpuRegister());
2243          break;
2244
2245        case Primitive::kPrimLong:
2246          // Processing a Dex `long-to-double' instruction.
2247          locations->SetInAt(0, Location::RequiresRegister());
2248          locations->SetOut(Location::RequiresFpuRegister());
2249          locations->AddTemp(Location::RequiresFpuRegister());
2250          locations->AddTemp(Location::RequiresFpuRegister());
2251          break;
2252
2253        case Primitive::kPrimFloat:
2254          // Processing a Dex `float-to-double' instruction.
2255          locations->SetInAt(0, Location::RequiresFpuRegister());
2256          locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2257          break;
2258
2259        default:
2260          LOG(FATAL) << "Unexpected type conversion from " << input_type
2261                     << " to " << result_type;
2262      };
2263      break;
2264
2265    default:
2266      LOG(FATAL) << "Unexpected type conversion from " << input_type
2267                 << " to " << result_type;
2268  }
2269}
2270
2271void InstructionCodeGeneratorARM::VisitTypeConversion(HTypeConversion* conversion) {
2272  LocationSummary* locations = conversion->GetLocations();
2273  Location out = locations->Out();
2274  Location in = locations->InAt(0);
2275  Primitive::Type result_type = conversion->GetResultType();
2276  Primitive::Type input_type = conversion->GetInputType();
2277  DCHECK_NE(result_type, input_type);
2278  switch (result_type) {
2279    case Primitive::kPrimByte:
2280      switch (input_type) {
2281        case Primitive::kPrimLong:
2282          // Type conversion from long to byte is a result of code transformations.
2283          __ sbfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 8);
2284          break;
2285        case Primitive::kPrimBoolean:
2286          // Boolean input is a result of code transformations.
2287        case Primitive::kPrimShort:
2288        case Primitive::kPrimInt:
2289        case Primitive::kPrimChar:
2290          // Processing a Dex `int-to-byte' instruction.
2291          __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 8);
2292          break;
2293
2294        default:
2295          LOG(FATAL) << "Unexpected type conversion from " << input_type
2296                     << " to " << result_type;
2297      }
2298      break;
2299
2300    case Primitive::kPrimShort:
2301      switch (input_type) {
2302        case Primitive::kPrimLong:
2303          // Type conversion from long to short is a result of code transformations.
2304          __ sbfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 16);
2305          break;
2306        case Primitive::kPrimBoolean:
2307          // Boolean input is a result of code transformations.
2308        case Primitive::kPrimByte:
2309        case Primitive::kPrimInt:
2310        case Primitive::kPrimChar:
2311          // Processing a Dex `int-to-short' instruction.
2312          __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16);
2313          break;
2314
2315        default:
2316          LOG(FATAL) << "Unexpected type conversion from " << input_type
2317                     << " to " << result_type;
2318      }
2319      break;
2320
2321    case Primitive::kPrimInt:
2322      switch (input_type) {
2323        case Primitive::kPrimLong:
2324          // Processing a Dex `long-to-int' instruction.
2325          DCHECK(out.IsRegister());
2326          if (in.IsRegisterPair()) {
2327            __ Mov(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2328          } else if (in.IsDoubleStackSlot()) {
2329            __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), SP, in.GetStackIndex());
2330          } else {
2331            DCHECK(in.IsConstant());
2332            DCHECK(in.GetConstant()->IsLongConstant());
2333            int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2334            __ LoadImmediate(out.AsRegister<Register>(), static_cast<int32_t>(value));
2335          }
2336          break;
2337
2338        case Primitive::kPrimFloat: {
2339          // Processing a Dex `float-to-int' instruction.
2340          SRegister temp = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>();
2341          __ vcvtis(temp, in.AsFpuRegister<SRegister>());
2342          __ vmovrs(out.AsRegister<Register>(), temp);
2343          break;
2344        }
2345
2346        case Primitive::kPrimDouble: {
2347          // Processing a Dex `double-to-int' instruction.
2348          SRegister temp_s = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>();
2349          __ vcvtid(temp_s, FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2350          __ vmovrs(out.AsRegister<Register>(), temp_s);
2351          break;
2352        }
2353
2354        default:
2355          LOG(FATAL) << "Unexpected type conversion from " << input_type
2356                     << " to " << result_type;
2357      }
2358      break;
2359
2360    case Primitive::kPrimLong:
2361      switch (input_type) {
2362        case Primitive::kPrimBoolean:
2363          // Boolean input is a result of code transformations.
2364        case Primitive::kPrimByte:
2365        case Primitive::kPrimShort:
2366        case Primitive::kPrimInt:
2367        case Primitive::kPrimChar:
2368          // Processing a Dex `int-to-long' instruction.
2369          DCHECK(out.IsRegisterPair());
2370          DCHECK(in.IsRegister());
2371          __ Mov(out.AsRegisterPairLow<Register>(), in.AsRegister<Register>());
2372          // Sign extension.
2373          __ Asr(out.AsRegisterPairHigh<Register>(),
2374                 out.AsRegisterPairLow<Register>(),
2375                 31);
2376          break;
2377
2378        case Primitive::kPrimFloat:
2379          // Processing a Dex `float-to-long' instruction.
2380          codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pF2l),
2381                                  conversion,
2382                                  conversion->GetDexPc(),
2383                                  nullptr);
2384          CheckEntrypointTypes<kQuickF2l, int64_t, float>();
2385          break;
2386
2387        case Primitive::kPrimDouble:
2388          // Processing a Dex `double-to-long' instruction.
2389          codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pD2l),
2390                                  conversion,
2391                                  conversion->GetDexPc(),
2392                                  nullptr);
2393          CheckEntrypointTypes<kQuickD2l, int64_t, double>();
2394          break;
2395
2396        default:
2397          LOG(FATAL) << "Unexpected type conversion from " << input_type
2398                     << " to " << result_type;
2399      }
2400      break;
2401
2402    case Primitive::kPrimChar:
2403      switch (input_type) {
2404        case Primitive::kPrimLong:
2405          // Type conversion from long to char is a result of code transformations.
2406          __ ubfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 16);
2407          break;
2408        case Primitive::kPrimBoolean:
2409          // Boolean input is a result of code transformations.
2410        case Primitive::kPrimByte:
2411        case Primitive::kPrimShort:
2412        case Primitive::kPrimInt:
2413          // Processing a Dex `int-to-char' instruction.
2414          __ ubfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16);
2415          break;
2416
2417        default:
2418          LOG(FATAL) << "Unexpected type conversion from " << input_type
2419                     << " to " << result_type;
2420      }
2421      break;
2422
2423    case Primitive::kPrimFloat:
2424      switch (input_type) {
2425        case Primitive::kPrimBoolean:
2426          // Boolean input is a result of code transformations.
2427        case Primitive::kPrimByte:
2428        case Primitive::kPrimShort:
2429        case Primitive::kPrimInt:
2430        case Primitive::kPrimChar: {
2431          // Processing a Dex `int-to-float' instruction.
2432          __ vmovsr(out.AsFpuRegister<SRegister>(), in.AsRegister<Register>());
2433          __ vcvtsi(out.AsFpuRegister<SRegister>(), out.AsFpuRegister<SRegister>());
2434          break;
2435        }
2436
2437        case Primitive::kPrimLong:
2438          // Processing a Dex `long-to-float' instruction.
2439          codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pL2f),
2440                                  conversion,
2441                                  conversion->GetDexPc(),
2442                                  nullptr);
2443          CheckEntrypointTypes<kQuickL2f, float, int64_t>();
2444          break;
2445
2446        case Primitive::kPrimDouble:
2447          // Processing a Dex `double-to-float' instruction.
2448          __ vcvtsd(out.AsFpuRegister<SRegister>(),
2449                    FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2450          break;
2451
2452        default:
2453          LOG(FATAL) << "Unexpected type conversion from " << input_type
2454                     << " to " << result_type;
2455      };
2456      break;
2457
2458    case Primitive::kPrimDouble:
2459      switch (input_type) {
2460        case Primitive::kPrimBoolean:
2461          // Boolean input is a result of code transformations.
2462        case Primitive::kPrimByte:
2463        case Primitive::kPrimShort:
2464        case Primitive::kPrimInt:
2465        case Primitive::kPrimChar: {
2466          // Processing a Dex `int-to-double' instruction.
2467          __ vmovsr(out.AsFpuRegisterPairLow<SRegister>(), in.AsRegister<Register>());
2468          __ vcvtdi(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2469                    out.AsFpuRegisterPairLow<SRegister>());
2470          break;
2471        }
2472
2473        case Primitive::kPrimLong: {
2474          // Processing a Dex `long-to-double' instruction.
2475          Register low = in.AsRegisterPairLow<Register>();
2476          Register high = in.AsRegisterPairHigh<Register>();
2477          SRegister out_s = out.AsFpuRegisterPairLow<SRegister>();
2478          DRegister out_d = FromLowSToD(out_s);
2479          SRegister temp_s = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>();
2480          DRegister temp_d = FromLowSToD(temp_s);
2481          SRegister constant_s = locations->GetTemp(1).AsFpuRegisterPairLow<SRegister>();
2482          DRegister constant_d = FromLowSToD(constant_s);
2483
2484          // temp_d = int-to-double(high)
2485          __ vmovsr(temp_s, high);
2486          __ vcvtdi(temp_d, temp_s);
2487          // constant_d = k2Pow32EncodingForDouble
2488          __ LoadDImmediate(constant_d, bit_cast<double, int64_t>(k2Pow32EncodingForDouble));
2489          // out_d = unsigned-to-double(low)
2490          __ vmovsr(out_s, low);
2491          __ vcvtdu(out_d, out_s);
2492          // out_d += temp_d * constant_d
2493          __ vmlad(out_d, temp_d, constant_d);
2494          break;
2495        }
2496
2497        case Primitive::kPrimFloat:
2498          // Processing a Dex `float-to-double' instruction.
2499          __ vcvtds(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2500                    in.AsFpuRegister<SRegister>());
2501          break;
2502
2503        default:
2504          LOG(FATAL) << "Unexpected type conversion from " << input_type
2505                     << " to " << result_type;
2506      };
2507      break;
2508
2509    default:
2510      LOG(FATAL) << "Unexpected type conversion from " << input_type
2511                 << " to " << result_type;
2512  }
2513}
2514
2515void LocationsBuilderARM::VisitAdd(HAdd* add) {
2516  LocationSummary* locations =
2517      new (GetGraph()->GetArena()) LocationSummary(add, LocationSummary::kNoCall);
2518  switch (add->GetResultType()) {
2519    case Primitive::kPrimInt: {
2520      locations->SetInAt(0, Location::RequiresRegister());
2521      locations->SetInAt(1, Location::RegisterOrConstant(add->InputAt(1)));
2522      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2523      break;
2524    }
2525
2526    case Primitive::kPrimLong: {
2527      locations->SetInAt(0, Location::RequiresRegister());
2528      locations->SetInAt(1, ArmEncodableConstantOrRegister(add->InputAt(1), ADD));
2529      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2530      break;
2531    }
2532
2533    case Primitive::kPrimFloat:
2534    case Primitive::kPrimDouble: {
2535      locations->SetInAt(0, Location::RequiresFpuRegister());
2536      locations->SetInAt(1, Location::RequiresFpuRegister());
2537      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2538      break;
2539    }
2540
2541    default:
2542      LOG(FATAL) << "Unexpected add type " << add->GetResultType();
2543  }
2544}
2545
2546void InstructionCodeGeneratorARM::VisitAdd(HAdd* add) {
2547  LocationSummary* locations = add->GetLocations();
2548  Location out = locations->Out();
2549  Location first = locations->InAt(0);
2550  Location second = locations->InAt(1);
2551  switch (add->GetResultType()) {
2552    case Primitive::kPrimInt:
2553      if (second.IsRegister()) {
2554        __ add(out.AsRegister<Register>(),
2555               first.AsRegister<Register>(),
2556               ShifterOperand(second.AsRegister<Register>()));
2557      } else {
2558        __ AddConstant(out.AsRegister<Register>(),
2559                       first.AsRegister<Register>(),
2560                       second.GetConstant()->AsIntConstant()->GetValue());
2561      }
2562      break;
2563
2564    case Primitive::kPrimLong: {
2565      if (second.IsConstant()) {
2566        uint64_t value = static_cast<uint64_t>(Int64FromConstant(second.GetConstant()));
2567        GenerateAddLongConst(out, first, value);
2568      } else {
2569        DCHECK(second.IsRegisterPair());
2570        __ adds(out.AsRegisterPairLow<Register>(),
2571                first.AsRegisterPairLow<Register>(),
2572                ShifterOperand(second.AsRegisterPairLow<Register>()));
2573        __ adc(out.AsRegisterPairHigh<Register>(),
2574               first.AsRegisterPairHigh<Register>(),
2575               ShifterOperand(second.AsRegisterPairHigh<Register>()));
2576      }
2577      break;
2578    }
2579
2580    case Primitive::kPrimFloat:
2581      __ vadds(out.AsFpuRegister<SRegister>(),
2582               first.AsFpuRegister<SRegister>(),
2583               second.AsFpuRegister<SRegister>());
2584      break;
2585
2586    case Primitive::kPrimDouble:
2587      __ vaddd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2588               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2589               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
2590      break;
2591
2592    default:
2593      LOG(FATAL) << "Unexpected add type " << add->GetResultType();
2594  }
2595}
2596
2597void LocationsBuilderARM::VisitSub(HSub* sub) {
2598  LocationSummary* locations =
2599      new (GetGraph()->GetArena()) LocationSummary(sub, LocationSummary::kNoCall);
2600  switch (sub->GetResultType()) {
2601    case Primitive::kPrimInt: {
2602      locations->SetInAt(0, Location::RequiresRegister());
2603      locations->SetInAt(1, Location::RegisterOrConstant(sub->InputAt(1)));
2604      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2605      break;
2606    }
2607
2608    case Primitive::kPrimLong: {
2609      locations->SetInAt(0, Location::RequiresRegister());
2610      locations->SetInAt(1, ArmEncodableConstantOrRegister(sub->InputAt(1), SUB));
2611      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2612      break;
2613    }
2614    case Primitive::kPrimFloat:
2615    case Primitive::kPrimDouble: {
2616      locations->SetInAt(0, Location::RequiresFpuRegister());
2617      locations->SetInAt(1, Location::RequiresFpuRegister());
2618      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2619      break;
2620    }
2621    default:
2622      LOG(FATAL) << "Unexpected sub type " << sub->GetResultType();
2623  }
2624}
2625
2626void InstructionCodeGeneratorARM::VisitSub(HSub* sub) {
2627  LocationSummary* locations = sub->GetLocations();
2628  Location out = locations->Out();
2629  Location first = locations->InAt(0);
2630  Location second = locations->InAt(1);
2631  switch (sub->GetResultType()) {
2632    case Primitive::kPrimInt: {
2633      if (second.IsRegister()) {
2634        __ sub(out.AsRegister<Register>(),
2635               first.AsRegister<Register>(),
2636               ShifterOperand(second.AsRegister<Register>()));
2637      } else {
2638        __ AddConstant(out.AsRegister<Register>(),
2639                       first.AsRegister<Register>(),
2640                       -second.GetConstant()->AsIntConstant()->GetValue());
2641      }
2642      break;
2643    }
2644
2645    case Primitive::kPrimLong: {
2646      if (second.IsConstant()) {
2647        uint64_t value = static_cast<uint64_t>(Int64FromConstant(second.GetConstant()));
2648        GenerateAddLongConst(out, first, -value);
2649      } else {
2650        DCHECK(second.IsRegisterPair());
2651        __ subs(out.AsRegisterPairLow<Register>(),
2652                first.AsRegisterPairLow<Register>(),
2653                ShifterOperand(second.AsRegisterPairLow<Register>()));
2654        __ sbc(out.AsRegisterPairHigh<Register>(),
2655               first.AsRegisterPairHigh<Register>(),
2656               ShifterOperand(second.AsRegisterPairHigh<Register>()));
2657      }
2658      break;
2659    }
2660
2661    case Primitive::kPrimFloat: {
2662      __ vsubs(out.AsFpuRegister<SRegister>(),
2663               first.AsFpuRegister<SRegister>(),
2664               second.AsFpuRegister<SRegister>());
2665      break;
2666    }
2667
2668    case Primitive::kPrimDouble: {
2669      __ vsubd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2670               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2671               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
2672      break;
2673    }
2674
2675
2676    default:
2677      LOG(FATAL) << "Unexpected sub type " << sub->GetResultType();
2678  }
2679}
2680
2681void LocationsBuilderARM::VisitMul(HMul* mul) {
2682  LocationSummary* locations =
2683      new (GetGraph()->GetArena()) LocationSummary(mul, LocationSummary::kNoCall);
2684  switch (mul->GetResultType()) {
2685    case Primitive::kPrimInt:
2686    case Primitive::kPrimLong:  {
2687      locations->SetInAt(0, Location::RequiresRegister());
2688      locations->SetInAt(1, Location::RequiresRegister());
2689      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2690      break;
2691    }
2692
2693    case Primitive::kPrimFloat:
2694    case Primitive::kPrimDouble: {
2695      locations->SetInAt(0, Location::RequiresFpuRegister());
2696      locations->SetInAt(1, Location::RequiresFpuRegister());
2697      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2698      break;
2699    }
2700
2701    default:
2702      LOG(FATAL) << "Unexpected mul type " << mul->GetResultType();
2703  }
2704}
2705
2706void InstructionCodeGeneratorARM::VisitMul(HMul* mul) {
2707  LocationSummary* locations = mul->GetLocations();
2708  Location out = locations->Out();
2709  Location first = locations->InAt(0);
2710  Location second = locations->InAt(1);
2711  switch (mul->GetResultType()) {
2712    case Primitive::kPrimInt: {
2713      __ mul(out.AsRegister<Register>(),
2714             first.AsRegister<Register>(),
2715             second.AsRegister<Register>());
2716      break;
2717    }
2718    case Primitive::kPrimLong: {
2719      Register out_hi = out.AsRegisterPairHigh<Register>();
2720      Register out_lo = out.AsRegisterPairLow<Register>();
2721      Register in1_hi = first.AsRegisterPairHigh<Register>();
2722      Register in1_lo = first.AsRegisterPairLow<Register>();
2723      Register in2_hi = second.AsRegisterPairHigh<Register>();
2724      Register in2_lo = second.AsRegisterPairLow<Register>();
2725
2726      // Extra checks to protect caused by the existence of R1_R2.
2727      // The algorithm is wrong if out.hi is either in1.lo or in2.lo:
2728      // (e.g. in1=r0_r1, in2=r2_r3 and out=r1_r2);
2729      DCHECK_NE(out_hi, in1_lo);
2730      DCHECK_NE(out_hi, in2_lo);
2731
2732      // input: in1 - 64 bits, in2 - 64 bits
2733      // output: out
2734      // formula: out.hi : out.lo = (in1.lo * in2.hi + in1.hi * in2.lo)* 2^32 + in1.lo * in2.lo
2735      // parts: out.hi = in1.lo * in2.hi + in1.hi * in2.lo + (in1.lo * in2.lo)[63:32]
2736      // parts: out.lo = (in1.lo * in2.lo)[31:0]
2737
2738      // IP <- in1.lo * in2.hi
2739      __ mul(IP, in1_lo, in2_hi);
2740      // out.hi <- in1.lo * in2.hi + in1.hi * in2.lo
2741      __ mla(out_hi, in1_hi, in2_lo, IP);
2742      // out.lo <- (in1.lo * in2.lo)[31:0];
2743      __ umull(out_lo, IP, in1_lo, in2_lo);
2744      // out.hi <- in2.hi * in1.lo +  in2.lo * in1.hi + (in1.lo * in2.lo)[63:32]
2745      __ add(out_hi, out_hi, ShifterOperand(IP));
2746      break;
2747    }
2748
2749    case Primitive::kPrimFloat: {
2750      __ vmuls(out.AsFpuRegister<SRegister>(),
2751               first.AsFpuRegister<SRegister>(),
2752               second.AsFpuRegister<SRegister>());
2753      break;
2754    }
2755
2756    case Primitive::kPrimDouble: {
2757      __ vmuld(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
2758               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
2759               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
2760      break;
2761    }
2762
2763    default:
2764      LOG(FATAL) << "Unexpected mul type " << mul->GetResultType();
2765  }
2766}
2767
2768void InstructionCodeGeneratorARM::DivRemOneOrMinusOne(HBinaryOperation* instruction) {
2769  DCHECK(instruction->IsDiv() || instruction->IsRem());
2770  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2771
2772  LocationSummary* locations = instruction->GetLocations();
2773  Location second = locations->InAt(1);
2774  DCHECK(second.IsConstant());
2775
2776  Register out = locations->Out().AsRegister<Register>();
2777  Register dividend = locations->InAt(0).AsRegister<Register>();
2778  int32_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2779  DCHECK(imm == 1 || imm == -1);
2780
2781  if (instruction->IsRem()) {
2782    __ LoadImmediate(out, 0);
2783  } else {
2784    if (imm == 1) {
2785      __ Mov(out, dividend);
2786    } else {
2787      __ rsb(out, dividend, ShifterOperand(0));
2788    }
2789  }
2790}
2791
2792void InstructionCodeGeneratorARM::DivRemByPowerOfTwo(HBinaryOperation* instruction) {
2793  DCHECK(instruction->IsDiv() || instruction->IsRem());
2794  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2795
2796  LocationSummary* locations = instruction->GetLocations();
2797  Location second = locations->InAt(1);
2798  DCHECK(second.IsConstant());
2799
2800  Register out = locations->Out().AsRegister<Register>();
2801  Register dividend = locations->InAt(0).AsRegister<Register>();
2802  Register temp = locations->GetTemp(0).AsRegister<Register>();
2803  int32_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2804  uint32_t abs_imm = static_cast<uint32_t>(AbsOrMin(imm));
2805  int ctz_imm = CTZ(abs_imm);
2806
2807  if (ctz_imm == 1) {
2808    __ Lsr(temp, dividend, 32 - ctz_imm);
2809  } else {
2810    __ Asr(temp, dividend, 31);
2811    __ Lsr(temp, temp, 32 - ctz_imm);
2812  }
2813  __ add(out, temp, ShifterOperand(dividend));
2814
2815  if (instruction->IsDiv()) {
2816    __ Asr(out, out, ctz_imm);
2817    if (imm < 0) {
2818      __ rsb(out, out, ShifterOperand(0));
2819    }
2820  } else {
2821    __ ubfx(out, out, 0, ctz_imm);
2822    __ sub(out, out, ShifterOperand(temp));
2823  }
2824}
2825
2826void InstructionCodeGeneratorARM::GenerateDivRemWithAnyConstant(HBinaryOperation* instruction) {
2827  DCHECK(instruction->IsDiv() || instruction->IsRem());
2828  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2829
2830  LocationSummary* locations = instruction->GetLocations();
2831  Location second = locations->InAt(1);
2832  DCHECK(second.IsConstant());
2833
2834  Register out = locations->Out().AsRegister<Register>();
2835  Register dividend = locations->InAt(0).AsRegister<Register>();
2836  Register temp1 = locations->GetTemp(0).AsRegister<Register>();
2837  Register temp2 = locations->GetTemp(1).AsRegister<Register>();
2838  int64_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2839
2840  int64_t magic;
2841  int shift;
2842  CalculateMagicAndShiftForDivRem(imm, false /* is_long */, &magic, &shift);
2843
2844  __ LoadImmediate(temp1, magic);
2845  __ smull(temp2, temp1, dividend, temp1);
2846
2847  if (imm > 0 && magic < 0) {
2848    __ add(temp1, temp1, ShifterOperand(dividend));
2849  } else if (imm < 0 && magic > 0) {
2850    __ sub(temp1, temp1, ShifterOperand(dividend));
2851  }
2852
2853  if (shift != 0) {
2854    __ Asr(temp1, temp1, shift);
2855  }
2856
2857  if (instruction->IsDiv()) {
2858    __ sub(out, temp1, ShifterOperand(temp1, ASR, 31));
2859  } else {
2860    __ sub(temp1, temp1, ShifterOperand(temp1, ASR, 31));
2861    // TODO: Strength reduction for mls.
2862    __ LoadImmediate(temp2, imm);
2863    __ mls(out, temp1, temp2, dividend);
2864  }
2865}
2866
2867void InstructionCodeGeneratorARM::GenerateDivRemConstantIntegral(HBinaryOperation* instruction) {
2868  DCHECK(instruction->IsDiv() || instruction->IsRem());
2869  DCHECK(instruction->GetResultType() == Primitive::kPrimInt);
2870
2871  LocationSummary* locations = instruction->GetLocations();
2872  Location second = locations->InAt(1);
2873  DCHECK(second.IsConstant());
2874
2875  int32_t imm = second.GetConstant()->AsIntConstant()->GetValue();
2876  if (imm == 0) {
2877    // Do not generate anything. DivZeroCheck would prevent any code to be executed.
2878  } else if (imm == 1 || imm == -1) {
2879    DivRemOneOrMinusOne(instruction);
2880  } else if (IsPowerOfTwo(AbsOrMin(imm))) {
2881    DivRemByPowerOfTwo(instruction);
2882  } else {
2883    DCHECK(imm <= -2 || imm >= 2);
2884    GenerateDivRemWithAnyConstant(instruction);
2885  }
2886}
2887
2888void LocationsBuilderARM::VisitDiv(HDiv* div) {
2889  LocationSummary::CallKind call_kind = LocationSummary::kNoCall;
2890  if (div->GetResultType() == Primitive::kPrimLong) {
2891    // pLdiv runtime call.
2892    call_kind = LocationSummary::kCallOnMainOnly;
2893  } else if (div->GetResultType() == Primitive::kPrimInt && div->InputAt(1)->IsConstant()) {
2894    // sdiv will be replaced by other instruction sequence.
2895  } else if (div->GetResultType() == Primitive::kPrimInt &&
2896             !codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
2897    // pIdivmod runtime call.
2898    call_kind = LocationSummary::kCallOnMainOnly;
2899  }
2900
2901  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(div, call_kind);
2902
2903  switch (div->GetResultType()) {
2904    case Primitive::kPrimInt: {
2905      if (div->InputAt(1)->IsConstant()) {
2906        locations->SetInAt(0, Location::RequiresRegister());
2907        locations->SetInAt(1, Location::ConstantLocation(div->InputAt(1)->AsConstant()));
2908        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2909        int32_t value = div->InputAt(1)->AsIntConstant()->GetValue();
2910        if (value == 1 || value == 0 || value == -1) {
2911          // No temp register required.
2912        } else {
2913          locations->AddTemp(Location::RequiresRegister());
2914          if (!IsPowerOfTwo(AbsOrMin(value))) {
2915            locations->AddTemp(Location::RequiresRegister());
2916          }
2917        }
2918      } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
2919        locations->SetInAt(0, Location::RequiresRegister());
2920        locations->SetInAt(1, Location::RequiresRegister());
2921        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
2922      } else {
2923        InvokeRuntimeCallingConvention calling_convention;
2924        locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
2925        locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
2926        // Note: divrem will compute both the quotient and the remainder as the pair R0 and R1, but
2927        //       we only need the former.
2928        locations->SetOut(Location::RegisterLocation(R0));
2929      }
2930      break;
2931    }
2932    case Primitive::kPrimLong: {
2933      InvokeRuntimeCallingConvention calling_convention;
2934      locations->SetInAt(0, Location::RegisterPairLocation(
2935          calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1)));
2936      locations->SetInAt(1, Location::RegisterPairLocation(
2937          calling_convention.GetRegisterAt(2), calling_convention.GetRegisterAt(3)));
2938      locations->SetOut(Location::RegisterPairLocation(R0, R1));
2939      break;
2940    }
2941    case Primitive::kPrimFloat:
2942    case Primitive::kPrimDouble: {
2943      locations->SetInAt(0, Location::RequiresFpuRegister());
2944      locations->SetInAt(1, Location::RequiresFpuRegister());
2945      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
2946      break;
2947    }
2948
2949    default:
2950      LOG(FATAL) << "Unexpected div type " << div->GetResultType();
2951  }
2952}
2953
2954void InstructionCodeGeneratorARM::VisitDiv(HDiv* div) {
2955  LocationSummary* locations = div->GetLocations();
2956  Location out = locations->Out();
2957  Location first = locations->InAt(0);
2958  Location second = locations->InAt(1);
2959
2960  switch (div->GetResultType()) {
2961    case Primitive::kPrimInt: {
2962      if (second.IsConstant()) {
2963        GenerateDivRemConstantIntegral(div);
2964      } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
2965        __ sdiv(out.AsRegister<Register>(),
2966                first.AsRegister<Register>(),
2967                second.AsRegister<Register>());
2968      } else {
2969        InvokeRuntimeCallingConvention calling_convention;
2970        DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegister<Register>());
2971        DCHECK_EQ(calling_convention.GetRegisterAt(1), second.AsRegister<Register>());
2972        DCHECK_EQ(R0, out.AsRegister<Register>());
2973
2974        codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pIdivmod), div, div->GetDexPc(), nullptr);
2975        CheckEntrypointTypes<kQuickIdivmod, int32_t, int32_t, int32_t>();
2976      }
2977      break;
2978    }
2979
2980    case Primitive::kPrimLong: {
2981      InvokeRuntimeCallingConvention calling_convention;
2982      DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegisterPairLow<Register>());
2983      DCHECK_EQ(calling_convention.GetRegisterAt(1), first.AsRegisterPairHigh<Register>());
2984      DCHECK_EQ(calling_convention.GetRegisterAt(2), second.AsRegisterPairLow<Register>());
2985      DCHECK_EQ(calling_convention.GetRegisterAt(3), second.AsRegisterPairHigh<Register>());
2986      DCHECK_EQ(R0, out.AsRegisterPairLow<Register>());
2987      DCHECK_EQ(R1, out.AsRegisterPairHigh<Register>());
2988
2989      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pLdiv), div, div->GetDexPc(), nullptr);
2990      CheckEntrypointTypes<kQuickLdiv, int64_t, int64_t, int64_t>();
2991      break;
2992    }
2993
2994    case Primitive::kPrimFloat: {
2995      __ vdivs(out.AsFpuRegister<SRegister>(),
2996               first.AsFpuRegister<SRegister>(),
2997               second.AsFpuRegister<SRegister>());
2998      break;
2999    }
3000
3001    case Primitive::kPrimDouble: {
3002      __ vdivd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
3003               FromLowSToD(first.AsFpuRegisterPairLow<SRegister>()),
3004               FromLowSToD(second.AsFpuRegisterPairLow<SRegister>()));
3005      break;
3006    }
3007
3008    default:
3009      LOG(FATAL) << "Unexpected div type " << div->GetResultType();
3010  }
3011}
3012
3013void LocationsBuilderARM::VisitRem(HRem* rem) {
3014  Primitive::Type type = rem->GetResultType();
3015
3016  // Most remainders are implemented in the runtime.
3017  LocationSummary::CallKind call_kind = LocationSummary::kCallOnMainOnly;
3018  if (rem->GetResultType() == Primitive::kPrimInt && rem->InputAt(1)->IsConstant()) {
3019    // sdiv will be replaced by other instruction sequence.
3020    call_kind = LocationSummary::kNoCall;
3021  } else if ((rem->GetResultType() == Primitive::kPrimInt)
3022             && codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
3023    // Have hardware divide instruction for int, do it with three instructions.
3024    call_kind = LocationSummary::kNoCall;
3025  }
3026
3027  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(rem, call_kind);
3028
3029  switch (type) {
3030    case Primitive::kPrimInt: {
3031      if (rem->InputAt(1)->IsConstant()) {
3032        locations->SetInAt(0, Location::RequiresRegister());
3033        locations->SetInAt(1, Location::ConstantLocation(rem->InputAt(1)->AsConstant()));
3034        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3035        int32_t value = rem->InputAt(1)->AsIntConstant()->GetValue();
3036        if (value == 1 || value == 0 || value == -1) {
3037          // No temp register required.
3038        } else {
3039          locations->AddTemp(Location::RequiresRegister());
3040          if (!IsPowerOfTwo(AbsOrMin(value))) {
3041            locations->AddTemp(Location::RequiresRegister());
3042          }
3043        }
3044      } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
3045        locations->SetInAt(0, Location::RequiresRegister());
3046        locations->SetInAt(1, Location::RequiresRegister());
3047        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3048        locations->AddTemp(Location::RequiresRegister());
3049      } else {
3050        InvokeRuntimeCallingConvention calling_convention;
3051        locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
3052        locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
3053        // Note: divrem will compute both the quotient and the remainder as the pair R0 and R1, but
3054        //       we only need the latter.
3055        locations->SetOut(Location::RegisterLocation(R1));
3056      }
3057      break;
3058    }
3059    case Primitive::kPrimLong: {
3060      InvokeRuntimeCallingConvention calling_convention;
3061      locations->SetInAt(0, Location::RegisterPairLocation(
3062          calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1)));
3063      locations->SetInAt(1, Location::RegisterPairLocation(
3064          calling_convention.GetRegisterAt(2), calling_convention.GetRegisterAt(3)));
3065      // The runtime helper puts the output in R2,R3.
3066      locations->SetOut(Location::RegisterPairLocation(R2, R3));
3067      break;
3068    }
3069    case Primitive::kPrimFloat: {
3070      InvokeRuntimeCallingConvention calling_convention;
3071      locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0)));
3072      locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1)));
3073      locations->SetOut(Location::FpuRegisterLocation(S0));
3074      break;
3075    }
3076
3077    case Primitive::kPrimDouble: {
3078      InvokeRuntimeCallingConvention calling_convention;
3079      locations->SetInAt(0, Location::FpuRegisterPairLocation(
3080          calling_convention.GetFpuRegisterAt(0), calling_convention.GetFpuRegisterAt(1)));
3081      locations->SetInAt(1, Location::FpuRegisterPairLocation(
3082          calling_convention.GetFpuRegisterAt(2), calling_convention.GetFpuRegisterAt(3)));
3083      locations->SetOut(Location::Location::FpuRegisterPairLocation(S0, S1));
3084      break;
3085    }
3086
3087    default:
3088      LOG(FATAL) << "Unexpected rem type " << type;
3089  }
3090}
3091
3092void InstructionCodeGeneratorARM::VisitRem(HRem* rem) {
3093  LocationSummary* locations = rem->GetLocations();
3094  Location out = locations->Out();
3095  Location first = locations->InAt(0);
3096  Location second = locations->InAt(1);
3097
3098  Primitive::Type type = rem->GetResultType();
3099  switch (type) {
3100    case Primitive::kPrimInt: {
3101        if (second.IsConstant()) {
3102          GenerateDivRemConstantIntegral(rem);
3103        } else if (codegen_->GetInstructionSetFeatures().HasDivideInstruction()) {
3104        Register reg1 = first.AsRegister<Register>();
3105        Register reg2 = second.AsRegister<Register>();
3106        Register temp = locations->GetTemp(0).AsRegister<Register>();
3107
3108        // temp = reg1 / reg2  (integer division)
3109        // dest = reg1 - temp * reg2
3110        __ sdiv(temp, reg1, reg2);
3111        __ mls(out.AsRegister<Register>(), temp, reg2, reg1);
3112      } else {
3113        InvokeRuntimeCallingConvention calling_convention;
3114        DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegister<Register>());
3115        DCHECK_EQ(calling_convention.GetRegisterAt(1), second.AsRegister<Register>());
3116        DCHECK_EQ(R1, out.AsRegister<Register>());
3117
3118        codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pIdivmod), rem, rem->GetDexPc(), nullptr);
3119        CheckEntrypointTypes<kQuickIdivmod, int32_t, int32_t, int32_t>();
3120      }
3121      break;
3122    }
3123
3124    case Primitive::kPrimLong: {
3125      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pLmod), rem, rem->GetDexPc(), nullptr);
3126        CheckEntrypointTypes<kQuickLmod, int64_t, int64_t, int64_t>();
3127      break;
3128    }
3129
3130    case Primitive::kPrimFloat: {
3131      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pFmodf), rem, rem->GetDexPc(), nullptr);
3132      CheckEntrypointTypes<kQuickFmodf, float, float, float>();
3133      break;
3134    }
3135
3136    case Primitive::kPrimDouble: {
3137      codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pFmod), rem, rem->GetDexPc(), nullptr);
3138      CheckEntrypointTypes<kQuickFmod, double, double, double>();
3139      break;
3140    }
3141
3142    default:
3143      LOG(FATAL) << "Unexpected rem type " << type;
3144  }
3145}
3146
3147void LocationsBuilderARM::VisitDivZeroCheck(HDivZeroCheck* instruction) {
3148  LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock()
3149      ? LocationSummary::kCallOnSlowPath
3150      : LocationSummary::kNoCall;
3151  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
3152  locations->SetInAt(0, Location::RegisterOrConstant(instruction->InputAt(0)));
3153  if (instruction->HasUses()) {
3154    locations->SetOut(Location::SameAsFirstInput());
3155  }
3156}
3157
3158void InstructionCodeGeneratorARM::VisitDivZeroCheck(HDivZeroCheck* instruction) {
3159  SlowPathCode* slow_path = new (GetGraph()->GetArena()) DivZeroCheckSlowPathARM(instruction);
3160  codegen_->AddSlowPath(slow_path);
3161
3162  LocationSummary* locations = instruction->GetLocations();
3163  Location value = locations->InAt(0);
3164
3165  switch (instruction->GetType()) {
3166    case Primitive::kPrimBoolean:
3167    case Primitive::kPrimByte:
3168    case Primitive::kPrimChar:
3169    case Primitive::kPrimShort:
3170    case Primitive::kPrimInt: {
3171      if (value.IsRegister()) {
3172        __ CompareAndBranchIfZero(value.AsRegister<Register>(), slow_path->GetEntryLabel());
3173      } else {
3174        DCHECK(value.IsConstant()) << value;
3175        if (value.GetConstant()->AsIntConstant()->GetValue() == 0) {
3176          __ b(slow_path->GetEntryLabel());
3177        }
3178      }
3179      break;
3180    }
3181    case Primitive::kPrimLong: {
3182      if (value.IsRegisterPair()) {
3183        __ orrs(IP,
3184                value.AsRegisterPairLow<Register>(),
3185                ShifterOperand(value.AsRegisterPairHigh<Register>()));
3186        __ b(slow_path->GetEntryLabel(), EQ);
3187      } else {
3188        DCHECK(value.IsConstant()) << value;
3189        if (value.GetConstant()->AsLongConstant()->GetValue() == 0) {
3190          __ b(slow_path->GetEntryLabel());
3191        }
3192      }
3193      break;
3194    default:
3195      LOG(FATAL) << "Unexpected type for HDivZeroCheck " << instruction->GetType();
3196    }
3197  }
3198}
3199
3200void InstructionCodeGeneratorARM::HandleIntegerRotate(LocationSummary* locations) {
3201  Register in = locations->InAt(0).AsRegister<Register>();
3202  Location rhs = locations->InAt(1);
3203  Register out = locations->Out().AsRegister<Register>();
3204
3205  if (rhs.IsConstant()) {
3206    // Arm32 and Thumb2 assemblers require a rotation on the interval [1,31],
3207    // so map all rotations to a +ve. equivalent in that range.
3208    // (e.g. left *or* right by -2 bits == 30 bits in the same direction.)
3209    uint32_t rot = CodeGenerator::GetInt32ValueOf(rhs.GetConstant()) & 0x1F;
3210    if (rot) {
3211      // Rotate, mapping left rotations to right equivalents if necessary.
3212      // (e.g. left by 2 bits == right by 30.)
3213      __ Ror(out, in, rot);
3214    } else if (out != in) {
3215      __ Mov(out, in);
3216    }
3217  } else {
3218    __ Ror(out, in, rhs.AsRegister<Register>());
3219  }
3220}
3221
3222// Gain some speed by mapping all Long rotates onto equivalent pairs of Integer
3223// rotates by swapping input regs (effectively rotating by the first 32-bits of
3224// a larger rotation) or flipping direction (thus treating larger right/left
3225// rotations as sub-word sized rotations in the other direction) as appropriate.
3226void InstructionCodeGeneratorARM::HandleLongRotate(LocationSummary* locations) {
3227  Register in_reg_lo = locations->InAt(0).AsRegisterPairLow<Register>();
3228  Register in_reg_hi = locations->InAt(0).AsRegisterPairHigh<Register>();
3229  Location rhs = locations->InAt(1);
3230  Register out_reg_lo = locations->Out().AsRegisterPairLow<Register>();
3231  Register out_reg_hi = locations->Out().AsRegisterPairHigh<Register>();
3232
3233  if (rhs.IsConstant()) {
3234    uint64_t rot = CodeGenerator::GetInt64ValueOf(rhs.GetConstant());
3235    // Map all rotations to +ve. equivalents on the interval [0,63].
3236    rot &= kMaxLongShiftDistance;
3237    // For rotates over a word in size, 'pre-rotate' by 32-bits to keep rotate
3238    // logic below to a simple pair of binary orr.
3239    // (e.g. 34 bits == in_reg swap + 2 bits right.)
3240    if (rot >= kArmBitsPerWord) {
3241      rot -= kArmBitsPerWord;
3242      std::swap(in_reg_hi, in_reg_lo);
3243    }
3244    // Rotate, or mov to out for zero or word size rotations.
3245    if (rot != 0u) {
3246      __ Lsr(out_reg_hi, in_reg_hi, rot);
3247      __ orr(out_reg_hi, out_reg_hi, ShifterOperand(in_reg_lo, arm::LSL, kArmBitsPerWord - rot));
3248      __ Lsr(out_reg_lo, in_reg_lo, rot);
3249      __ orr(out_reg_lo, out_reg_lo, ShifterOperand(in_reg_hi, arm::LSL, kArmBitsPerWord - rot));
3250    } else {
3251      __ Mov(out_reg_lo, in_reg_lo);
3252      __ Mov(out_reg_hi, in_reg_hi);
3253    }
3254  } else {
3255    Register shift_right = locations->GetTemp(0).AsRegister<Register>();
3256    Register shift_left = locations->GetTemp(1).AsRegister<Register>();
3257    Label end;
3258    Label shift_by_32_plus_shift_right;
3259
3260    __ and_(shift_right, rhs.AsRegister<Register>(), ShifterOperand(0x1F));
3261    __ Lsrs(shift_left, rhs.AsRegister<Register>(), 6);
3262    __ rsb(shift_left, shift_right, ShifterOperand(kArmBitsPerWord), AL, kCcKeep);
3263    __ b(&shift_by_32_plus_shift_right, CC);
3264
3265    // out_reg_hi = (reg_hi << shift_left) | (reg_lo >> shift_right).
3266    // out_reg_lo = (reg_lo << shift_left) | (reg_hi >> shift_right).
3267    __ Lsl(out_reg_hi, in_reg_hi, shift_left);
3268    __ Lsr(out_reg_lo, in_reg_lo, shift_right);
3269    __ add(out_reg_hi, out_reg_hi, ShifterOperand(out_reg_lo));
3270    __ Lsl(out_reg_lo, in_reg_lo, shift_left);
3271    __ Lsr(shift_left, in_reg_hi, shift_right);
3272    __ add(out_reg_lo, out_reg_lo, ShifterOperand(shift_left));
3273    __ b(&end);
3274
3275    __ Bind(&shift_by_32_plus_shift_right);  // Shift by 32+shift_right.
3276    // out_reg_hi = (reg_hi >> shift_right) | (reg_lo << shift_left).
3277    // out_reg_lo = (reg_lo >> shift_right) | (reg_hi << shift_left).
3278    __ Lsr(out_reg_hi, in_reg_hi, shift_right);
3279    __ Lsl(out_reg_lo, in_reg_lo, shift_left);
3280    __ add(out_reg_hi, out_reg_hi, ShifterOperand(out_reg_lo));
3281    __ Lsr(out_reg_lo, in_reg_lo, shift_right);
3282    __ Lsl(shift_right, in_reg_hi, shift_left);
3283    __ add(out_reg_lo, out_reg_lo, ShifterOperand(shift_right));
3284
3285    __ Bind(&end);
3286  }
3287}
3288
3289void LocationsBuilderARM::VisitRor(HRor* ror) {
3290  LocationSummary* locations =
3291      new (GetGraph()->GetArena()) LocationSummary(ror, LocationSummary::kNoCall);
3292  switch (ror->GetResultType()) {
3293    case Primitive::kPrimInt: {
3294      locations->SetInAt(0, Location::RequiresRegister());
3295      locations->SetInAt(1, Location::RegisterOrConstant(ror->InputAt(1)));
3296      locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3297      break;
3298    }
3299    case Primitive::kPrimLong: {
3300      locations->SetInAt(0, Location::RequiresRegister());
3301      if (ror->InputAt(1)->IsConstant()) {
3302        locations->SetInAt(1, Location::ConstantLocation(ror->InputAt(1)->AsConstant()));
3303      } else {
3304        locations->SetInAt(1, Location::RequiresRegister());
3305        locations->AddTemp(Location::RequiresRegister());
3306        locations->AddTemp(Location::RequiresRegister());
3307      }
3308      locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3309      break;
3310    }
3311    default:
3312      LOG(FATAL) << "Unexpected operation type " << ror->GetResultType();
3313  }
3314}
3315
3316void InstructionCodeGeneratorARM::VisitRor(HRor* ror) {
3317  LocationSummary* locations = ror->GetLocations();
3318  Primitive::Type type = ror->GetResultType();
3319  switch (type) {
3320    case Primitive::kPrimInt: {
3321      HandleIntegerRotate(locations);
3322      break;
3323    }
3324    case Primitive::kPrimLong: {
3325      HandleLongRotate(locations);
3326      break;
3327    }
3328    default:
3329      LOG(FATAL) << "Unexpected operation type " << type;
3330      UNREACHABLE();
3331  }
3332}
3333
3334void LocationsBuilderARM::HandleShift(HBinaryOperation* op) {
3335  DCHECK(op->IsShl() || op->IsShr() || op->IsUShr());
3336
3337  LocationSummary* locations =
3338      new (GetGraph()->GetArena()) LocationSummary(op, LocationSummary::kNoCall);
3339
3340  switch (op->GetResultType()) {
3341    case Primitive::kPrimInt: {
3342      locations->SetInAt(0, Location::RequiresRegister());
3343      if (op->InputAt(1)->IsConstant()) {
3344        locations->SetInAt(1, Location::ConstantLocation(op->InputAt(1)->AsConstant()));
3345        locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3346      } else {
3347        locations->SetInAt(1, Location::RequiresRegister());
3348        // Make the output overlap, as it will be used to hold the masked
3349        // second input.
3350        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3351      }
3352      break;
3353    }
3354    case Primitive::kPrimLong: {
3355      locations->SetInAt(0, Location::RequiresRegister());
3356      if (op->InputAt(1)->IsConstant()) {
3357        locations->SetInAt(1, Location::ConstantLocation(op->InputAt(1)->AsConstant()));
3358        // For simplicity, use kOutputOverlap even though we only require that low registers
3359        // don't clash with high registers which the register allocator currently guarantees.
3360        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3361      } else {
3362        locations->SetInAt(1, Location::RequiresRegister());
3363        locations->AddTemp(Location::RequiresRegister());
3364        locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3365      }
3366      break;
3367    }
3368    default:
3369      LOG(FATAL) << "Unexpected operation type " << op->GetResultType();
3370  }
3371}
3372
3373void InstructionCodeGeneratorARM::HandleShift(HBinaryOperation* op) {
3374  DCHECK(op->IsShl() || op->IsShr() || op->IsUShr());
3375
3376  LocationSummary* locations = op->GetLocations();
3377  Location out = locations->Out();
3378  Location first = locations->InAt(0);
3379  Location second = locations->InAt(1);
3380
3381  Primitive::Type type = op->GetResultType();
3382  switch (type) {
3383    case Primitive::kPrimInt: {
3384      Register out_reg = out.AsRegister<Register>();
3385      Register first_reg = first.AsRegister<Register>();
3386      if (second.IsRegister()) {
3387        Register second_reg = second.AsRegister<Register>();
3388        // ARM doesn't mask the shift count so we need to do it ourselves.
3389        __ and_(out_reg, second_reg, ShifterOperand(kMaxIntShiftDistance));
3390        if (op->IsShl()) {
3391          __ Lsl(out_reg, first_reg, out_reg);
3392        } else if (op->IsShr()) {
3393          __ Asr(out_reg, first_reg, out_reg);
3394        } else {
3395          __ Lsr(out_reg, first_reg, out_reg);
3396        }
3397      } else {
3398        int32_t cst = second.GetConstant()->AsIntConstant()->GetValue();
3399        uint32_t shift_value = cst & kMaxIntShiftDistance;
3400        if (shift_value == 0) {  // ARM does not support shifting with 0 immediate.
3401          __ Mov(out_reg, first_reg);
3402        } else if (op->IsShl()) {
3403          __ Lsl(out_reg, first_reg, shift_value);
3404        } else if (op->IsShr()) {
3405          __ Asr(out_reg, first_reg, shift_value);
3406        } else {
3407          __ Lsr(out_reg, first_reg, shift_value);
3408        }
3409      }
3410      break;
3411    }
3412    case Primitive::kPrimLong: {
3413      Register o_h = out.AsRegisterPairHigh<Register>();
3414      Register o_l = out.AsRegisterPairLow<Register>();
3415
3416      Register high = first.AsRegisterPairHigh<Register>();
3417      Register low = first.AsRegisterPairLow<Register>();
3418
3419      if (second.IsRegister()) {
3420        Register temp = locations->GetTemp(0).AsRegister<Register>();
3421
3422        Register second_reg = second.AsRegister<Register>();
3423
3424        if (op->IsShl()) {
3425          __ and_(o_l, second_reg, ShifterOperand(kMaxLongShiftDistance));
3426          // Shift the high part
3427          __ Lsl(o_h, high, o_l);
3428          // Shift the low part and `or` what overflew on the high part
3429          __ rsb(temp, o_l, ShifterOperand(kArmBitsPerWord));
3430          __ Lsr(temp, low, temp);
3431          __ orr(o_h, o_h, ShifterOperand(temp));
3432          // If the shift is > 32 bits, override the high part
3433          __ subs(temp, o_l, ShifterOperand(kArmBitsPerWord));
3434          __ it(PL);
3435          __ Lsl(o_h, low, temp, PL);
3436          // Shift the low part
3437          __ Lsl(o_l, low, o_l);
3438        } else if (op->IsShr()) {
3439          __ and_(o_h, second_reg, ShifterOperand(kMaxLongShiftDistance));
3440          // Shift the low part
3441          __ Lsr(o_l, low, o_h);
3442          // Shift the high part and `or` what underflew on the low part
3443          __ rsb(temp, o_h, ShifterOperand(kArmBitsPerWord));
3444          __ Lsl(temp, high, temp);
3445          __ orr(o_l, o_l, ShifterOperand(temp));
3446          // If the shift is > 32 bits, override the low part
3447          __ subs(temp, o_h, ShifterOperand(kArmBitsPerWord));
3448          __ it(PL);
3449          __ Asr(o_l, high, temp, PL);
3450          // Shift the high part
3451          __ Asr(o_h, high, o_h);
3452        } else {
3453          __ and_(o_h, second_reg, ShifterOperand(kMaxLongShiftDistance));
3454          // same as Shr except we use `Lsr`s and not `Asr`s
3455          __ Lsr(o_l, low, o_h);
3456          __ rsb(temp, o_h, ShifterOperand(kArmBitsPerWord));
3457          __ Lsl(temp, high, temp);
3458          __ orr(o_l, o_l, ShifterOperand(temp));
3459          __ subs(temp, o_h, ShifterOperand(kArmBitsPerWord));
3460          __ it(PL);
3461          __ Lsr(o_l, high, temp, PL);
3462          __ Lsr(o_h, high, o_h);
3463        }
3464      } else {
3465        // Register allocator doesn't create partial overlap.
3466        DCHECK_NE(o_l, high);
3467        DCHECK_NE(o_h, low);
3468        int32_t cst = second.GetConstant()->AsIntConstant()->GetValue();
3469        uint32_t shift_value = cst & kMaxLongShiftDistance;
3470        if (shift_value > 32) {
3471          if (op->IsShl()) {
3472            __ Lsl(o_h, low, shift_value - 32);
3473            __ LoadImmediate(o_l, 0);
3474          } else if (op->IsShr()) {
3475            __ Asr(o_l, high, shift_value - 32);
3476            __ Asr(o_h, high, 31);
3477          } else {
3478            __ Lsr(o_l, high, shift_value - 32);
3479            __ LoadImmediate(o_h, 0);
3480          }
3481        } else if (shift_value == 32) {
3482          if (op->IsShl()) {
3483            __ mov(o_h, ShifterOperand(low));
3484            __ LoadImmediate(o_l, 0);
3485          } else if (op->IsShr()) {
3486            __ mov(o_l, ShifterOperand(high));
3487            __ Asr(o_h, high, 31);
3488          } else {
3489            __ mov(o_l, ShifterOperand(high));
3490            __ LoadImmediate(o_h, 0);
3491          }
3492        } else if (shift_value == 1) {
3493          if (op->IsShl()) {
3494            __ Lsls(o_l, low, 1);
3495            __ adc(o_h, high, ShifterOperand(high));
3496          } else if (op->IsShr()) {
3497            __ Asrs(o_h, high, 1);
3498            __ Rrx(o_l, low);
3499          } else {
3500            __ Lsrs(o_h, high, 1);
3501            __ Rrx(o_l, low);
3502          }
3503        } else {
3504          DCHECK(2 <= shift_value && shift_value < 32) << shift_value;
3505          if (op->IsShl()) {
3506            __ Lsl(o_h, high, shift_value);
3507            __ orr(o_h, o_h, ShifterOperand(low, LSR, 32 - shift_value));
3508            __ Lsl(o_l, low, shift_value);
3509          } else if (op->IsShr()) {
3510            __ Lsr(o_l, low, shift_value);
3511            __ orr(o_l, o_l, ShifterOperand(high, LSL, 32 - shift_value));
3512            __ Asr(o_h, high, shift_value);
3513          } else {
3514            __ Lsr(o_l, low, shift_value);
3515            __ orr(o_l, o_l, ShifterOperand(high, LSL, 32 - shift_value));
3516            __ Lsr(o_h, high, shift_value);
3517          }
3518        }
3519      }
3520      break;
3521    }
3522    default:
3523      LOG(FATAL) << "Unexpected operation type " << type;
3524      UNREACHABLE();
3525  }
3526}
3527
3528void LocationsBuilderARM::VisitShl(HShl* shl) {
3529  HandleShift(shl);
3530}
3531
3532void InstructionCodeGeneratorARM::VisitShl(HShl* shl) {
3533  HandleShift(shl);
3534}
3535
3536void LocationsBuilderARM::VisitShr(HShr* shr) {
3537  HandleShift(shr);
3538}
3539
3540void InstructionCodeGeneratorARM::VisitShr(HShr* shr) {
3541  HandleShift(shr);
3542}
3543
3544void LocationsBuilderARM::VisitUShr(HUShr* ushr) {
3545  HandleShift(ushr);
3546}
3547
3548void InstructionCodeGeneratorARM::VisitUShr(HUShr* ushr) {
3549  HandleShift(ushr);
3550}
3551
3552void LocationsBuilderARM::VisitNewInstance(HNewInstance* instruction) {
3553  LocationSummary* locations =
3554      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
3555  if (instruction->IsStringAlloc()) {
3556    locations->AddTemp(Location::RegisterLocation(kMethodRegisterArgument));
3557  } else {
3558    InvokeRuntimeCallingConvention calling_convention;
3559    locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
3560    locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
3561  }
3562  locations->SetOut(Location::RegisterLocation(R0));
3563}
3564
3565void InstructionCodeGeneratorARM::VisitNewInstance(HNewInstance* instruction) {
3566  // Note: if heap poisoning is enabled, the entry point takes cares
3567  // of poisoning the reference.
3568  if (instruction->IsStringAlloc()) {
3569    // String is allocated through StringFactory. Call NewEmptyString entry point.
3570    Register temp = instruction->GetLocations()->GetTemp(0).AsRegister<Register>();
3571    MemberOffset code_offset = ArtMethod::EntryPointFromQuickCompiledCodeOffset(kArmPointerSize);
3572    __ LoadFromOffset(kLoadWord, temp, TR, QUICK_ENTRY_POINT(pNewEmptyString));
3573    __ LoadFromOffset(kLoadWord, LR, temp, code_offset.Int32Value());
3574    __ blx(LR);
3575    codegen_->RecordPcInfo(instruction, instruction->GetDexPc());
3576  } else {
3577    codegen_->InvokeRuntime(instruction->GetEntrypoint(),
3578                            instruction,
3579                            instruction->GetDexPc(),
3580                            nullptr);
3581    CheckEntrypointTypes<kQuickAllocObjectWithAccessCheck, void*, uint32_t, ArtMethod*>();
3582  }
3583}
3584
3585void LocationsBuilderARM::VisitNewArray(HNewArray* instruction) {
3586  LocationSummary* locations =
3587      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
3588  InvokeRuntimeCallingConvention calling_convention;
3589  locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
3590  locations->SetOut(Location::RegisterLocation(R0));
3591  locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(1)));
3592  locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(2)));
3593}
3594
3595void InstructionCodeGeneratorARM::VisitNewArray(HNewArray* instruction) {
3596  InvokeRuntimeCallingConvention calling_convention;
3597  __ LoadImmediate(calling_convention.GetRegisterAt(0), instruction->GetTypeIndex());
3598  // Note: if heap poisoning is enabled, the entry point takes cares
3599  // of poisoning the reference.
3600  codegen_->InvokeRuntime(instruction->GetEntrypoint(),
3601                          instruction,
3602                          instruction->GetDexPc(),
3603                          nullptr);
3604  CheckEntrypointTypes<kQuickAllocArrayWithAccessCheck, void*, uint32_t, int32_t, ArtMethod*>();
3605}
3606
3607void LocationsBuilderARM::VisitParameterValue(HParameterValue* instruction) {
3608  LocationSummary* locations =
3609      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3610  Location location = parameter_visitor_.GetNextLocation(instruction->GetType());
3611  if (location.IsStackSlot()) {
3612    location = Location::StackSlot(location.GetStackIndex() + codegen_->GetFrameSize());
3613  } else if (location.IsDoubleStackSlot()) {
3614    location = Location::DoubleStackSlot(location.GetStackIndex() + codegen_->GetFrameSize());
3615  }
3616  locations->SetOut(location);
3617}
3618
3619void InstructionCodeGeneratorARM::VisitParameterValue(
3620    HParameterValue* instruction ATTRIBUTE_UNUSED) {
3621  // Nothing to do, the parameter is already at its location.
3622}
3623
3624void LocationsBuilderARM::VisitCurrentMethod(HCurrentMethod* instruction) {
3625  LocationSummary* locations =
3626      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3627  locations->SetOut(Location::RegisterLocation(kMethodRegisterArgument));
3628}
3629
3630void InstructionCodeGeneratorARM::VisitCurrentMethod(HCurrentMethod* instruction ATTRIBUTE_UNUSED) {
3631  // Nothing to do, the method is already at its location.
3632}
3633
3634void LocationsBuilderARM::VisitNot(HNot* not_) {
3635  LocationSummary* locations =
3636      new (GetGraph()->GetArena()) LocationSummary(not_, LocationSummary::kNoCall);
3637  locations->SetInAt(0, Location::RequiresRegister());
3638  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3639}
3640
3641void InstructionCodeGeneratorARM::VisitNot(HNot* not_) {
3642  LocationSummary* locations = not_->GetLocations();
3643  Location out = locations->Out();
3644  Location in = locations->InAt(0);
3645  switch (not_->GetResultType()) {
3646    case Primitive::kPrimInt:
3647      __ mvn(out.AsRegister<Register>(), ShifterOperand(in.AsRegister<Register>()));
3648      break;
3649
3650    case Primitive::kPrimLong:
3651      __ mvn(out.AsRegisterPairLow<Register>(),
3652             ShifterOperand(in.AsRegisterPairLow<Register>()));
3653      __ mvn(out.AsRegisterPairHigh<Register>(),
3654             ShifterOperand(in.AsRegisterPairHigh<Register>()));
3655      break;
3656
3657    default:
3658      LOG(FATAL) << "Unimplemented type for not operation " << not_->GetResultType();
3659  }
3660}
3661
3662void LocationsBuilderARM::VisitBooleanNot(HBooleanNot* bool_not) {
3663  LocationSummary* locations =
3664      new (GetGraph()->GetArena()) LocationSummary(bool_not, LocationSummary::kNoCall);
3665  locations->SetInAt(0, Location::RequiresRegister());
3666  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
3667}
3668
3669void InstructionCodeGeneratorARM::VisitBooleanNot(HBooleanNot* bool_not) {
3670  LocationSummary* locations = bool_not->GetLocations();
3671  Location out = locations->Out();
3672  Location in = locations->InAt(0);
3673  __ eor(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(1));
3674}
3675
3676void LocationsBuilderARM::VisitCompare(HCompare* compare) {
3677  LocationSummary* locations =
3678      new (GetGraph()->GetArena()) LocationSummary(compare, LocationSummary::kNoCall);
3679  switch (compare->InputAt(0)->GetType()) {
3680    case Primitive::kPrimBoolean:
3681    case Primitive::kPrimByte:
3682    case Primitive::kPrimShort:
3683    case Primitive::kPrimChar:
3684    case Primitive::kPrimInt:
3685    case Primitive::kPrimLong: {
3686      locations->SetInAt(0, Location::RequiresRegister());
3687      locations->SetInAt(1, Location::RequiresRegister());
3688      // Output overlaps because it is written before doing the low comparison.
3689      locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
3690      break;
3691    }
3692    case Primitive::kPrimFloat:
3693    case Primitive::kPrimDouble: {
3694      locations->SetInAt(0, Location::RequiresFpuRegister());
3695      locations->SetInAt(1, ArithmeticZeroOrFpuRegister(compare->InputAt(1)));
3696      locations->SetOut(Location::RequiresRegister());
3697      break;
3698    }
3699    default:
3700      LOG(FATAL) << "Unexpected type for compare operation " << compare->InputAt(0)->GetType();
3701  }
3702}
3703
3704void InstructionCodeGeneratorARM::VisitCompare(HCompare* compare) {
3705  LocationSummary* locations = compare->GetLocations();
3706  Register out = locations->Out().AsRegister<Register>();
3707  Location left = locations->InAt(0);
3708  Location right = locations->InAt(1);
3709
3710  Label less, greater, done;
3711  Primitive::Type type = compare->InputAt(0)->GetType();
3712  Condition less_cond;
3713  switch (type) {
3714    case Primitive::kPrimBoolean:
3715    case Primitive::kPrimByte:
3716    case Primitive::kPrimShort:
3717    case Primitive::kPrimChar:
3718    case Primitive::kPrimInt: {
3719      __ LoadImmediate(out, 0);
3720      __ cmp(left.AsRegister<Register>(),
3721             ShifterOperand(right.AsRegister<Register>()));  // Signed compare.
3722      less_cond = LT;
3723      break;
3724    }
3725    case Primitive::kPrimLong: {
3726      __ cmp(left.AsRegisterPairHigh<Register>(),
3727             ShifterOperand(right.AsRegisterPairHigh<Register>()));  // Signed compare.
3728      __ b(&less, LT);
3729      __ b(&greater, GT);
3730      // Do LoadImmediate before the last `cmp`, as LoadImmediate might affect the status flags.
3731      __ LoadImmediate(out, 0);
3732      __ cmp(left.AsRegisterPairLow<Register>(),
3733             ShifterOperand(right.AsRegisterPairLow<Register>()));  // Unsigned compare.
3734      less_cond = LO;
3735      break;
3736    }
3737    case Primitive::kPrimFloat:
3738    case Primitive::kPrimDouble: {
3739      __ LoadImmediate(out, 0);
3740      GenerateVcmp(compare);
3741      __ vmstat();  // transfer FP status register to ARM APSR.
3742      less_cond = ARMFPCondition(kCondLT, compare->IsGtBias());
3743      break;
3744    }
3745    default:
3746      LOG(FATAL) << "Unexpected compare type " << type;
3747      UNREACHABLE();
3748  }
3749
3750  __ b(&done, EQ);
3751  __ b(&less, less_cond);
3752
3753  __ Bind(&greater);
3754  __ LoadImmediate(out, 1);
3755  __ b(&done);
3756
3757  __ Bind(&less);
3758  __ LoadImmediate(out, -1);
3759
3760  __ Bind(&done);
3761}
3762
3763void LocationsBuilderARM::VisitPhi(HPhi* instruction) {
3764  LocationSummary* locations =
3765      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3766  for (size_t i = 0, e = locations->GetInputCount(); i < e; ++i) {
3767    locations->SetInAt(i, Location::Any());
3768  }
3769  locations->SetOut(Location::Any());
3770}
3771
3772void InstructionCodeGeneratorARM::VisitPhi(HPhi* instruction ATTRIBUTE_UNUSED) {
3773  LOG(FATAL) << "Unreachable";
3774}
3775
3776void CodeGeneratorARM::GenerateMemoryBarrier(MemBarrierKind kind) {
3777  // TODO (ported from quick): revisit ARM barrier kinds.
3778  DmbOptions flavor = DmbOptions::ISH;  // Quiet C++ warnings.
3779  switch (kind) {
3780    case MemBarrierKind::kAnyStore:
3781    case MemBarrierKind::kLoadAny:
3782    case MemBarrierKind::kAnyAny: {
3783      flavor = DmbOptions::ISH;
3784      break;
3785    }
3786    case MemBarrierKind::kStoreStore: {
3787      flavor = DmbOptions::ISHST;
3788      break;
3789    }
3790    default:
3791      LOG(FATAL) << "Unexpected memory barrier " << kind;
3792  }
3793  __ dmb(flavor);
3794}
3795
3796void InstructionCodeGeneratorARM::GenerateWideAtomicLoad(Register addr,
3797                                                         uint32_t offset,
3798                                                         Register out_lo,
3799                                                         Register out_hi) {
3800  if (offset != 0) {
3801    // Ensure `out_lo` is different from `addr`, so that loading
3802    // `offset` into `out_lo` does not clutter `addr`.
3803    DCHECK_NE(out_lo, addr);
3804    __ LoadImmediate(out_lo, offset);
3805    __ add(IP, addr, ShifterOperand(out_lo));
3806    addr = IP;
3807  }
3808  __ ldrexd(out_lo, out_hi, addr);
3809}
3810
3811void InstructionCodeGeneratorARM::GenerateWideAtomicStore(Register addr,
3812                                                          uint32_t offset,
3813                                                          Register value_lo,
3814                                                          Register value_hi,
3815                                                          Register temp1,
3816                                                          Register temp2,
3817                                                          HInstruction* instruction) {
3818  Label fail;
3819  if (offset != 0) {
3820    __ LoadImmediate(temp1, offset);
3821    __ add(IP, addr, ShifterOperand(temp1));
3822    addr = IP;
3823  }
3824  __ Bind(&fail);
3825  // We need a load followed by store. (The address used in a STREX instruction must
3826  // be the same as the address in the most recently executed LDREX instruction.)
3827  __ ldrexd(temp1, temp2, addr);
3828  codegen_->MaybeRecordImplicitNullCheck(instruction);
3829  __ strexd(temp1, value_lo, value_hi, addr);
3830  __ CompareAndBranchIfNonZero(temp1, &fail);
3831}
3832
3833void LocationsBuilderARM::HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info) {
3834  DCHECK(instruction->IsInstanceFieldSet() || instruction->IsStaticFieldSet());
3835
3836  LocationSummary* locations =
3837      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
3838  locations->SetInAt(0, Location::RequiresRegister());
3839
3840  Primitive::Type field_type = field_info.GetFieldType();
3841  if (Primitive::IsFloatingPointType(field_type)) {
3842    locations->SetInAt(1, Location::RequiresFpuRegister());
3843  } else {
3844    locations->SetInAt(1, Location::RequiresRegister());
3845  }
3846
3847  bool is_wide = field_type == Primitive::kPrimLong || field_type == Primitive::kPrimDouble;
3848  bool generate_volatile = field_info.IsVolatile()
3849      && is_wide
3850      && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
3851  bool needs_write_barrier =
3852      CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1));
3853  // Temporary registers for the write barrier.
3854  // TODO: consider renaming StoreNeedsWriteBarrier to StoreNeedsGCMark.
3855  if (needs_write_barrier) {
3856    locations->AddTemp(Location::RequiresRegister());  // Possibly used for reference poisoning too.
3857    locations->AddTemp(Location::RequiresRegister());
3858  } else if (generate_volatile) {
3859    // ARM encoding have some additional constraints for ldrexd/strexd:
3860    // - registers need to be consecutive
3861    // - the first register should be even but not R14.
3862    // We don't test for ARM yet, and the assertion makes sure that we
3863    // revisit this if we ever enable ARM encoding.
3864    DCHECK_EQ(InstructionSet::kThumb2, codegen_->GetInstructionSet());
3865
3866    locations->AddTemp(Location::RequiresRegister());
3867    locations->AddTemp(Location::RequiresRegister());
3868    if (field_type == Primitive::kPrimDouble) {
3869      // For doubles we need two more registers to copy the value.
3870      locations->AddTemp(Location::RegisterLocation(R2));
3871      locations->AddTemp(Location::RegisterLocation(R3));
3872    }
3873  }
3874}
3875
3876void InstructionCodeGeneratorARM::HandleFieldSet(HInstruction* instruction,
3877                                                 const FieldInfo& field_info,
3878                                                 bool value_can_be_null) {
3879  DCHECK(instruction->IsInstanceFieldSet() || instruction->IsStaticFieldSet());
3880
3881  LocationSummary* locations = instruction->GetLocations();
3882  Register base = locations->InAt(0).AsRegister<Register>();
3883  Location value = locations->InAt(1);
3884
3885  bool is_volatile = field_info.IsVolatile();
3886  bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
3887  Primitive::Type field_type = field_info.GetFieldType();
3888  uint32_t offset = field_info.GetFieldOffset().Uint32Value();
3889  bool needs_write_barrier =
3890      CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1));
3891
3892  if (is_volatile) {
3893    codegen_->GenerateMemoryBarrier(MemBarrierKind::kAnyStore);
3894  }
3895
3896  switch (field_type) {
3897    case Primitive::kPrimBoolean:
3898    case Primitive::kPrimByte: {
3899      __ StoreToOffset(kStoreByte, value.AsRegister<Register>(), base, offset);
3900      break;
3901    }
3902
3903    case Primitive::kPrimShort:
3904    case Primitive::kPrimChar: {
3905      __ StoreToOffset(kStoreHalfword, value.AsRegister<Register>(), base, offset);
3906      break;
3907    }
3908
3909    case Primitive::kPrimInt:
3910    case Primitive::kPrimNot: {
3911      if (kPoisonHeapReferences && needs_write_barrier) {
3912        // Note that in the case where `value` is a null reference,
3913        // we do not enter this block, as a null reference does not
3914        // need poisoning.
3915        DCHECK_EQ(field_type, Primitive::kPrimNot);
3916        Register temp = locations->GetTemp(0).AsRegister<Register>();
3917        __ Mov(temp, value.AsRegister<Register>());
3918        __ PoisonHeapReference(temp);
3919        __ StoreToOffset(kStoreWord, temp, base, offset);
3920      } else {
3921        __ StoreToOffset(kStoreWord, value.AsRegister<Register>(), base, offset);
3922      }
3923      break;
3924    }
3925
3926    case Primitive::kPrimLong: {
3927      if (is_volatile && !atomic_ldrd_strd) {
3928        GenerateWideAtomicStore(base, offset,
3929                                value.AsRegisterPairLow<Register>(),
3930                                value.AsRegisterPairHigh<Register>(),
3931                                locations->GetTemp(0).AsRegister<Register>(),
3932                                locations->GetTemp(1).AsRegister<Register>(),
3933                                instruction);
3934      } else {
3935        __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), base, offset);
3936        codegen_->MaybeRecordImplicitNullCheck(instruction);
3937      }
3938      break;
3939    }
3940
3941    case Primitive::kPrimFloat: {
3942      __ StoreSToOffset(value.AsFpuRegister<SRegister>(), base, offset);
3943      break;
3944    }
3945
3946    case Primitive::kPrimDouble: {
3947      DRegister value_reg = FromLowSToD(value.AsFpuRegisterPairLow<SRegister>());
3948      if (is_volatile && !atomic_ldrd_strd) {
3949        Register value_reg_lo = locations->GetTemp(0).AsRegister<Register>();
3950        Register value_reg_hi = locations->GetTemp(1).AsRegister<Register>();
3951
3952        __ vmovrrd(value_reg_lo, value_reg_hi, value_reg);
3953
3954        GenerateWideAtomicStore(base, offset,
3955                                value_reg_lo,
3956                                value_reg_hi,
3957                                locations->GetTemp(2).AsRegister<Register>(),
3958                                locations->GetTemp(3).AsRegister<Register>(),
3959                                instruction);
3960      } else {
3961        __ StoreDToOffset(value_reg, base, offset);
3962        codegen_->MaybeRecordImplicitNullCheck(instruction);
3963      }
3964      break;
3965    }
3966
3967    case Primitive::kPrimVoid:
3968      LOG(FATAL) << "Unreachable type " << field_type;
3969      UNREACHABLE();
3970  }
3971
3972  // Longs and doubles are handled in the switch.
3973  if (field_type != Primitive::kPrimLong && field_type != Primitive::kPrimDouble) {
3974    codegen_->MaybeRecordImplicitNullCheck(instruction);
3975  }
3976
3977  if (CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1))) {
3978    Register temp = locations->GetTemp(0).AsRegister<Register>();
3979    Register card = locations->GetTemp(1).AsRegister<Register>();
3980    codegen_->MarkGCCard(
3981        temp, card, base, value.AsRegister<Register>(), value_can_be_null);
3982  }
3983
3984  if (is_volatile) {
3985    codegen_->GenerateMemoryBarrier(MemBarrierKind::kAnyAny);
3986  }
3987}
3988
3989void LocationsBuilderARM::HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info) {
3990  DCHECK(instruction->IsInstanceFieldGet() || instruction->IsStaticFieldGet());
3991
3992  bool object_field_get_with_read_barrier =
3993      kEmitCompilerReadBarrier && (field_info.GetFieldType() == Primitive::kPrimNot);
3994  LocationSummary* locations =
3995      new (GetGraph()->GetArena()) LocationSummary(instruction,
3996                                                   object_field_get_with_read_barrier ?
3997                                                       LocationSummary::kCallOnSlowPath :
3998                                                       LocationSummary::kNoCall);
3999  locations->SetInAt(0, Location::RequiresRegister());
4000
4001  bool volatile_for_double = field_info.IsVolatile()
4002      && (field_info.GetFieldType() == Primitive::kPrimDouble)
4003      && !codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
4004  // The output overlaps in case of volatile long: we don't want the
4005  // code generated by GenerateWideAtomicLoad to overwrite the
4006  // object's location.  Likewise, in the case of an object field get
4007  // with read barriers enabled, we do not want the load to overwrite
4008  // the object's location, as we need it to emit the read barrier.
4009  bool overlap = (field_info.IsVolatile() && (field_info.GetFieldType() == Primitive::kPrimLong)) ||
4010      object_field_get_with_read_barrier;
4011
4012  if (Primitive::IsFloatingPointType(instruction->GetType())) {
4013    locations->SetOut(Location::RequiresFpuRegister());
4014  } else {
4015    locations->SetOut(Location::RequiresRegister(),
4016                      (overlap ? Location::kOutputOverlap : Location::kNoOutputOverlap));
4017  }
4018  if (volatile_for_double) {
4019    // ARM encoding have some additional constraints for ldrexd/strexd:
4020    // - registers need to be consecutive
4021    // - the first register should be even but not R14.
4022    // We don't test for ARM yet, and the assertion makes sure that we
4023    // revisit this if we ever enable ARM encoding.
4024    DCHECK_EQ(InstructionSet::kThumb2, codegen_->GetInstructionSet());
4025    locations->AddTemp(Location::RequiresRegister());
4026    locations->AddTemp(Location::RequiresRegister());
4027  } else if (object_field_get_with_read_barrier && kUseBakerReadBarrier) {
4028    // We need a temporary register for the read barrier marking slow
4029    // path in CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier.
4030    locations->AddTemp(Location::RequiresRegister());
4031  }
4032}
4033
4034Location LocationsBuilderARM::ArithmeticZeroOrFpuRegister(HInstruction* input) {
4035  DCHECK(input->GetType() == Primitive::kPrimDouble || input->GetType() == Primitive::kPrimFloat)
4036      << input->GetType();
4037  if ((input->IsFloatConstant() && (input->AsFloatConstant()->IsArithmeticZero())) ||
4038      (input->IsDoubleConstant() && (input->AsDoubleConstant()->IsArithmeticZero()))) {
4039    return Location::ConstantLocation(input->AsConstant());
4040  } else {
4041    return Location::RequiresFpuRegister();
4042  }
4043}
4044
4045Location LocationsBuilderARM::ArmEncodableConstantOrRegister(HInstruction* constant,
4046                                                             Opcode opcode) {
4047  DCHECK(!Primitive::IsFloatingPointType(constant->GetType()));
4048  if (constant->IsConstant() &&
4049      CanEncodeConstantAsImmediate(constant->AsConstant(), opcode)) {
4050    return Location::ConstantLocation(constant->AsConstant());
4051  }
4052  return Location::RequiresRegister();
4053}
4054
4055bool LocationsBuilderARM::CanEncodeConstantAsImmediate(HConstant* input_cst,
4056                                                       Opcode opcode) {
4057  uint64_t value = static_cast<uint64_t>(Int64FromConstant(input_cst));
4058  if (Primitive::Is64BitType(input_cst->GetType())) {
4059    Opcode high_opcode = opcode;
4060    SetCc low_set_cc = kCcDontCare;
4061    switch (opcode) {
4062      case SUB:
4063        // Flip the operation to an ADD.
4064        value = -value;
4065        opcode = ADD;
4066        FALLTHROUGH_INTENDED;
4067      case ADD:
4068        if (Low32Bits(value) == 0u) {
4069          return CanEncodeConstantAsImmediate(High32Bits(value), opcode, kCcDontCare);
4070        }
4071        high_opcode = ADC;
4072        low_set_cc = kCcSet;
4073        break;
4074      default:
4075        break;
4076    }
4077    return CanEncodeConstantAsImmediate(Low32Bits(value), opcode, low_set_cc) &&
4078        CanEncodeConstantAsImmediate(High32Bits(value), high_opcode, kCcDontCare);
4079  } else {
4080    return CanEncodeConstantAsImmediate(Low32Bits(value), opcode);
4081  }
4082}
4083
4084bool LocationsBuilderARM::CanEncodeConstantAsImmediate(uint32_t value,
4085                                                       Opcode opcode,
4086                                                       SetCc set_cc) {
4087  ShifterOperand so;
4088  ArmAssembler* assembler = codegen_->GetAssembler();
4089  if (assembler->ShifterOperandCanHold(kNoRegister, kNoRegister, opcode, value, set_cc, &so)) {
4090    return true;
4091  }
4092  Opcode neg_opcode = kNoOperand;
4093  switch (opcode) {
4094    case AND: neg_opcode = BIC; value = ~value; break;
4095    case ORR: neg_opcode = ORN; value = ~value; break;
4096    case ADD: neg_opcode = SUB; value = -value; break;
4097    case ADC: neg_opcode = SBC; value = ~value; break;
4098    case SUB: neg_opcode = ADD; value = -value; break;
4099    case SBC: neg_opcode = ADC; value = ~value; break;
4100    default:
4101      return false;
4102  }
4103  return assembler->ShifterOperandCanHold(kNoRegister, kNoRegister, neg_opcode, value, set_cc, &so);
4104}
4105
4106void InstructionCodeGeneratorARM::HandleFieldGet(HInstruction* instruction,
4107                                                 const FieldInfo& field_info) {
4108  DCHECK(instruction->IsInstanceFieldGet() || instruction->IsStaticFieldGet());
4109
4110  LocationSummary* locations = instruction->GetLocations();
4111  Location base_loc = locations->InAt(0);
4112  Register base = base_loc.AsRegister<Register>();
4113  Location out = locations->Out();
4114  bool is_volatile = field_info.IsVolatile();
4115  bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
4116  Primitive::Type field_type = field_info.GetFieldType();
4117  uint32_t offset = field_info.GetFieldOffset().Uint32Value();
4118
4119  switch (field_type) {
4120    case Primitive::kPrimBoolean:
4121      __ LoadFromOffset(kLoadUnsignedByte, out.AsRegister<Register>(), base, offset);
4122      break;
4123
4124    case Primitive::kPrimByte:
4125      __ LoadFromOffset(kLoadSignedByte, out.AsRegister<Register>(), base, offset);
4126      break;
4127
4128    case Primitive::kPrimShort:
4129      __ LoadFromOffset(kLoadSignedHalfword, out.AsRegister<Register>(), base, offset);
4130      break;
4131
4132    case Primitive::kPrimChar:
4133      __ LoadFromOffset(kLoadUnsignedHalfword, out.AsRegister<Register>(), base, offset);
4134      break;
4135
4136    case Primitive::kPrimInt:
4137      __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), base, offset);
4138      break;
4139
4140    case Primitive::kPrimNot: {
4141      // /* HeapReference<Object> */ out = *(base + offset)
4142      if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
4143        Location temp_loc = locations->GetTemp(0);
4144        // Note that a potential implicit null check is handled in this
4145        // CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier call.
4146        codegen_->GenerateFieldLoadWithBakerReadBarrier(
4147            instruction, out, base, offset, temp_loc, /* needs_null_check */ true);
4148        if (is_volatile) {
4149          codegen_->GenerateMemoryBarrier(MemBarrierKind::kLoadAny);
4150        }
4151      } else {
4152        __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), base, offset);
4153        codegen_->MaybeRecordImplicitNullCheck(instruction);
4154        if (is_volatile) {
4155          codegen_->GenerateMemoryBarrier(MemBarrierKind::kLoadAny);
4156        }
4157        // If read barriers are enabled, emit read barriers other than
4158        // Baker's using a slow path (and also unpoison the loaded
4159        // reference, if heap poisoning is enabled).
4160        codegen_->MaybeGenerateReadBarrierSlow(instruction, out, out, base_loc, offset);
4161      }
4162      break;
4163    }
4164
4165    case Primitive::kPrimLong:
4166      if (is_volatile && !atomic_ldrd_strd) {
4167        GenerateWideAtomicLoad(base, offset,
4168                               out.AsRegisterPairLow<Register>(),
4169                               out.AsRegisterPairHigh<Register>());
4170      } else {
4171        __ LoadFromOffset(kLoadWordPair, out.AsRegisterPairLow<Register>(), base, offset);
4172      }
4173      break;
4174
4175    case Primitive::kPrimFloat:
4176      __ LoadSFromOffset(out.AsFpuRegister<SRegister>(), base, offset);
4177      break;
4178
4179    case Primitive::kPrimDouble: {
4180      DRegister out_reg = FromLowSToD(out.AsFpuRegisterPairLow<SRegister>());
4181      if (is_volatile && !atomic_ldrd_strd) {
4182        Register lo = locations->GetTemp(0).AsRegister<Register>();
4183        Register hi = locations->GetTemp(1).AsRegister<Register>();
4184        GenerateWideAtomicLoad(base, offset, lo, hi);
4185        codegen_->MaybeRecordImplicitNullCheck(instruction);
4186        __ vmovdrr(out_reg, lo, hi);
4187      } else {
4188        __ LoadDFromOffset(out_reg, base, offset);
4189        codegen_->MaybeRecordImplicitNullCheck(instruction);
4190      }
4191      break;
4192    }
4193
4194    case Primitive::kPrimVoid:
4195      LOG(FATAL) << "Unreachable type " << field_type;
4196      UNREACHABLE();
4197  }
4198
4199  if (field_type == Primitive::kPrimNot || field_type == Primitive::kPrimDouble) {
4200    // Potential implicit null checks, in the case of reference or
4201    // double fields, are handled in the previous switch statement.
4202  } else {
4203    codegen_->MaybeRecordImplicitNullCheck(instruction);
4204  }
4205
4206  if (is_volatile) {
4207    if (field_type == Primitive::kPrimNot) {
4208      // Memory barriers, in the case of references, are also handled
4209      // in the previous switch statement.
4210    } else {
4211      codegen_->GenerateMemoryBarrier(MemBarrierKind::kLoadAny);
4212    }
4213  }
4214}
4215
4216void LocationsBuilderARM::VisitInstanceFieldSet(HInstanceFieldSet* instruction) {
4217  HandleFieldSet(instruction, instruction->GetFieldInfo());
4218}
4219
4220void InstructionCodeGeneratorARM::VisitInstanceFieldSet(HInstanceFieldSet* instruction) {
4221  HandleFieldSet(instruction, instruction->GetFieldInfo(), instruction->GetValueCanBeNull());
4222}
4223
4224void LocationsBuilderARM::VisitInstanceFieldGet(HInstanceFieldGet* instruction) {
4225  HandleFieldGet(instruction, instruction->GetFieldInfo());
4226}
4227
4228void InstructionCodeGeneratorARM::VisitInstanceFieldGet(HInstanceFieldGet* instruction) {
4229  HandleFieldGet(instruction, instruction->GetFieldInfo());
4230}
4231
4232void LocationsBuilderARM::VisitStaticFieldGet(HStaticFieldGet* instruction) {
4233  HandleFieldGet(instruction, instruction->GetFieldInfo());
4234}
4235
4236void InstructionCodeGeneratorARM::VisitStaticFieldGet(HStaticFieldGet* instruction) {
4237  HandleFieldGet(instruction, instruction->GetFieldInfo());
4238}
4239
4240void LocationsBuilderARM::VisitStaticFieldSet(HStaticFieldSet* instruction) {
4241  HandleFieldSet(instruction, instruction->GetFieldInfo());
4242}
4243
4244void InstructionCodeGeneratorARM::VisitStaticFieldSet(HStaticFieldSet* instruction) {
4245  HandleFieldSet(instruction, instruction->GetFieldInfo(), instruction->GetValueCanBeNull());
4246}
4247
4248void LocationsBuilderARM::VisitUnresolvedInstanceFieldGet(
4249    HUnresolvedInstanceFieldGet* instruction) {
4250  FieldAccessCallingConventionARM calling_convention;
4251  codegen_->CreateUnresolvedFieldLocationSummary(
4252      instruction, instruction->GetFieldType(), calling_convention);
4253}
4254
4255void InstructionCodeGeneratorARM::VisitUnresolvedInstanceFieldGet(
4256    HUnresolvedInstanceFieldGet* instruction) {
4257  FieldAccessCallingConventionARM calling_convention;
4258  codegen_->GenerateUnresolvedFieldAccess(instruction,
4259                                          instruction->GetFieldType(),
4260                                          instruction->GetFieldIndex(),
4261                                          instruction->GetDexPc(),
4262                                          calling_convention);
4263}
4264
4265void LocationsBuilderARM::VisitUnresolvedInstanceFieldSet(
4266    HUnresolvedInstanceFieldSet* instruction) {
4267  FieldAccessCallingConventionARM calling_convention;
4268  codegen_->CreateUnresolvedFieldLocationSummary(
4269      instruction, instruction->GetFieldType(), calling_convention);
4270}
4271
4272void InstructionCodeGeneratorARM::VisitUnresolvedInstanceFieldSet(
4273    HUnresolvedInstanceFieldSet* instruction) {
4274  FieldAccessCallingConventionARM calling_convention;
4275  codegen_->GenerateUnresolvedFieldAccess(instruction,
4276                                          instruction->GetFieldType(),
4277                                          instruction->GetFieldIndex(),
4278                                          instruction->GetDexPc(),
4279                                          calling_convention);
4280}
4281
4282void LocationsBuilderARM::VisitUnresolvedStaticFieldGet(
4283    HUnresolvedStaticFieldGet* instruction) {
4284  FieldAccessCallingConventionARM calling_convention;
4285  codegen_->CreateUnresolvedFieldLocationSummary(
4286      instruction, instruction->GetFieldType(), calling_convention);
4287}
4288
4289void InstructionCodeGeneratorARM::VisitUnresolvedStaticFieldGet(
4290    HUnresolvedStaticFieldGet* instruction) {
4291  FieldAccessCallingConventionARM calling_convention;
4292  codegen_->GenerateUnresolvedFieldAccess(instruction,
4293                                          instruction->GetFieldType(),
4294                                          instruction->GetFieldIndex(),
4295                                          instruction->GetDexPc(),
4296                                          calling_convention);
4297}
4298
4299void LocationsBuilderARM::VisitUnresolvedStaticFieldSet(
4300    HUnresolvedStaticFieldSet* instruction) {
4301  FieldAccessCallingConventionARM calling_convention;
4302  codegen_->CreateUnresolvedFieldLocationSummary(
4303      instruction, instruction->GetFieldType(), calling_convention);
4304}
4305
4306void InstructionCodeGeneratorARM::VisitUnresolvedStaticFieldSet(
4307    HUnresolvedStaticFieldSet* instruction) {
4308  FieldAccessCallingConventionARM calling_convention;
4309  codegen_->GenerateUnresolvedFieldAccess(instruction,
4310                                          instruction->GetFieldType(),
4311                                          instruction->GetFieldIndex(),
4312                                          instruction->GetDexPc(),
4313                                          calling_convention);
4314}
4315
4316void LocationsBuilderARM::VisitNullCheck(HNullCheck* instruction) {
4317  LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock()
4318      ? LocationSummary::kCallOnSlowPath
4319      : LocationSummary::kNoCall;
4320  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
4321  locations->SetInAt(0, Location::RequiresRegister());
4322  if (instruction->HasUses()) {
4323    locations->SetOut(Location::SameAsFirstInput());
4324  }
4325}
4326
4327void CodeGeneratorARM::GenerateImplicitNullCheck(HNullCheck* instruction) {
4328  if (CanMoveNullCheckToUser(instruction)) {
4329    return;
4330  }
4331  Location obj = instruction->GetLocations()->InAt(0);
4332
4333  __ LoadFromOffset(kLoadWord, IP, obj.AsRegister<Register>(), 0);
4334  RecordPcInfo(instruction, instruction->GetDexPc());
4335}
4336
4337void CodeGeneratorARM::GenerateExplicitNullCheck(HNullCheck* instruction) {
4338  SlowPathCode* slow_path = new (GetGraph()->GetArena()) NullCheckSlowPathARM(instruction);
4339  AddSlowPath(slow_path);
4340
4341  LocationSummary* locations = instruction->GetLocations();
4342  Location obj = locations->InAt(0);
4343
4344  __ CompareAndBranchIfZero(obj.AsRegister<Register>(), slow_path->GetEntryLabel());
4345}
4346
4347void InstructionCodeGeneratorARM::VisitNullCheck(HNullCheck* instruction) {
4348  codegen_->GenerateNullCheck(instruction);
4349}
4350
4351static LoadOperandType GetLoadOperandType(Primitive::Type type) {
4352  switch (type) {
4353    case Primitive::kPrimNot:
4354      return kLoadWord;
4355    case Primitive::kPrimBoolean:
4356      return kLoadUnsignedByte;
4357    case Primitive::kPrimByte:
4358      return kLoadSignedByte;
4359    case Primitive::kPrimChar:
4360      return kLoadUnsignedHalfword;
4361    case Primitive::kPrimShort:
4362      return kLoadSignedHalfword;
4363    case Primitive::kPrimInt:
4364      return kLoadWord;
4365    case Primitive::kPrimLong:
4366      return kLoadWordPair;
4367    case Primitive::kPrimFloat:
4368      return kLoadSWord;
4369    case Primitive::kPrimDouble:
4370      return kLoadDWord;
4371    default:
4372      LOG(FATAL) << "Unreachable type " << type;
4373      UNREACHABLE();
4374  }
4375}
4376
4377static StoreOperandType GetStoreOperandType(Primitive::Type type) {
4378  switch (type) {
4379    case Primitive::kPrimNot:
4380      return kStoreWord;
4381    case Primitive::kPrimBoolean:
4382    case Primitive::kPrimByte:
4383      return kStoreByte;
4384    case Primitive::kPrimChar:
4385    case Primitive::kPrimShort:
4386      return kStoreHalfword;
4387    case Primitive::kPrimInt:
4388      return kStoreWord;
4389    case Primitive::kPrimLong:
4390      return kStoreWordPair;
4391    case Primitive::kPrimFloat:
4392      return kStoreSWord;
4393    case Primitive::kPrimDouble:
4394      return kStoreDWord;
4395    default:
4396      LOG(FATAL) << "Unreachable type " << type;
4397      UNREACHABLE();
4398  }
4399}
4400
4401void CodeGeneratorARM::LoadFromShiftedRegOffset(Primitive::Type type,
4402                                                Location out_loc,
4403                                                Register base,
4404                                                Register reg_offset,
4405                                                Condition cond) {
4406  uint32_t shift_count = Primitive::ComponentSizeShift(type);
4407  Address mem_address(base, reg_offset, Shift::LSL, shift_count);
4408
4409  switch (type) {
4410    case Primitive::kPrimByte:
4411      __ ldrsb(out_loc.AsRegister<Register>(), mem_address, cond);
4412      break;
4413    case Primitive::kPrimBoolean:
4414      __ ldrb(out_loc.AsRegister<Register>(), mem_address, cond);
4415      break;
4416    case Primitive::kPrimShort:
4417      __ ldrsh(out_loc.AsRegister<Register>(), mem_address, cond);
4418      break;
4419    case Primitive::kPrimChar:
4420      __ ldrh(out_loc.AsRegister<Register>(), mem_address, cond);
4421      break;
4422    case Primitive::kPrimNot:
4423    case Primitive::kPrimInt:
4424      __ ldr(out_loc.AsRegister<Register>(), mem_address, cond);
4425      break;
4426    // T32 doesn't support LoadFromShiftedRegOffset mem address mode for these types.
4427    case Primitive::kPrimLong:
4428    case Primitive::kPrimFloat:
4429    case Primitive::kPrimDouble:
4430    default:
4431      LOG(FATAL) << "Unreachable type " << type;
4432      UNREACHABLE();
4433  }
4434}
4435
4436void CodeGeneratorARM::StoreToShiftedRegOffset(Primitive::Type type,
4437                                               Location loc,
4438                                               Register base,
4439                                               Register reg_offset,
4440                                               Condition cond) {
4441  uint32_t shift_count = Primitive::ComponentSizeShift(type);
4442  Address mem_address(base, reg_offset, Shift::LSL, shift_count);
4443
4444  switch (type) {
4445    case Primitive::kPrimByte:
4446    case Primitive::kPrimBoolean:
4447      __ strb(loc.AsRegister<Register>(), mem_address, cond);
4448      break;
4449    case Primitive::kPrimShort:
4450    case Primitive::kPrimChar:
4451      __ strh(loc.AsRegister<Register>(), mem_address, cond);
4452      break;
4453    case Primitive::kPrimNot:
4454    case Primitive::kPrimInt:
4455      __ str(loc.AsRegister<Register>(), mem_address, cond);
4456      break;
4457    // T32 doesn't support StoreToShiftedRegOffset mem address mode for these types.
4458    case Primitive::kPrimLong:
4459    case Primitive::kPrimFloat:
4460    case Primitive::kPrimDouble:
4461    default:
4462      LOG(FATAL) << "Unreachable type " << type;
4463      UNREACHABLE();
4464  }
4465}
4466
4467void LocationsBuilderARM::VisitArrayGet(HArrayGet* instruction) {
4468  bool object_array_get_with_read_barrier =
4469      kEmitCompilerReadBarrier && (instruction->GetType() == Primitive::kPrimNot);
4470  LocationSummary* locations =
4471      new (GetGraph()->GetArena()) LocationSummary(instruction,
4472                                                   object_array_get_with_read_barrier ?
4473                                                       LocationSummary::kCallOnSlowPath :
4474                                                       LocationSummary::kNoCall);
4475  locations->SetInAt(0, Location::RequiresRegister());
4476  locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1)));
4477  if (Primitive::IsFloatingPointType(instruction->GetType())) {
4478    locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
4479  } else {
4480    // The output overlaps in the case of an object array get with
4481    // read barriers enabled: we do not want the move to overwrite the
4482    // array's location, as we need it to emit the read barrier.
4483    locations->SetOut(
4484        Location::RequiresRegister(),
4485        object_array_get_with_read_barrier ? Location::kOutputOverlap : Location::kNoOutputOverlap);
4486  }
4487  // We need a temporary register for the read barrier marking slow
4488  // path in CodeGeneratorARM::GenerateArrayLoadWithBakerReadBarrier.
4489  if (object_array_get_with_read_barrier && kUseBakerReadBarrier) {
4490    locations->AddTemp(Location::RequiresRegister());
4491  }
4492}
4493
4494void InstructionCodeGeneratorARM::VisitArrayGet(HArrayGet* instruction) {
4495  LocationSummary* locations = instruction->GetLocations();
4496  Location obj_loc = locations->InAt(0);
4497  Register obj = obj_loc.AsRegister<Register>();
4498  Location index = locations->InAt(1);
4499  Location out_loc = locations->Out();
4500  uint32_t data_offset = CodeGenerator::GetArrayDataOffset(instruction);
4501  Primitive::Type type = instruction->GetType();
4502  HInstruction* array_instr = instruction->GetArray();
4503  bool has_intermediate_address = array_instr->IsIntermediateAddress();
4504  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
4505  DCHECK(!(has_intermediate_address && kEmitCompilerReadBarrier));
4506
4507  switch (type) {
4508    case Primitive::kPrimBoolean:
4509    case Primitive::kPrimByte:
4510    case Primitive::kPrimShort:
4511    case Primitive::kPrimChar:
4512    case Primitive::kPrimInt: {
4513      if (index.IsConstant()) {
4514        int32_t const_index = index.GetConstant()->AsIntConstant()->GetValue();
4515        uint32_t full_offset = data_offset + (const_index << Primitive::ComponentSizeShift(type));
4516
4517        LoadOperandType load_type = GetLoadOperandType(type);
4518        __ LoadFromOffset(load_type, out_loc.AsRegister<Register>(), obj, full_offset);
4519      } else {
4520        Register temp = IP;
4521
4522        if (has_intermediate_address) {
4523          // We do not need to compute the intermediate address from the array: the
4524          // input instruction has done it already. See the comment in
4525          // `TryExtractArrayAccessAddress()`.
4526          if (kIsDebugBuild) {
4527            HIntermediateAddress* tmp = array_instr->AsIntermediateAddress();
4528            DCHECK_EQ(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64(), data_offset);
4529          }
4530          temp = obj;
4531        } else {
4532          __ add(temp, obj, ShifterOperand(data_offset));
4533        }
4534        codegen_->LoadFromShiftedRegOffset(type, out_loc, temp, index.AsRegister<Register>());
4535      }
4536      break;
4537    }
4538
4539    case Primitive::kPrimNot: {
4540      static_assert(
4541          sizeof(mirror::HeapReference<mirror::Object>) == sizeof(int32_t),
4542          "art::mirror::HeapReference<art::mirror::Object> and int32_t have different sizes.");
4543      // /* HeapReference<Object> */ out =
4544      //     *(obj + data_offset + index * sizeof(HeapReference<Object>))
4545      if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
4546        Location temp = locations->GetTemp(0);
4547        // Note that a potential implicit null check is handled in this
4548        // CodeGeneratorARM::GenerateArrayLoadWithBakerReadBarrier call.
4549        codegen_->GenerateArrayLoadWithBakerReadBarrier(
4550            instruction, out_loc, obj, data_offset, index, temp, /* needs_null_check */ true);
4551      } else {
4552        Register out = out_loc.AsRegister<Register>();
4553        if (index.IsConstant()) {
4554          size_t offset =
4555              (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4556          __ LoadFromOffset(kLoadWord, out, obj, offset);
4557          codegen_->MaybeRecordImplicitNullCheck(instruction);
4558          // If read barriers are enabled, emit read barriers other than
4559          // Baker's using a slow path (and also unpoison the loaded
4560          // reference, if heap poisoning is enabled).
4561          codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset);
4562        } else {
4563          Register temp = IP;
4564
4565          if (has_intermediate_address) {
4566            // We do not need to compute the intermediate address from the array: the
4567            // input instruction has done it already. See the comment in
4568            // `TryExtractArrayAccessAddress()`.
4569            if (kIsDebugBuild) {
4570              HIntermediateAddress* tmp = array_instr->AsIntermediateAddress();
4571              DCHECK_EQ(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64(), data_offset);
4572            }
4573            temp = obj;
4574          } else {
4575            __ add(temp, obj, ShifterOperand(data_offset));
4576          }
4577          codegen_->LoadFromShiftedRegOffset(type, out_loc, temp, index.AsRegister<Register>());
4578
4579          codegen_->MaybeRecordImplicitNullCheck(instruction);
4580          // If read barriers are enabled, emit read barriers other than
4581          // Baker's using a slow path (and also unpoison the loaded
4582          // reference, if heap poisoning is enabled).
4583          codegen_->MaybeGenerateReadBarrierSlow(
4584              instruction, out_loc, out_loc, obj_loc, data_offset, index);
4585        }
4586      }
4587      break;
4588    }
4589
4590    case Primitive::kPrimLong: {
4591      if (index.IsConstant()) {
4592        size_t offset =
4593            (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4594        __ LoadFromOffset(kLoadWordPair, out_loc.AsRegisterPairLow<Register>(), obj, offset);
4595      } else {
4596        __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4597        __ LoadFromOffset(kLoadWordPair, out_loc.AsRegisterPairLow<Register>(), IP, data_offset);
4598      }
4599      break;
4600    }
4601
4602    case Primitive::kPrimFloat: {
4603      SRegister out = out_loc.AsFpuRegister<SRegister>();
4604      if (index.IsConstant()) {
4605        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4606        __ LoadSFromOffset(out, obj, offset);
4607      } else {
4608        __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4));
4609        __ LoadSFromOffset(out, IP, data_offset);
4610      }
4611      break;
4612    }
4613
4614    case Primitive::kPrimDouble: {
4615      SRegister out = out_loc.AsFpuRegisterPairLow<SRegister>();
4616      if (index.IsConstant()) {
4617        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4618        __ LoadDFromOffset(FromLowSToD(out), obj, offset);
4619      } else {
4620        __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4621        __ LoadDFromOffset(FromLowSToD(out), IP, data_offset);
4622      }
4623      break;
4624    }
4625
4626    case Primitive::kPrimVoid:
4627      LOG(FATAL) << "Unreachable type " << type;
4628      UNREACHABLE();
4629  }
4630
4631  if (type == Primitive::kPrimNot) {
4632    // Potential implicit null checks, in the case of reference
4633    // arrays, are handled in the previous switch statement.
4634  } else {
4635    codegen_->MaybeRecordImplicitNullCheck(instruction);
4636  }
4637}
4638
4639void LocationsBuilderARM::VisitArraySet(HArraySet* instruction) {
4640  Primitive::Type value_type = instruction->GetComponentType();
4641
4642  bool needs_write_barrier =
4643      CodeGenerator::StoreNeedsWriteBarrier(value_type, instruction->GetValue());
4644  bool may_need_runtime_call_for_type_check = instruction->NeedsTypeCheck();
4645  bool object_array_set_with_read_barrier =
4646      kEmitCompilerReadBarrier && (value_type == Primitive::kPrimNot);
4647
4648  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(
4649      instruction,
4650      (may_need_runtime_call_for_type_check || object_array_set_with_read_barrier) ?
4651          LocationSummary::kCallOnSlowPath :
4652          LocationSummary::kNoCall);
4653
4654  locations->SetInAt(0, Location::RequiresRegister());
4655  locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1)));
4656  if (Primitive::IsFloatingPointType(value_type)) {
4657    locations->SetInAt(2, Location::RequiresFpuRegister());
4658  } else {
4659    locations->SetInAt(2, Location::RequiresRegister());
4660  }
4661  if (needs_write_barrier) {
4662    // Temporary registers for the write barrier.
4663    locations->AddTemp(Location::RequiresRegister());  // Possibly used for ref. poisoning too.
4664    locations->AddTemp(Location::RequiresRegister());
4665  }
4666}
4667
4668void InstructionCodeGeneratorARM::VisitArraySet(HArraySet* instruction) {
4669  LocationSummary* locations = instruction->GetLocations();
4670  Location array_loc = locations->InAt(0);
4671  Register array = array_loc.AsRegister<Register>();
4672  Location index = locations->InAt(1);
4673  Primitive::Type value_type = instruction->GetComponentType();
4674  bool may_need_runtime_call_for_type_check = instruction->NeedsTypeCheck();
4675  bool needs_write_barrier =
4676      CodeGenerator::StoreNeedsWriteBarrier(value_type, instruction->GetValue());
4677  uint32_t data_offset =
4678      mirror::Array::DataOffset(Primitive::ComponentSize(value_type)).Uint32Value();
4679  Location value_loc = locations->InAt(2);
4680  HInstruction* array_instr = instruction->GetArray();
4681  bool has_intermediate_address = array_instr->IsIntermediateAddress();
4682  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
4683  DCHECK(!(has_intermediate_address && kEmitCompilerReadBarrier));
4684
4685  switch (value_type) {
4686    case Primitive::kPrimBoolean:
4687    case Primitive::kPrimByte:
4688    case Primitive::kPrimShort:
4689    case Primitive::kPrimChar:
4690    case Primitive::kPrimInt: {
4691      if (index.IsConstant()) {
4692        int32_t const_index = index.GetConstant()->AsIntConstant()->GetValue();
4693        uint32_t full_offset =
4694            data_offset + (const_index << Primitive::ComponentSizeShift(value_type));
4695        StoreOperandType store_type = GetStoreOperandType(value_type);
4696        __ StoreToOffset(store_type, value_loc.AsRegister<Register>(), array, full_offset);
4697      } else {
4698        Register temp = IP;
4699
4700        if (has_intermediate_address) {
4701          // We do not need to compute the intermediate address from the array: the
4702          // input instruction has done it already. See the comment in
4703          // `TryExtractArrayAccessAddress()`.
4704          if (kIsDebugBuild) {
4705            HIntermediateAddress* tmp = array_instr->AsIntermediateAddress();
4706            DCHECK(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64() == data_offset);
4707          }
4708          temp = array;
4709        } else {
4710          __ add(temp, array, ShifterOperand(data_offset));
4711        }
4712        codegen_->StoreToShiftedRegOffset(value_type,
4713                                          value_loc,
4714                                          temp,
4715                                          index.AsRegister<Register>());
4716      }
4717      break;
4718    }
4719
4720    case Primitive::kPrimNot: {
4721      Register value = value_loc.AsRegister<Register>();
4722      // TryExtractArrayAccessAddress optimization is never applied for non-primitive ArraySet.
4723      // See the comment in instruction_simplifier_shared.cc.
4724      DCHECK(!has_intermediate_address);
4725
4726      if (instruction->InputAt(2)->IsNullConstant()) {
4727        // Just setting null.
4728        if (index.IsConstant()) {
4729          size_t offset =
4730              (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4731          __ StoreToOffset(kStoreWord, value, array, offset);
4732        } else {
4733          DCHECK(index.IsRegister()) << index;
4734          __ add(IP, array, ShifterOperand(data_offset));
4735          codegen_->StoreToShiftedRegOffset(value_type,
4736                                            value_loc,
4737                                            IP,
4738                                            index.AsRegister<Register>());
4739        }
4740        codegen_->MaybeRecordImplicitNullCheck(instruction);
4741        DCHECK(!needs_write_barrier);
4742        DCHECK(!may_need_runtime_call_for_type_check);
4743        break;
4744      }
4745
4746      DCHECK(needs_write_barrier);
4747      Register temp1 = locations->GetTemp(0).AsRegister<Register>();
4748      Register temp2 = locations->GetTemp(1).AsRegister<Register>();
4749      uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
4750      uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
4751      uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
4752      Label done;
4753      SlowPathCode* slow_path = nullptr;
4754
4755      if (may_need_runtime_call_for_type_check) {
4756        slow_path = new (GetGraph()->GetArena()) ArraySetSlowPathARM(instruction);
4757        codegen_->AddSlowPath(slow_path);
4758        if (instruction->GetValueCanBeNull()) {
4759          Label non_zero;
4760          __ CompareAndBranchIfNonZero(value, &non_zero);
4761          if (index.IsConstant()) {
4762            size_t offset =
4763               (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4764            __ StoreToOffset(kStoreWord, value, array, offset);
4765          } else {
4766            DCHECK(index.IsRegister()) << index;
4767            __ add(IP, array, ShifterOperand(data_offset));
4768            codegen_->StoreToShiftedRegOffset(value_type,
4769                                              value_loc,
4770                                              IP,
4771                                              index.AsRegister<Register>());
4772          }
4773          codegen_->MaybeRecordImplicitNullCheck(instruction);
4774          __ b(&done);
4775          __ Bind(&non_zero);
4776        }
4777
4778        if (kEmitCompilerReadBarrier) {
4779          // When read barriers are enabled, the type checking
4780          // instrumentation requires two read barriers:
4781          //
4782          //   __ Mov(temp2, temp1);
4783          //   // /* HeapReference<Class> */ temp1 = temp1->component_type_
4784          //   __ LoadFromOffset(kLoadWord, temp1, temp1, component_offset);
4785          //   codegen_->GenerateReadBarrierSlow(
4786          //       instruction, temp1_loc, temp1_loc, temp2_loc, component_offset);
4787          //
4788          //   // /* HeapReference<Class> */ temp2 = value->klass_
4789          //   __ LoadFromOffset(kLoadWord, temp2, value, class_offset);
4790          //   codegen_->GenerateReadBarrierSlow(
4791          //       instruction, temp2_loc, temp2_loc, value_loc, class_offset, temp1_loc);
4792          //
4793          //   __ cmp(temp1, ShifterOperand(temp2));
4794          //
4795          // However, the second read barrier may trash `temp`, as it
4796          // is a temporary register, and as such would not be saved
4797          // along with live registers before calling the runtime (nor
4798          // restored afterwards).  So in this case, we bail out and
4799          // delegate the work to the array set slow path.
4800          //
4801          // TODO: Extend the register allocator to support a new
4802          // "(locally) live temp" location so as to avoid always
4803          // going into the slow path when read barriers are enabled.
4804          __ b(slow_path->GetEntryLabel());
4805        } else {
4806          // /* HeapReference<Class> */ temp1 = array->klass_
4807          __ LoadFromOffset(kLoadWord, temp1, array, class_offset);
4808          codegen_->MaybeRecordImplicitNullCheck(instruction);
4809          __ MaybeUnpoisonHeapReference(temp1);
4810
4811          // /* HeapReference<Class> */ temp1 = temp1->component_type_
4812          __ LoadFromOffset(kLoadWord, temp1, temp1, component_offset);
4813          // /* HeapReference<Class> */ temp2 = value->klass_
4814          __ LoadFromOffset(kLoadWord, temp2, value, class_offset);
4815          // If heap poisoning is enabled, no need to unpoison `temp1`
4816          // nor `temp2`, as we are comparing two poisoned references.
4817          __ cmp(temp1, ShifterOperand(temp2));
4818
4819          if (instruction->StaticTypeOfArrayIsObjectArray()) {
4820            Label do_put;
4821            __ b(&do_put, EQ);
4822            // If heap poisoning is enabled, the `temp1` reference has
4823            // not been unpoisoned yet; unpoison it now.
4824            __ MaybeUnpoisonHeapReference(temp1);
4825
4826            // /* HeapReference<Class> */ temp1 = temp1->super_class_
4827            __ LoadFromOffset(kLoadWord, temp1, temp1, super_offset);
4828            // If heap poisoning is enabled, no need to unpoison
4829            // `temp1`, as we are comparing against null below.
4830            __ CompareAndBranchIfNonZero(temp1, slow_path->GetEntryLabel());
4831            __ Bind(&do_put);
4832          } else {
4833            __ b(slow_path->GetEntryLabel(), NE);
4834          }
4835        }
4836      }
4837
4838      Register source = value;
4839      if (kPoisonHeapReferences) {
4840        // Note that in the case where `value` is a null reference,
4841        // we do not enter this block, as a null reference does not
4842        // need poisoning.
4843        DCHECK_EQ(value_type, Primitive::kPrimNot);
4844        __ Mov(temp1, value);
4845        __ PoisonHeapReference(temp1);
4846        source = temp1;
4847      }
4848
4849      if (index.IsConstant()) {
4850        size_t offset =
4851            (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4852        __ StoreToOffset(kStoreWord, source, array, offset);
4853      } else {
4854        DCHECK(index.IsRegister()) << index;
4855
4856        __ add(IP, array, ShifterOperand(data_offset));
4857        codegen_->StoreToShiftedRegOffset(value_type,
4858                                          Location::RegisterLocation(source),
4859                                          IP,
4860                                          index.AsRegister<Register>());
4861      }
4862
4863      if (!may_need_runtime_call_for_type_check) {
4864        codegen_->MaybeRecordImplicitNullCheck(instruction);
4865      }
4866
4867      codegen_->MarkGCCard(temp1, temp2, array, value, instruction->GetValueCanBeNull());
4868
4869      if (done.IsLinked()) {
4870        __ Bind(&done);
4871      }
4872
4873      if (slow_path != nullptr) {
4874        __ Bind(slow_path->GetExitLabel());
4875      }
4876
4877      break;
4878    }
4879
4880    case Primitive::kPrimLong: {
4881      Location value = locations->InAt(2);
4882      if (index.IsConstant()) {
4883        size_t offset =
4884            (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4885        __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), array, offset);
4886      } else {
4887        __ add(IP, array, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4888        __ StoreToOffset(kStoreWordPair, value.AsRegisterPairLow<Register>(), IP, data_offset);
4889      }
4890      break;
4891    }
4892
4893    case Primitive::kPrimFloat: {
4894      Location value = locations->InAt(2);
4895      DCHECK(value.IsFpuRegister());
4896      if (index.IsConstant()) {
4897        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset;
4898        __ StoreSToOffset(value.AsFpuRegister<SRegister>(), array, offset);
4899      } else {
4900        __ add(IP, array, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4));
4901        __ StoreSToOffset(value.AsFpuRegister<SRegister>(), IP, data_offset);
4902      }
4903      break;
4904    }
4905
4906    case Primitive::kPrimDouble: {
4907      Location value = locations->InAt(2);
4908      DCHECK(value.IsFpuRegisterPair());
4909      if (index.IsConstant()) {
4910        size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset;
4911        __ StoreDToOffset(FromLowSToD(value.AsFpuRegisterPairLow<SRegister>()), array, offset);
4912      } else {
4913        __ add(IP, array, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8));
4914        __ StoreDToOffset(FromLowSToD(value.AsFpuRegisterPairLow<SRegister>()), IP, data_offset);
4915      }
4916
4917      break;
4918    }
4919
4920    case Primitive::kPrimVoid:
4921      LOG(FATAL) << "Unreachable type " << value_type;
4922      UNREACHABLE();
4923  }
4924
4925  // Objects are handled in the switch.
4926  if (value_type != Primitive::kPrimNot) {
4927    codegen_->MaybeRecordImplicitNullCheck(instruction);
4928  }
4929}
4930
4931void LocationsBuilderARM::VisitArrayLength(HArrayLength* instruction) {
4932  LocationSummary* locations =
4933      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
4934  locations->SetInAt(0, Location::RequiresRegister());
4935  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
4936}
4937
4938void InstructionCodeGeneratorARM::VisitArrayLength(HArrayLength* instruction) {
4939  LocationSummary* locations = instruction->GetLocations();
4940  uint32_t offset = CodeGenerator::GetArrayLengthOffset(instruction);
4941  Register obj = locations->InAt(0).AsRegister<Register>();
4942  Register out = locations->Out().AsRegister<Register>();
4943  __ LoadFromOffset(kLoadWord, out, obj, offset);
4944  codegen_->MaybeRecordImplicitNullCheck(instruction);
4945}
4946
4947void LocationsBuilderARM::VisitIntermediateAddress(HIntermediateAddress* instruction) {
4948  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
4949  DCHECK(!kEmitCompilerReadBarrier);
4950  LocationSummary* locations =
4951      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
4952
4953  locations->SetInAt(0, Location::RequiresRegister());
4954  locations->SetInAt(1, Location::RegisterOrConstant(instruction->GetOffset()));
4955  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
4956}
4957
4958void InstructionCodeGeneratorARM::VisitIntermediateAddress(HIntermediateAddress* instruction) {
4959  LocationSummary* locations = instruction->GetLocations();
4960  Location out = locations->Out();
4961  Location first = locations->InAt(0);
4962  Location second = locations->InAt(1);
4963
4964  // The read barrier instrumentation does not support the HIntermediateAddress instruction yet.
4965  DCHECK(!kEmitCompilerReadBarrier);
4966
4967  if (second.IsRegister()) {
4968    __ add(out.AsRegister<Register>(),
4969           first.AsRegister<Register>(),
4970           ShifterOperand(second.AsRegister<Register>()));
4971  } else {
4972    __ AddConstant(out.AsRegister<Register>(),
4973                   first.AsRegister<Register>(),
4974                   second.GetConstant()->AsIntConstant()->GetValue());
4975  }
4976}
4977
4978void LocationsBuilderARM::VisitBoundsCheck(HBoundsCheck* instruction) {
4979  LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock()
4980      ? LocationSummary::kCallOnSlowPath
4981      : LocationSummary::kNoCall;
4982  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
4983  locations->SetInAt(0, Location::RequiresRegister());
4984  locations->SetInAt(1, Location::RequiresRegister());
4985  if (instruction->HasUses()) {
4986    locations->SetOut(Location::SameAsFirstInput());
4987  }
4988}
4989
4990void InstructionCodeGeneratorARM::VisitBoundsCheck(HBoundsCheck* instruction) {
4991  LocationSummary* locations = instruction->GetLocations();
4992  SlowPathCode* slow_path =
4993      new (GetGraph()->GetArena()) BoundsCheckSlowPathARM(instruction);
4994  codegen_->AddSlowPath(slow_path);
4995
4996  Register index = locations->InAt(0).AsRegister<Register>();
4997  Register length = locations->InAt(1).AsRegister<Register>();
4998
4999  __ cmp(index, ShifterOperand(length));
5000  __ b(slow_path->GetEntryLabel(), HS);
5001}
5002
5003void CodeGeneratorARM::MarkGCCard(Register temp,
5004                                  Register card,
5005                                  Register object,
5006                                  Register value,
5007                                  bool can_be_null) {
5008  Label is_null;
5009  if (can_be_null) {
5010    __ CompareAndBranchIfZero(value, &is_null);
5011  }
5012  __ LoadFromOffset(kLoadWord, card, TR, Thread::CardTableOffset<kArmPointerSize>().Int32Value());
5013  __ Lsr(temp, object, gc::accounting::CardTable::kCardShift);
5014  __ strb(card, Address(card, temp));
5015  if (can_be_null) {
5016    __ Bind(&is_null);
5017  }
5018}
5019
5020void LocationsBuilderARM::VisitParallelMove(HParallelMove* instruction ATTRIBUTE_UNUSED) {
5021  LOG(FATAL) << "Unreachable";
5022}
5023
5024void InstructionCodeGeneratorARM::VisitParallelMove(HParallelMove* instruction) {
5025  codegen_->GetMoveResolver()->EmitNativeCode(instruction);
5026}
5027
5028void LocationsBuilderARM::VisitSuspendCheck(HSuspendCheck* instruction) {
5029  new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnSlowPath);
5030}
5031
5032void InstructionCodeGeneratorARM::VisitSuspendCheck(HSuspendCheck* instruction) {
5033  HBasicBlock* block = instruction->GetBlock();
5034  if (block->GetLoopInformation() != nullptr) {
5035    DCHECK(block->GetLoopInformation()->GetSuspendCheck() == instruction);
5036    // The back edge will generate the suspend check.
5037    return;
5038  }
5039  if (block->IsEntryBlock() && instruction->GetNext()->IsGoto()) {
5040    // The goto will generate the suspend check.
5041    return;
5042  }
5043  GenerateSuspendCheck(instruction, nullptr);
5044}
5045
5046void InstructionCodeGeneratorARM::GenerateSuspendCheck(HSuspendCheck* instruction,
5047                                                       HBasicBlock* successor) {
5048  SuspendCheckSlowPathARM* slow_path =
5049      down_cast<SuspendCheckSlowPathARM*>(instruction->GetSlowPath());
5050  if (slow_path == nullptr) {
5051    slow_path = new (GetGraph()->GetArena()) SuspendCheckSlowPathARM(instruction, successor);
5052    instruction->SetSlowPath(slow_path);
5053    codegen_->AddSlowPath(slow_path);
5054    if (successor != nullptr) {
5055      DCHECK(successor->IsLoopHeader());
5056      codegen_->ClearSpillSlotsFromLoopPhisInStackMap(instruction);
5057    }
5058  } else {
5059    DCHECK_EQ(slow_path->GetSuccessor(), successor);
5060  }
5061
5062  __ LoadFromOffset(
5063      kLoadUnsignedHalfword, IP, TR, Thread::ThreadFlagsOffset<kArmPointerSize>().Int32Value());
5064  if (successor == nullptr) {
5065    __ CompareAndBranchIfNonZero(IP, slow_path->GetEntryLabel());
5066    __ Bind(slow_path->GetReturnLabel());
5067  } else {
5068    __ CompareAndBranchIfZero(IP, codegen_->GetLabelOf(successor));
5069    __ b(slow_path->GetEntryLabel());
5070  }
5071}
5072
5073ArmAssembler* ParallelMoveResolverARM::GetAssembler() const {
5074  return codegen_->GetAssembler();
5075}
5076
5077void ParallelMoveResolverARM::EmitMove(size_t index) {
5078  MoveOperands* move = moves_[index];
5079  Location source = move->GetSource();
5080  Location destination = move->GetDestination();
5081
5082  if (source.IsRegister()) {
5083    if (destination.IsRegister()) {
5084      __ Mov(destination.AsRegister<Register>(), source.AsRegister<Register>());
5085    } else if (destination.IsFpuRegister()) {
5086      __ vmovsr(destination.AsFpuRegister<SRegister>(), source.AsRegister<Register>());
5087    } else {
5088      DCHECK(destination.IsStackSlot());
5089      __ StoreToOffset(kStoreWord, source.AsRegister<Register>(),
5090                       SP, destination.GetStackIndex());
5091    }
5092  } else if (source.IsStackSlot()) {
5093    if (destination.IsRegister()) {
5094      __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(),
5095                        SP, source.GetStackIndex());
5096    } else if (destination.IsFpuRegister()) {
5097      __ LoadSFromOffset(destination.AsFpuRegister<SRegister>(), SP, source.GetStackIndex());
5098    } else {
5099      DCHECK(destination.IsStackSlot());
5100      __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex());
5101      __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5102    }
5103  } else if (source.IsFpuRegister()) {
5104    if (destination.IsRegister()) {
5105      __ vmovrs(destination.AsRegister<Register>(), source.AsFpuRegister<SRegister>());
5106    } else if (destination.IsFpuRegister()) {
5107      __ vmovs(destination.AsFpuRegister<SRegister>(), source.AsFpuRegister<SRegister>());
5108    } else {
5109      DCHECK(destination.IsStackSlot());
5110      __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex());
5111    }
5112  } else if (source.IsDoubleStackSlot()) {
5113    if (destination.IsDoubleStackSlot()) {
5114      __ LoadDFromOffset(DTMP, SP, source.GetStackIndex());
5115      __ StoreDToOffset(DTMP, SP, destination.GetStackIndex());
5116    } else if (destination.IsRegisterPair()) {
5117      DCHECK(ExpectedPairLayout(destination));
5118      __ LoadFromOffset(
5119          kLoadWordPair, destination.AsRegisterPairLow<Register>(), SP, source.GetStackIndex());
5120    } else {
5121      DCHECK(destination.IsFpuRegisterPair()) << destination;
5122      __ LoadDFromOffset(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
5123                         SP,
5124                         source.GetStackIndex());
5125    }
5126  } else if (source.IsRegisterPair()) {
5127    if (destination.IsRegisterPair()) {
5128      __ Mov(destination.AsRegisterPairLow<Register>(), source.AsRegisterPairLow<Register>());
5129      __ Mov(destination.AsRegisterPairHigh<Register>(), source.AsRegisterPairHigh<Register>());
5130    } else if (destination.IsFpuRegisterPair()) {
5131      __ vmovdrr(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
5132                 source.AsRegisterPairLow<Register>(),
5133                 source.AsRegisterPairHigh<Register>());
5134    } else {
5135      DCHECK(destination.IsDoubleStackSlot()) << destination;
5136      DCHECK(ExpectedPairLayout(source));
5137      __ StoreToOffset(
5138          kStoreWordPair, source.AsRegisterPairLow<Register>(), SP, destination.GetStackIndex());
5139    }
5140  } else if (source.IsFpuRegisterPair()) {
5141    if (destination.IsRegisterPair()) {
5142      __ vmovrrd(destination.AsRegisterPairLow<Register>(),
5143                 destination.AsRegisterPairHigh<Register>(),
5144                 FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()));
5145    } else if (destination.IsFpuRegisterPair()) {
5146      __ vmovd(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()),
5147               FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()));
5148    } else {
5149      DCHECK(destination.IsDoubleStackSlot()) << destination;
5150      __ StoreDToOffset(FromLowSToD(source.AsFpuRegisterPairLow<SRegister>()),
5151                        SP,
5152                        destination.GetStackIndex());
5153    }
5154  } else {
5155    DCHECK(source.IsConstant()) << source;
5156    HConstant* constant = source.GetConstant();
5157    if (constant->IsIntConstant() || constant->IsNullConstant()) {
5158      int32_t value = CodeGenerator::GetInt32ValueOf(constant);
5159      if (destination.IsRegister()) {
5160        __ LoadImmediate(destination.AsRegister<Register>(), value);
5161      } else {
5162        DCHECK(destination.IsStackSlot());
5163        __ LoadImmediate(IP, value);
5164        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5165      }
5166    } else if (constant->IsLongConstant()) {
5167      int64_t value = constant->AsLongConstant()->GetValue();
5168      if (destination.IsRegisterPair()) {
5169        __ LoadImmediate(destination.AsRegisterPairLow<Register>(), Low32Bits(value));
5170        __ LoadImmediate(destination.AsRegisterPairHigh<Register>(), High32Bits(value));
5171      } else {
5172        DCHECK(destination.IsDoubleStackSlot()) << destination;
5173        __ LoadImmediate(IP, Low32Bits(value));
5174        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5175        __ LoadImmediate(IP, High32Bits(value));
5176        __ StoreToOffset(kStoreWord, IP, SP, destination.GetHighStackIndex(kArmWordSize));
5177      }
5178    } else if (constant->IsDoubleConstant()) {
5179      double value = constant->AsDoubleConstant()->GetValue();
5180      if (destination.IsFpuRegisterPair()) {
5181        __ LoadDImmediate(FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>()), value);
5182      } else {
5183        DCHECK(destination.IsDoubleStackSlot()) << destination;
5184        uint64_t int_value = bit_cast<uint64_t, double>(value);
5185        __ LoadImmediate(IP, Low32Bits(int_value));
5186        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5187        __ LoadImmediate(IP, High32Bits(int_value));
5188        __ StoreToOffset(kStoreWord, IP, SP, destination.GetHighStackIndex(kArmWordSize));
5189      }
5190    } else {
5191      DCHECK(constant->IsFloatConstant()) << constant->DebugName();
5192      float value = constant->AsFloatConstant()->GetValue();
5193      if (destination.IsFpuRegister()) {
5194        __ LoadSImmediate(destination.AsFpuRegister<SRegister>(), value);
5195      } else {
5196        DCHECK(destination.IsStackSlot());
5197        __ LoadImmediate(IP, bit_cast<int32_t, float>(value));
5198        __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex());
5199      }
5200    }
5201  }
5202}
5203
5204void ParallelMoveResolverARM::Exchange(Register reg, int mem) {
5205  __ Mov(IP, reg);
5206  __ LoadFromOffset(kLoadWord, reg, SP, mem);
5207  __ StoreToOffset(kStoreWord, IP, SP, mem);
5208}
5209
5210void ParallelMoveResolverARM::Exchange(int mem1, int mem2) {
5211  ScratchRegisterScope ensure_scratch(this, IP, R0, codegen_->GetNumberOfCoreRegisters());
5212  int stack_offset = ensure_scratch.IsSpilled() ? kArmWordSize : 0;
5213  __ LoadFromOffset(kLoadWord, static_cast<Register>(ensure_scratch.GetRegister()),
5214                    SP, mem1 + stack_offset);
5215  __ LoadFromOffset(kLoadWord, IP, SP, mem2 + stack_offset);
5216  __ StoreToOffset(kStoreWord, static_cast<Register>(ensure_scratch.GetRegister()),
5217                   SP, mem2 + stack_offset);
5218  __ StoreToOffset(kStoreWord, IP, SP, mem1 + stack_offset);
5219}
5220
5221void ParallelMoveResolverARM::EmitSwap(size_t index) {
5222  MoveOperands* move = moves_[index];
5223  Location source = move->GetSource();
5224  Location destination = move->GetDestination();
5225
5226  if (source.IsRegister() && destination.IsRegister()) {
5227    DCHECK_NE(source.AsRegister<Register>(), IP);
5228    DCHECK_NE(destination.AsRegister<Register>(), IP);
5229    __ Mov(IP, source.AsRegister<Register>());
5230    __ Mov(source.AsRegister<Register>(), destination.AsRegister<Register>());
5231    __ Mov(destination.AsRegister<Register>(), IP);
5232  } else if (source.IsRegister() && destination.IsStackSlot()) {
5233    Exchange(source.AsRegister<Register>(), destination.GetStackIndex());
5234  } else if (source.IsStackSlot() && destination.IsRegister()) {
5235    Exchange(destination.AsRegister<Register>(), source.GetStackIndex());
5236  } else if (source.IsStackSlot() && destination.IsStackSlot()) {
5237    Exchange(source.GetStackIndex(), destination.GetStackIndex());
5238  } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
5239    __ vmovrs(IP, source.AsFpuRegister<SRegister>());
5240    __ vmovs(source.AsFpuRegister<SRegister>(), destination.AsFpuRegister<SRegister>());
5241    __ vmovsr(destination.AsFpuRegister<SRegister>(), IP);
5242  } else if (source.IsRegisterPair() && destination.IsRegisterPair()) {
5243    __ vmovdrr(DTMP, source.AsRegisterPairLow<Register>(), source.AsRegisterPairHigh<Register>());
5244    __ Mov(source.AsRegisterPairLow<Register>(), destination.AsRegisterPairLow<Register>());
5245    __ Mov(source.AsRegisterPairHigh<Register>(), destination.AsRegisterPairHigh<Register>());
5246    __ vmovrrd(destination.AsRegisterPairLow<Register>(),
5247               destination.AsRegisterPairHigh<Register>(),
5248               DTMP);
5249  } else if (source.IsRegisterPair() || destination.IsRegisterPair()) {
5250    Register low_reg = source.IsRegisterPair()
5251        ? source.AsRegisterPairLow<Register>()
5252        : destination.AsRegisterPairLow<Register>();
5253    int mem = source.IsRegisterPair()
5254        ? destination.GetStackIndex()
5255        : source.GetStackIndex();
5256    DCHECK(ExpectedPairLayout(source.IsRegisterPair() ? source : destination));
5257    __ vmovdrr(DTMP, low_reg, static_cast<Register>(low_reg + 1));
5258    __ LoadFromOffset(kLoadWordPair, low_reg, SP, mem);
5259    __ StoreDToOffset(DTMP, SP, mem);
5260  } else if (source.IsFpuRegisterPair() && destination.IsFpuRegisterPair()) {
5261    DRegister first = FromLowSToD(source.AsFpuRegisterPairLow<SRegister>());
5262    DRegister second = FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>());
5263    __ vmovd(DTMP, first);
5264    __ vmovd(first, second);
5265    __ vmovd(second, DTMP);
5266  } else if (source.IsFpuRegisterPair() || destination.IsFpuRegisterPair()) {
5267    DRegister reg = source.IsFpuRegisterPair()
5268        ? FromLowSToD(source.AsFpuRegisterPairLow<SRegister>())
5269        : FromLowSToD(destination.AsFpuRegisterPairLow<SRegister>());
5270    int mem = source.IsFpuRegisterPair()
5271        ? destination.GetStackIndex()
5272        : source.GetStackIndex();
5273    __ vmovd(DTMP, reg);
5274    __ LoadDFromOffset(reg, SP, mem);
5275    __ StoreDToOffset(DTMP, SP, mem);
5276  } else if (source.IsFpuRegister() || destination.IsFpuRegister()) {
5277    SRegister reg = source.IsFpuRegister() ? source.AsFpuRegister<SRegister>()
5278                                           : destination.AsFpuRegister<SRegister>();
5279    int mem = source.IsFpuRegister()
5280        ? destination.GetStackIndex()
5281        : source.GetStackIndex();
5282
5283    __ vmovrs(IP, reg);
5284    __ LoadSFromOffset(reg, SP, mem);
5285    __ StoreToOffset(kStoreWord, IP, SP, mem);
5286  } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) {
5287    Exchange(source.GetStackIndex(), destination.GetStackIndex());
5288    Exchange(source.GetHighStackIndex(kArmWordSize), destination.GetHighStackIndex(kArmWordSize));
5289  } else {
5290    LOG(FATAL) << "Unimplemented" << source << " <-> " << destination;
5291  }
5292}
5293
5294void ParallelMoveResolverARM::SpillScratch(int reg) {
5295  __ Push(static_cast<Register>(reg));
5296}
5297
5298void ParallelMoveResolverARM::RestoreScratch(int reg) {
5299  __ Pop(static_cast<Register>(reg));
5300}
5301
5302HLoadClass::LoadKind CodeGeneratorARM::GetSupportedLoadClassKind(
5303    HLoadClass::LoadKind desired_class_load_kind) {
5304  if (kEmitCompilerReadBarrier) {
5305    switch (desired_class_load_kind) {
5306      case HLoadClass::LoadKind::kBootImageLinkTimeAddress:
5307      case HLoadClass::LoadKind::kBootImageLinkTimePcRelative:
5308      case HLoadClass::LoadKind::kBootImageAddress:
5309        // TODO: Implement for read barrier.
5310        return HLoadClass::LoadKind::kDexCacheViaMethod;
5311      default:
5312        break;
5313    }
5314  }
5315  switch (desired_class_load_kind) {
5316    case HLoadClass::LoadKind::kReferrersClass:
5317      break;
5318    case HLoadClass::LoadKind::kBootImageLinkTimeAddress:
5319      DCHECK(!GetCompilerOptions().GetCompilePic());
5320      break;
5321    case HLoadClass::LoadKind::kBootImageLinkTimePcRelative:
5322      DCHECK(GetCompilerOptions().GetCompilePic());
5323      break;
5324    case HLoadClass::LoadKind::kBootImageAddress:
5325      break;
5326    case HLoadClass::LoadKind::kDexCacheAddress:
5327      DCHECK(Runtime::Current()->UseJitCompilation());
5328      break;
5329    case HLoadClass::LoadKind::kDexCachePcRelative:
5330      DCHECK(!Runtime::Current()->UseJitCompilation());
5331      // We disable pc-relative load when there is an irreducible loop, as the optimization
5332      // is incompatible with it.
5333      // TODO: Create as many ArmDexCacheArraysBase instructions as needed for methods
5334      // with irreducible loops.
5335      if (GetGraph()->HasIrreducibleLoops()) {
5336        return HLoadClass::LoadKind::kDexCacheViaMethod;
5337      }
5338      break;
5339    case HLoadClass::LoadKind::kDexCacheViaMethod:
5340      break;
5341  }
5342  return desired_class_load_kind;
5343}
5344
5345void LocationsBuilderARM::VisitLoadClass(HLoadClass* cls) {
5346  if (cls->NeedsAccessCheck()) {
5347    InvokeRuntimeCallingConvention calling_convention;
5348    CodeGenerator::CreateLoadClassLocationSummary(
5349        cls,
5350        Location::RegisterLocation(calling_convention.GetRegisterAt(0)),
5351        Location::RegisterLocation(R0),
5352        /* code_generator_supports_read_barrier */ true);
5353    return;
5354  }
5355
5356  LocationSummary::CallKind call_kind = (cls->NeedsEnvironment() || kEmitCompilerReadBarrier)
5357      ? LocationSummary::kCallOnSlowPath
5358      : LocationSummary::kNoCall;
5359  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(cls, call_kind);
5360  HLoadClass::LoadKind load_kind = cls->GetLoadKind();
5361  if (load_kind == HLoadClass::LoadKind::kReferrersClass ||
5362      load_kind == HLoadClass::LoadKind::kDexCacheViaMethod ||
5363      load_kind == HLoadClass::LoadKind::kDexCachePcRelative) {
5364    locations->SetInAt(0, Location::RequiresRegister());
5365  }
5366  locations->SetOut(Location::RequiresRegister());
5367}
5368
5369void InstructionCodeGeneratorARM::VisitLoadClass(HLoadClass* cls) {
5370  LocationSummary* locations = cls->GetLocations();
5371  if (cls->NeedsAccessCheck()) {
5372    codegen_->MoveConstant(locations->GetTemp(0), cls->GetTypeIndex());
5373    codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pInitializeTypeAndVerifyAccess),
5374                            cls,
5375                            cls->GetDexPc(),
5376                            nullptr);
5377    CheckEntrypointTypes<kQuickInitializeTypeAndVerifyAccess, void*, uint32_t>();
5378    return;
5379  }
5380
5381  Location out_loc = locations->Out();
5382  Register out = out_loc.AsRegister<Register>();
5383
5384  bool generate_null_check = false;
5385  switch (cls->GetLoadKind()) {
5386    case HLoadClass::LoadKind::kReferrersClass: {
5387      DCHECK(!cls->CanCallRuntime());
5388      DCHECK(!cls->MustGenerateClinitCheck());
5389      // /* GcRoot<mirror::Class> */ out = current_method->declaring_class_
5390      Register current_method = locations->InAt(0).AsRegister<Register>();
5391      GenerateGcRootFieldLoad(
5392          cls, out_loc, current_method, ArtMethod::DeclaringClassOffset().Int32Value());
5393      break;
5394    }
5395    case HLoadClass::LoadKind::kBootImageLinkTimeAddress: {
5396      DCHECK(!kEmitCompilerReadBarrier);
5397      __ LoadLiteral(out, codegen_->DeduplicateBootImageTypeLiteral(cls->GetDexFile(),
5398                                                                    cls->GetTypeIndex()));
5399      break;
5400    }
5401    case HLoadClass::LoadKind::kBootImageLinkTimePcRelative: {
5402      DCHECK(!kEmitCompilerReadBarrier);
5403      CodeGeneratorARM::PcRelativePatchInfo* labels =
5404          codegen_->NewPcRelativeTypePatch(cls->GetDexFile(), cls->GetTypeIndex());
5405      __ BindTrackedLabel(&labels->movw_label);
5406      __ movw(out, /* placeholder */ 0u);
5407      __ BindTrackedLabel(&labels->movt_label);
5408      __ movt(out, /* placeholder */ 0u);
5409      __ BindTrackedLabel(&labels->add_pc_label);
5410      __ add(out, out, ShifterOperand(PC));
5411      break;
5412    }
5413    case HLoadClass::LoadKind::kBootImageAddress: {
5414      DCHECK(!kEmitCompilerReadBarrier);
5415      DCHECK_NE(cls->GetAddress(), 0u);
5416      uint32_t address = dchecked_integral_cast<uint32_t>(cls->GetAddress());
5417      __ LoadLiteral(out, codegen_->DeduplicateBootImageAddressLiteral(address));
5418      break;
5419    }
5420    case HLoadClass::LoadKind::kDexCacheAddress: {
5421      DCHECK_NE(cls->GetAddress(), 0u);
5422      uint32_t address = dchecked_integral_cast<uint32_t>(cls->GetAddress());
5423      // 16-bit LDR immediate has a 5-bit offset multiplied by the size and that gives
5424      // a 128B range. To try and reduce the number of literals if we load multiple types,
5425      // simply split the dex cache address to a 128B aligned base loaded from a literal
5426      // and the remaining offset embedded in the load.
5427      static_assert(sizeof(GcRoot<mirror::Class>) == 4u, "Expected GC root to be 4 bytes.");
5428      DCHECK_ALIGNED(cls->GetAddress(), 4u);
5429      constexpr size_t offset_bits = /* encoded bits */ 5 + /* scale */ 2;
5430      uint32_t base_address = address & ~MaxInt<uint32_t>(offset_bits);
5431      uint32_t offset = address & MaxInt<uint32_t>(offset_bits);
5432      __ LoadLiteral(out, codegen_->DeduplicateDexCacheAddressLiteral(base_address));
5433      // /* GcRoot<mirror::Class> */ out = *(base_address + offset)
5434      GenerateGcRootFieldLoad(cls, out_loc, out, offset);
5435      generate_null_check = !cls->IsInDexCache();
5436      break;
5437    }
5438    case HLoadClass::LoadKind::kDexCachePcRelative: {
5439      Register base_reg = locations->InAt(0).AsRegister<Register>();
5440      HArmDexCacheArraysBase* base = cls->InputAt(0)->AsArmDexCacheArraysBase();
5441      int32_t offset = cls->GetDexCacheElementOffset() - base->GetElementOffset();
5442      // /* GcRoot<mirror::Class> */ out = *(dex_cache_arrays_base + offset)
5443      GenerateGcRootFieldLoad(cls, out_loc, base_reg, offset);
5444      generate_null_check = !cls->IsInDexCache();
5445      break;
5446    }
5447    case HLoadClass::LoadKind::kDexCacheViaMethod: {
5448      // /* GcRoot<mirror::Class>[] */ out =
5449      //        current_method.ptr_sized_fields_->dex_cache_resolved_types_
5450      Register current_method = locations->InAt(0).AsRegister<Register>();
5451      __ LoadFromOffset(kLoadWord,
5452                        out,
5453                        current_method,
5454                        ArtMethod::DexCacheResolvedTypesOffset(kArmPointerSize).Int32Value());
5455      // /* GcRoot<mirror::Class> */ out = out[type_index]
5456      size_t offset = CodeGenerator::GetCacheOffset(cls->GetTypeIndex());
5457      GenerateGcRootFieldLoad(cls, out_loc, out, offset);
5458      generate_null_check = !cls->IsInDexCache();
5459    }
5460  }
5461
5462  if (generate_null_check || cls->MustGenerateClinitCheck()) {
5463    DCHECK(cls->CanCallRuntime());
5464    SlowPathCode* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathARM(
5465        cls, cls, cls->GetDexPc(), cls->MustGenerateClinitCheck());
5466    codegen_->AddSlowPath(slow_path);
5467    if (generate_null_check) {
5468      __ CompareAndBranchIfZero(out, slow_path->GetEntryLabel());
5469    }
5470    if (cls->MustGenerateClinitCheck()) {
5471      GenerateClassInitializationCheck(slow_path, out);
5472    } else {
5473      __ Bind(slow_path->GetExitLabel());
5474    }
5475  }
5476}
5477
5478void LocationsBuilderARM::VisitClinitCheck(HClinitCheck* check) {
5479  LocationSummary* locations =
5480      new (GetGraph()->GetArena()) LocationSummary(check, LocationSummary::kCallOnSlowPath);
5481  locations->SetInAt(0, Location::RequiresRegister());
5482  if (check->HasUses()) {
5483    locations->SetOut(Location::SameAsFirstInput());
5484  }
5485}
5486
5487void InstructionCodeGeneratorARM::VisitClinitCheck(HClinitCheck* check) {
5488  // We assume the class is not null.
5489  SlowPathCode* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathARM(
5490      check->GetLoadClass(), check, check->GetDexPc(), true);
5491  codegen_->AddSlowPath(slow_path);
5492  GenerateClassInitializationCheck(slow_path,
5493                                   check->GetLocations()->InAt(0).AsRegister<Register>());
5494}
5495
5496void InstructionCodeGeneratorARM::GenerateClassInitializationCheck(
5497    SlowPathCode* slow_path, Register class_reg) {
5498  __ LoadFromOffset(kLoadWord, IP, class_reg, mirror::Class::StatusOffset().Int32Value());
5499  __ cmp(IP, ShifterOperand(mirror::Class::kStatusInitialized));
5500  __ b(slow_path->GetEntryLabel(), LT);
5501  // Even if the initialized flag is set, we may be in a situation where caches are not synced
5502  // properly. Therefore, we do a memory fence.
5503  __ dmb(ISH);
5504  __ Bind(slow_path->GetExitLabel());
5505}
5506
5507HLoadString::LoadKind CodeGeneratorARM::GetSupportedLoadStringKind(
5508    HLoadString::LoadKind desired_string_load_kind) {
5509  if (kEmitCompilerReadBarrier) {
5510    switch (desired_string_load_kind) {
5511      case HLoadString::LoadKind::kBootImageLinkTimeAddress:
5512      case HLoadString::LoadKind::kBootImageLinkTimePcRelative:
5513      case HLoadString::LoadKind::kBootImageAddress:
5514        // TODO: Implement for read barrier.
5515        return HLoadString::LoadKind::kDexCacheViaMethod;
5516      default:
5517        break;
5518    }
5519  }
5520  switch (desired_string_load_kind) {
5521    case HLoadString::LoadKind::kBootImageLinkTimeAddress:
5522      DCHECK(!GetCompilerOptions().GetCompilePic());
5523      break;
5524    case HLoadString::LoadKind::kBootImageLinkTimePcRelative:
5525      DCHECK(GetCompilerOptions().GetCompilePic());
5526      break;
5527    case HLoadString::LoadKind::kBootImageAddress:
5528      break;
5529    case HLoadString::LoadKind::kDexCacheAddress:
5530      DCHECK(Runtime::Current()->UseJitCompilation());
5531      break;
5532    case HLoadString::LoadKind::kDexCachePcRelative:
5533      DCHECK(!Runtime::Current()->UseJitCompilation());
5534      // We disable pc-relative load when there is an irreducible loop, as the optimization
5535      // is incompatible with it.
5536      // TODO: Create as many ArmDexCacheArraysBase instructions as needed for methods
5537      // with irreducible loops.
5538      if (GetGraph()->HasIrreducibleLoops()) {
5539        return HLoadString::LoadKind::kDexCacheViaMethod;
5540      }
5541      break;
5542    case HLoadString::LoadKind::kDexCacheViaMethod:
5543      break;
5544  }
5545  return desired_string_load_kind;
5546}
5547
5548void LocationsBuilderARM::VisitLoadString(HLoadString* load) {
5549  LocationSummary::CallKind call_kind = (load->NeedsEnvironment() || kEmitCompilerReadBarrier)
5550      ? LocationSummary::kCallOnSlowPath
5551      : LocationSummary::kNoCall;
5552  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(load, call_kind);
5553  HLoadString::LoadKind load_kind = load->GetLoadKind();
5554  if (load_kind == HLoadString::LoadKind::kDexCacheViaMethod ||
5555      load_kind == HLoadString::LoadKind::kDexCachePcRelative) {
5556    locations->SetInAt(0, Location::RequiresRegister());
5557  }
5558  locations->SetOut(Location::RequiresRegister());
5559}
5560
5561void InstructionCodeGeneratorARM::VisitLoadString(HLoadString* load) {
5562  LocationSummary* locations = load->GetLocations();
5563  Location out_loc = locations->Out();
5564  Register out = out_loc.AsRegister<Register>();
5565
5566  switch (load->GetLoadKind()) {
5567    case HLoadString::LoadKind::kBootImageLinkTimeAddress: {
5568      DCHECK(!kEmitCompilerReadBarrier);
5569      __ LoadLiteral(out, codegen_->DeduplicateBootImageStringLiteral(load->GetDexFile(),
5570                                                                      load->GetStringIndex()));
5571      return;  // No dex cache slow path.
5572    }
5573    case HLoadString::LoadKind::kBootImageLinkTimePcRelative: {
5574      DCHECK(!kEmitCompilerReadBarrier);
5575      CodeGeneratorARM::PcRelativePatchInfo* labels =
5576          codegen_->NewPcRelativeStringPatch(load->GetDexFile(), load->GetStringIndex());
5577      __ BindTrackedLabel(&labels->movw_label);
5578      __ movw(out, /* placeholder */ 0u);
5579      __ BindTrackedLabel(&labels->movt_label);
5580      __ movt(out, /* placeholder */ 0u);
5581      __ BindTrackedLabel(&labels->add_pc_label);
5582      __ add(out, out, ShifterOperand(PC));
5583      return;  // No dex cache slow path.
5584    }
5585    case HLoadString::LoadKind::kBootImageAddress: {
5586      DCHECK(!kEmitCompilerReadBarrier);
5587      DCHECK_NE(load->GetAddress(), 0u);
5588      uint32_t address = dchecked_integral_cast<uint32_t>(load->GetAddress());
5589      __ LoadLiteral(out, codegen_->DeduplicateBootImageAddressLiteral(address));
5590      return;  // No dex cache slow path.
5591    }
5592    default:
5593      break;
5594  }
5595
5596  // TODO: Re-add the compiler code to do string dex cache lookup again.
5597  SlowPathCode* slow_path = new (GetGraph()->GetArena()) LoadStringSlowPathARM(load);
5598  codegen_->AddSlowPath(slow_path);
5599  __ b(slow_path->GetEntryLabel());
5600  __ Bind(slow_path->GetExitLabel());
5601}
5602
5603static int32_t GetExceptionTlsOffset() {
5604  return Thread::ExceptionOffset<kArmPointerSize>().Int32Value();
5605}
5606
5607void LocationsBuilderARM::VisitLoadException(HLoadException* load) {
5608  LocationSummary* locations =
5609      new (GetGraph()->GetArena()) LocationSummary(load, LocationSummary::kNoCall);
5610  locations->SetOut(Location::RequiresRegister());
5611}
5612
5613void InstructionCodeGeneratorARM::VisitLoadException(HLoadException* load) {
5614  Register out = load->GetLocations()->Out().AsRegister<Register>();
5615  __ LoadFromOffset(kLoadWord, out, TR, GetExceptionTlsOffset());
5616}
5617
5618void LocationsBuilderARM::VisitClearException(HClearException* clear) {
5619  new (GetGraph()->GetArena()) LocationSummary(clear, LocationSummary::kNoCall);
5620}
5621
5622void InstructionCodeGeneratorARM::VisitClearException(HClearException* clear ATTRIBUTE_UNUSED) {
5623  __ LoadImmediate(IP, 0);
5624  __ StoreToOffset(kStoreWord, IP, TR, GetExceptionTlsOffset());
5625}
5626
5627void LocationsBuilderARM::VisitThrow(HThrow* instruction) {
5628  LocationSummary* locations =
5629      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
5630  InvokeRuntimeCallingConvention calling_convention;
5631  locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
5632}
5633
5634void InstructionCodeGeneratorARM::VisitThrow(HThrow* instruction) {
5635  codegen_->InvokeRuntime(
5636      QUICK_ENTRY_POINT(pDeliverException), instruction, instruction->GetDexPc(), nullptr);
5637  CheckEntrypointTypes<kQuickDeliverException, void, mirror::Object*>();
5638}
5639
5640static bool TypeCheckNeedsATemporary(TypeCheckKind type_check_kind) {
5641  return kEmitCompilerReadBarrier &&
5642      (kUseBakerReadBarrier ||
5643       type_check_kind == TypeCheckKind::kAbstractClassCheck ||
5644       type_check_kind == TypeCheckKind::kClassHierarchyCheck ||
5645       type_check_kind == TypeCheckKind::kArrayObjectCheck);
5646}
5647
5648void LocationsBuilderARM::VisitInstanceOf(HInstanceOf* instruction) {
5649  LocationSummary::CallKind call_kind = LocationSummary::kNoCall;
5650  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5651  switch (type_check_kind) {
5652    case TypeCheckKind::kExactCheck:
5653    case TypeCheckKind::kAbstractClassCheck:
5654    case TypeCheckKind::kClassHierarchyCheck:
5655    case TypeCheckKind::kArrayObjectCheck:
5656      call_kind =
5657          kEmitCompilerReadBarrier ? LocationSummary::kCallOnSlowPath : LocationSummary::kNoCall;
5658      break;
5659    case TypeCheckKind::kArrayCheck:
5660    case TypeCheckKind::kUnresolvedCheck:
5661    case TypeCheckKind::kInterfaceCheck:
5662      call_kind = LocationSummary::kCallOnSlowPath;
5663      break;
5664  }
5665
5666  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
5667  locations->SetInAt(0, Location::RequiresRegister());
5668  locations->SetInAt(1, Location::RequiresRegister());
5669  // The "out" register is used as a temporary, so it overlaps with the inputs.
5670  // Note that TypeCheckSlowPathARM uses this register too.
5671  locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
5672  // When read barriers are enabled, we need a temporary register for
5673  // some cases.
5674  if (TypeCheckNeedsATemporary(type_check_kind)) {
5675    locations->AddTemp(Location::RequiresRegister());
5676  }
5677}
5678
5679void InstructionCodeGeneratorARM::VisitInstanceOf(HInstanceOf* instruction) {
5680  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5681  LocationSummary* locations = instruction->GetLocations();
5682  Location obj_loc = locations->InAt(0);
5683  Register obj = obj_loc.AsRegister<Register>();
5684  Register cls = locations->InAt(1).AsRegister<Register>();
5685  Location out_loc = locations->Out();
5686  Register out = out_loc.AsRegister<Register>();
5687  Location maybe_temp_loc = TypeCheckNeedsATemporary(type_check_kind) ?
5688      locations->GetTemp(0) :
5689      Location::NoLocation();
5690  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
5691  uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
5692  uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
5693  uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
5694  Label done, zero;
5695  SlowPathCode* slow_path = nullptr;
5696
5697  // Return 0 if `obj` is null.
5698  // avoid null check if we know obj is not null.
5699  if (instruction->MustDoNullCheck()) {
5700    __ CompareAndBranchIfZero(obj, &zero);
5701  }
5702
5703  // /* HeapReference<Class> */ out = obj->klass_
5704  GenerateReferenceLoadTwoRegisters(instruction, out_loc, obj_loc, class_offset, maybe_temp_loc);
5705
5706  switch (type_check_kind) {
5707    case TypeCheckKind::kExactCheck: {
5708      __ cmp(out, ShifterOperand(cls));
5709      // Classes must be equal for the instanceof to succeed.
5710      __ b(&zero, NE);
5711      __ LoadImmediate(out, 1);
5712      __ b(&done);
5713      break;
5714    }
5715
5716    case TypeCheckKind::kAbstractClassCheck: {
5717      // If the class is abstract, we eagerly fetch the super class of the
5718      // object to avoid doing a comparison we know will fail.
5719      Label loop;
5720      __ Bind(&loop);
5721      // /* HeapReference<Class> */ out = out->super_class_
5722      GenerateReferenceLoadOneRegister(instruction, out_loc, super_offset, maybe_temp_loc);
5723      // If `out` is null, we use it for the result, and jump to `done`.
5724      __ CompareAndBranchIfZero(out, &done);
5725      __ cmp(out, ShifterOperand(cls));
5726      __ b(&loop, NE);
5727      __ LoadImmediate(out, 1);
5728      if (zero.IsLinked()) {
5729        __ b(&done);
5730      }
5731      break;
5732    }
5733
5734    case TypeCheckKind::kClassHierarchyCheck: {
5735      // Walk over the class hierarchy to find a match.
5736      Label loop, success;
5737      __ Bind(&loop);
5738      __ cmp(out, ShifterOperand(cls));
5739      __ b(&success, EQ);
5740      // /* HeapReference<Class> */ out = out->super_class_
5741      GenerateReferenceLoadOneRegister(instruction, out_loc, super_offset, maybe_temp_loc);
5742      __ CompareAndBranchIfNonZero(out, &loop);
5743      // If `out` is null, we use it for the result, and jump to `done`.
5744      __ b(&done);
5745      __ Bind(&success);
5746      __ LoadImmediate(out, 1);
5747      if (zero.IsLinked()) {
5748        __ b(&done);
5749      }
5750      break;
5751    }
5752
5753    case TypeCheckKind::kArrayObjectCheck: {
5754      // Do an exact check.
5755      Label exact_check;
5756      __ cmp(out, ShifterOperand(cls));
5757      __ b(&exact_check, EQ);
5758      // Otherwise, we need to check that the object's class is a non-primitive array.
5759      // /* HeapReference<Class> */ out = out->component_type_
5760      GenerateReferenceLoadOneRegister(instruction, out_loc, component_offset, maybe_temp_loc);
5761      // If `out` is null, we use it for the result, and jump to `done`.
5762      __ CompareAndBranchIfZero(out, &done);
5763      __ LoadFromOffset(kLoadUnsignedHalfword, out, out, primitive_offset);
5764      static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
5765      __ CompareAndBranchIfNonZero(out, &zero);
5766      __ Bind(&exact_check);
5767      __ LoadImmediate(out, 1);
5768      __ b(&done);
5769      break;
5770    }
5771
5772    case TypeCheckKind::kArrayCheck: {
5773      __ cmp(out, ShifterOperand(cls));
5774      DCHECK(locations->OnlyCallsOnSlowPath());
5775      slow_path = new (GetGraph()->GetArena()) TypeCheckSlowPathARM(instruction,
5776                                                                    /* is_fatal */ false);
5777      codegen_->AddSlowPath(slow_path);
5778      __ b(slow_path->GetEntryLabel(), NE);
5779      __ LoadImmediate(out, 1);
5780      if (zero.IsLinked()) {
5781        __ b(&done);
5782      }
5783      break;
5784    }
5785
5786    case TypeCheckKind::kUnresolvedCheck:
5787    case TypeCheckKind::kInterfaceCheck: {
5788      // Note that we indeed only call on slow path, but we always go
5789      // into the slow path for the unresolved and interface check
5790      // cases.
5791      //
5792      // We cannot directly call the InstanceofNonTrivial runtime
5793      // entry point without resorting to a type checking slow path
5794      // here (i.e. by calling InvokeRuntime directly), as it would
5795      // require to assign fixed registers for the inputs of this
5796      // HInstanceOf instruction (following the runtime calling
5797      // convention), which might be cluttered by the potential first
5798      // read barrier emission at the beginning of this method.
5799      //
5800      // TODO: Introduce a new runtime entry point taking the object
5801      // to test (instead of its class) as argument, and let it deal
5802      // with the read barrier issues. This will let us refactor this
5803      // case of the `switch` code as it was previously (with a direct
5804      // call to the runtime not using a type checking slow path).
5805      // This should also be beneficial for the other cases above.
5806      DCHECK(locations->OnlyCallsOnSlowPath());
5807      slow_path = new (GetGraph()->GetArena()) TypeCheckSlowPathARM(instruction,
5808                                                                    /* is_fatal */ false);
5809      codegen_->AddSlowPath(slow_path);
5810      __ b(slow_path->GetEntryLabel());
5811      if (zero.IsLinked()) {
5812        __ b(&done);
5813      }
5814      break;
5815    }
5816  }
5817
5818  if (zero.IsLinked()) {
5819    __ Bind(&zero);
5820    __ LoadImmediate(out, 0);
5821  }
5822
5823  if (done.IsLinked()) {
5824    __ Bind(&done);
5825  }
5826
5827  if (slow_path != nullptr) {
5828    __ Bind(slow_path->GetExitLabel());
5829  }
5830}
5831
5832void LocationsBuilderARM::VisitCheckCast(HCheckCast* instruction) {
5833  LocationSummary::CallKind call_kind = LocationSummary::kNoCall;
5834  bool throws_into_catch = instruction->CanThrowIntoCatchBlock();
5835
5836  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5837  switch (type_check_kind) {
5838    case TypeCheckKind::kExactCheck:
5839    case TypeCheckKind::kAbstractClassCheck:
5840    case TypeCheckKind::kClassHierarchyCheck:
5841    case TypeCheckKind::kArrayObjectCheck:
5842      call_kind = (throws_into_catch || kEmitCompilerReadBarrier) ?
5843          LocationSummary::kCallOnSlowPath :
5844          LocationSummary::kNoCall;  // In fact, call on a fatal (non-returning) slow path.
5845      break;
5846    case TypeCheckKind::kArrayCheck:
5847    case TypeCheckKind::kUnresolvedCheck:
5848    case TypeCheckKind::kInterfaceCheck:
5849      call_kind = LocationSummary::kCallOnSlowPath;
5850      break;
5851  }
5852
5853  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind);
5854  locations->SetInAt(0, Location::RequiresRegister());
5855  locations->SetInAt(1, Location::RequiresRegister());
5856  // Note that TypeCheckSlowPathARM uses this "temp" register too.
5857  locations->AddTemp(Location::RequiresRegister());
5858  // When read barriers are enabled, we need an additional temporary
5859  // register for some cases.
5860  if (TypeCheckNeedsATemporary(type_check_kind)) {
5861    locations->AddTemp(Location::RequiresRegister());
5862  }
5863}
5864
5865void InstructionCodeGeneratorARM::VisitCheckCast(HCheckCast* instruction) {
5866  TypeCheckKind type_check_kind = instruction->GetTypeCheckKind();
5867  LocationSummary* locations = instruction->GetLocations();
5868  Location obj_loc = locations->InAt(0);
5869  Register obj = obj_loc.AsRegister<Register>();
5870  Register cls = locations->InAt(1).AsRegister<Register>();
5871  Location temp_loc = locations->GetTemp(0);
5872  Register temp = temp_loc.AsRegister<Register>();
5873  Location maybe_temp2_loc = TypeCheckNeedsATemporary(type_check_kind) ?
5874      locations->GetTemp(1) :
5875      Location::NoLocation();
5876  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
5877  uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
5878  uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
5879  uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
5880
5881  bool is_type_check_slow_path_fatal =
5882      (type_check_kind == TypeCheckKind::kExactCheck ||
5883       type_check_kind == TypeCheckKind::kAbstractClassCheck ||
5884       type_check_kind == TypeCheckKind::kClassHierarchyCheck ||
5885       type_check_kind == TypeCheckKind::kArrayObjectCheck) &&
5886      !instruction->CanThrowIntoCatchBlock();
5887  SlowPathCode* type_check_slow_path =
5888      new (GetGraph()->GetArena()) TypeCheckSlowPathARM(instruction,
5889                                                        is_type_check_slow_path_fatal);
5890  codegen_->AddSlowPath(type_check_slow_path);
5891
5892  Label done;
5893  // Avoid null check if we know obj is not null.
5894  if (instruction->MustDoNullCheck()) {
5895    __ CompareAndBranchIfZero(obj, &done);
5896  }
5897
5898  // /* HeapReference<Class> */ temp = obj->klass_
5899  GenerateReferenceLoadTwoRegisters(instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
5900
5901  switch (type_check_kind) {
5902    case TypeCheckKind::kExactCheck:
5903    case TypeCheckKind::kArrayCheck: {
5904      __ cmp(temp, ShifterOperand(cls));
5905      // Jump to slow path for throwing the exception or doing a
5906      // more involved array check.
5907      __ b(type_check_slow_path->GetEntryLabel(), NE);
5908      break;
5909    }
5910
5911    case TypeCheckKind::kAbstractClassCheck: {
5912      // If the class is abstract, we eagerly fetch the super class of the
5913      // object to avoid doing a comparison we know will fail.
5914      Label loop, compare_classes;
5915      __ Bind(&loop);
5916      // /* HeapReference<Class> */ temp = temp->super_class_
5917      GenerateReferenceLoadOneRegister(instruction, temp_loc, super_offset, maybe_temp2_loc);
5918
5919      // If the class reference currently in `temp` is not null, jump
5920      // to the `compare_classes` label to compare it with the checked
5921      // class.
5922      __ CompareAndBranchIfNonZero(temp, &compare_classes);
5923      // Otherwise, jump to the slow path to throw the exception.
5924      //
5925      // But before, move back the object's class into `temp` before
5926      // going into the slow path, as it has been overwritten in the
5927      // meantime.
5928      // /* HeapReference<Class> */ temp = obj->klass_
5929      GenerateReferenceLoadTwoRegisters(
5930          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
5931      __ b(type_check_slow_path->GetEntryLabel());
5932
5933      __ Bind(&compare_classes);
5934      __ cmp(temp, ShifterOperand(cls));
5935      __ b(&loop, NE);
5936      break;
5937    }
5938
5939    case TypeCheckKind::kClassHierarchyCheck: {
5940      // Walk over the class hierarchy to find a match.
5941      Label loop;
5942      __ Bind(&loop);
5943      __ cmp(temp, ShifterOperand(cls));
5944      __ b(&done, EQ);
5945
5946      // /* HeapReference<Class> */ temp = temp->super_class_
5947      GenerateReferenceLoadOneRegister(instruction, temp_loc, super_offset, maybe_temp2_loc);
5948
5949      // If the class reference currently in `temp` is not null, jump
5950      // back at the beginning of the loop.
5951      __ CompareAndBranchIfNonZero(temp, &loop);
5952      // Otherwise, jump to the slow path to throw the exception.
5953      //
5954      // But before, move back the object's class into `temp` before
5955      // going into the slow path, as it has been overwritten in the
5956      // meantime.
5957      // /* HeapReference<Class> */ temp = obj->klass_
5958      GenerateReferenceLoadTwoRegisters(
5959          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
5960      __ b(type_check_slow_path->GetEntryLabel());
5961      break;
5962    }
5963
5964    case TypeCheckKind::kArrayObjectCheck: {
5965      // Do an exact check.
5966      Label check_non_primitive_component_type;
5967      __ cmp(temp, ShifterOperand(cls));
5968      __ b(&done, EQ);
5969
5970      // Otherwise, we need to check that the object's class is a non-primitive array.
5971      // /* HeapReference<Class> */ temp = temp->component_type_
5972      GenerateReferenceLoadOneRegister(instruction, temp_loc, component_offset, maybe_temp2_loc);
5973
5974      // If the component type is not null (i.e. the object is indeed
5975      // an array), jump to label `check_non_primitive_component_type`
5976      // to further check that this component type is not a primitive
5977      // type.
5978      __ CompareAndBranchIfNonZero(temp, &check_non_primitive_component_type);
5979      // Otherwise, jump to the slow path to throw the exception.
5980      //
5981      // But before, move back the object's class into `temp` before
5982      // going into the slow path, as it has been overwritten in the
5983      // meantime.
5984      // /* HeapReference<Class> */ temp = obj->klass_
5985      GenerateReferenceLoadTwoRegisters(
5986          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
5987      __ b(type_check_slow_path->GetEntryLabel());
5988
5989      __ Bind(&check_non_primitive_component_type);
5990      __ LoadFromOffset(kLoadUnsignedHalfword, temp, temp, primitive_offset);
5991      static_assert(Primitive::kPrimNot == 0, "Expected 0 for art::Primitive::kPrimNot");
5992      __ CompareAndBranchIfZero(temp, &done);
5993      // Same comment as above regarding `temp` and the slow path.
5994      // /* HeapReference<Class> */ temp = obj->klass_
5995      GenerateReferenceLoadTwoRegisters(
5996          instruction, temp_loc, obj_loc, class_offset, maybe_temp2_loc);
5997      __ b(type_check_slow_path->GetEntryLabel());
5998      break;
5999    }
6000
6001    case TypeCheckKind::kUnresolvedCheck:
6002    case TypeCheckKind::kInterfaceCheck:
6003      // We always go into the type check slow path for the unresolved
6004      // and interface check cases.
6005      //
6006      // We cannot directly call the CheckCast runtime entry point
6007      // without resorting to a type checking slow path here (i.e. by
6008      // calling InvokeRuntime directly), as it would require to
6009      // assign fixed registers for the inputs of this HInstanceOf
6010      // instruction (following the runtime calling convention), which
6011      // might be cluttered by the potential first read barrier
6012      // emission at the beginning of this method.
6013      //
6014      // TODO: Introduce a new runtime entry point taking the object
6015      // to test (instead of its class) as argument, and let it deal
6016      // with the read barrier issues. This will let us refactor this
6017      // case of the `switch` code as it was previously (with a direct
6018      // call to the runtime not using a type checking slow path).
6019      // This should also be beneficial for the other cases above.
6020      __ b(type_check_slow_path->GetEntryLabel());
6021      break;
6022  }
6023  __ Bind(&done);
6024
6025  __ Bind(type_check_slow_path->GetExitLabel());
6026}
6027
6028void LocationsBuilderARM::VisitMonitorOperation(HMonitorOperation* instruction) {
6029  LocationSummary* locations =
6030      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnMainOnly);
6031  InvokeRuntimeCallingConvention calling_convention;
6032  locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0)));
6033}
6034
6035void InstructionCodeGeneratorARM::VisitMonitorOperation(HMonitorOperation* instruction) {
6036  codegen_->InvokeRuntime(instruction->IsEnter()
6037        ? QUICK_ENTRY_POINT(pLockObject) : QUICK_ENTRY_POINT(pUnlockObject),
6038      instruction,
6039      instruction->GetDexPc(),
6040      nullptr);
6041  if (instruction->IsEnter()) {
6042    CheckEntrypointTypes<kQuickLockObject, void, mirror::Object*>();
6043  } else {
6044    CheckEntrypointTypes<kQuickUnlockObject, void, mirror::Object*>();
6045  }
6046}
6047
6048void LocationsBuilderARM::VisitAnd(HAnd* instruction) { HandleBitwiseOperation(instruction, AND); }
6049void LocationsBuilderARM::VisitOr(HOr* instruction) { HandleBitwiseOperation(instruction, ORR); }
6050void LocationsBuilderARM::VisitXor(HXor* instruction) { HandleBitwiseOperation(instruction, EOR); }
6051
6052void LocationsBuilderARM::HandleBitwiseOperation(HBinaryOperation* instruction, Opcode opcode) {
6053  LocationSummary* locations =
6054      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
6055  DCHECK(instruction->GetResultType() == Primitive::kPrimInt
6056         || instruction->GetResultType() == Primitive::kPrimLong);
6057  // Note: GVN reorders commutative operations to have the constant on the right hand side.
6058  locations->SetInAt(0, Location::RequiresRegister());
6059  locations->SetInAt(1, ArmEncodableConstantOrRegister(instruction->InputAt(1), opcode));
6060  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
6061}
6062
6063void InstructionCodeGeneratorARM::VisitAnd(HAnd* instruction) {
6064  HandleBitwiseOperation(instruction);
6065}
6066
6067void InstructionCodeGeneratorARM::VisitOr(HOr* instruction) {
6068  HandleBitwiseOperation(instruction);
6069}
6070
6071void InstructionCodeGeneratorARM::VisitXor(HXor* instruction) {
6072  HandleBitwiseOperation(instruction);
6073}
6074
6075
6076void LocationsBuilderARM::VisitBitwiseNegatedRight(HBitwiseNegatedRight* instruction) {
6077  LocationSummary* locations =
6078      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
6079  DCHECK(instruction->GetResultType() == Primitive::kPrimInt
6080         || instruction->GetResultType() == Primitive::kPrimLong);
6081
6082  locations->SetInAt(0, Location::RequiresRegister());
6083  locations->SetInAt(1, Location::RequiresRegister());
6084  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
6085}
6086
6087void InstructionCodeGeneratorARM::VisitBitwiseNegatedRight(HBitwiseNegatedRight* instruction) {
6088  LocationSummary* locations = instruction->GetLocations();
6089  Location first = locations->InAt(0);
6090  Location second = locations->InAt(1);
6091  Location out = locations->Out();
6092
6093  if (instruction->GetResultType() == Primitive::kPrimInt) {
6094    Register first_reg = first.AsRegister<Register>();
6095    ShifterOperand second_reg(second.AsRegister<Register>());
6096    Register out_reg = out.AsRegister<Register>();
6097
6098    switch (instruction->GetOpKind()) {
6099      case HInstruction::kAnd:
6100        __ bic(out_reg, first_reg, second_reg);
6101        break;
6102      case HInstruction::kOr:
6103        __ orn(out_reg, first_reg, second_reg);
6104        break;
6105      // There is no EON on arm.
6106      case HInstruction::kXor:
6107      default:
6108        LOG(FATAL) << "Unexpected instruction " << instruction->DebugName();
6109        UNREACHABLE();
6110    }
6111    return;
6112
6113  } else {
6114    DCHECK_EQ(instruction->GetResultType(), Primitive::kPrimLong);
6115    Register first_low = first.AsRegisterPairLow<Register>();
6116    Register first_high = first.AsRegisterPairHigh<Register>();
6117    ShifterOperand second_low(second.AsRegisterPairLow<Register>());
6118    ShifterOperand second_high(second.AsRegisterPairHigh<Register>());
6119    Register out_low = out.AsRegisterPairLow<Register>();
6120    Register out_high = out.AsRegisterPairHigh<Register>();
6121
6122    switch (instruction->GetOpKind()) {
6123      case HInstruction::kAnd:
6124        __ bic(out_low, first_low, second_low);
6125        __ bic(out_high, first_high, second_high);
6126        break;
6127      case HInstruction::kOr:
6128        __ orn(out_low, first_low, second_low);
6129        __ orn(out_high, first_high, second_high);
6130        break;
6131      // There is no EON on arm.
6132      case HInstruction::kXor:
6133      default:
6134        LOG(FATAL) << "Unexpected instruction " << instruction->DebugName();
6135        UNREACHABLE();
6136    }
6137  }
6138}
6139
6140void InstructionCodeGeneratorARM::GenerateAndConst(Register out, Register first, uint32_t value) {
6141  // Optimize special cases for individual halfs of `and-long` (`and` is simplified earlier).
6142  if (value == 0xffffffffu) {
6143    if (out != first) {
6144      __ mov(out, ShifterOperand(first));
6145    }
6146    return;
6147  }
6148  if (value == 0u) {
6149    __ mov(out, ShifterOperand(0));
6150    return;
6151  }
6152  ShifterOperand so;
6153  if (__ ShifterOperandCanHold(kNoRegister, kNoRegister, AND, value, &so)) {
6154    __ and_(out, first, so);
6155  } else {
6156    DCHECK(__ ShifterOperandCanHold(kNoRegister, kNoRegister, BIC, ~value, &so));
6157    __ bic(out, first, ShifterOperand(~value));
6158  }
6159}
6160
6161void InstructionCodeGeneratorARM::GenerateOrrConst(Register out, Register first, uint32_t value) {
6162  // Optimize special cases for individual halfs of `or-long` (`or` is simplified earlier).
6163  if (value == 0u) {
6164    if (out != first) {
6165      __ mov(out, ShifterOperand(first));
6166    }
6167    return;
6168  }
6169  if (value == 0xffffffffu) {
6170    __ mvn(out, ShifterOperand(0));
6171    return;
6172  }
6173  ShifterOperand so;
6174  if (__ ShifterOperandCanHold(kNoRegister, kNoRegister, ORR, value, &so)) {
6175    __ orr(out, first, so);
6176  } else {
6177    DCHECK(__ ShifterOperandCanHold(kNoRegister, kNoRegister, ORN, ~value, &so));
6178    __ orn(out, first, ShifterOperand(~value));
6179  }
6180}
6181
6182void InstructionCodeGeneratorARM::GenerateEorConst(Register out, Register first, uint32_t value) {
6183  // Optimize special case for individual halfs of `xor-long` (`xor` is simplified earlier).
6184  if (value == 0u) {
6185    if (out != first) {
6186      __ mov(out, ShifterOperand(first));
6187    }
6188    return;
6189  }
6190  __ eor(out, first, ShifterOperand(value));
6191}
6192
6193void InstructionCodeGeneratorARM::GenerateAddLongConst(Location out,
6194                                                       Location first,
6195                                                       uint64_t value) {
6196  Register out_low = out.AsRegisterPairLow<Register>();
6197  Register out_high = out.AsRegisterPairHigh<Register>();
6198  Register first_low = first.AsRegisterPairLow<Register>();
6199  Register first_high = first.AsRegisterPairHigh<Register>();
6200  uint32_t value_low = Low32Bits(value);
6201  uint32_t value_high = High32Bits(value);
6202  if (value_low == 0u) {
6203    if (out_low != first_low) {
6204      __ mov(out_low, ShifterOperand(first_low));
6205    }
6206    __ AddConstant(out_high, first_high, value_high);
6207    return;
6208  }
6209  __ AddConstantSetFlags(out_low, first_low, value_low);
6210  ShifterOperand so;
6211  if (__ ShifterOperandCanHold(out_high, first_high, ADC, value_high, kCcDontCare, &so)) {
6212    __ adc(out_high, first_high, so);
6213  } else if (__ ShifterOperandCanHold(out_low, first_low, SBC, ~value_high, kCcDontCare, &so)) {
6214    __ sbc(out_high, first_high, so);
6215  } else {
6216    LOG(FATAL) << "Unexpected constant " << value_high;
6217    UNREACHABLE();
6218  }
6219}
6220
6221void InstructionCodeGeneratorARM::HandleBitwiseOperation(HBinaryOperation* instruction) {
6222  LocationSummary* locations = instruction->GetLocations();
6223  Location first = locations->InAt(0);
6224  Location second = locations->InAt(1);
6225  Location out = locations->Out();
6226
6227  if (second.IsConstant()) {
6228    uint64_t value = static_cast<uint64_t>(Int64FromConstant(second.GetConstant()));
6229    uint32_t value_low = Low32Bits(value);
6230    if (instruction->GetResultType() == Primitive::kPrimInt) {
6231      Register first_reg = first.AsRegister<Register>();
6232      Register out_reg = out.AsRegister<Register>();
6233      if (instruction->IsAnd()) {
6234        GenerateAndConst(out_reg, first_reg, value_low);
6235      } else if (instruction->IsOr()) {
6236        GenerateOrrConst(out_reg, first_reg, value_low);
6237      } else {
6238        DCHECK(instruction->IsXor());
6239        GenerateEorConst(out_reg, first_reg, value_low);
6240      }
6241    } else {
6242      DCHECK_EQ(instruction->GetResultType(), Primitive::kPrimLong);
6243      uint32_t value_high = High32Bits(value);
6244      Register first_low = first.AsRegisterPairLow<Register>();
6245      Register first_high = first.AsRegisterPairHigh<Register>();
6246      Register out_low = out.AsRegisterPairLow<Register>();
6247      Register out_high = out.AsRegisterPairHigh<Register>();
6248      if (instruction->IsAnd()) {
6249        GenerateAndConst(out_low, first_low, value_low);
6250        GenerateAndConst(out_high, first_high, value_high);
6251      } else if (instruction->IsOr()) {
6252        GenerateOrrConst(out_low, first_low, value_low);
6253        GenerateOrrConst(out_high, first_high, value_high);
6254      } else {
6255        DCHECK(instruction->IsXor());
6256        GenerateEorConst(out_low, first_low, value_low);
6257        GenerateEorConst(out_high, first_high, value_high);
6258      }
6259    }
6260    return;
6261  }
6262
6263  if (instruction->GetResultType() == Primitive::kPrimInt) {
6264    Register first_reg = first.AsRegister<Register>();
6265    ShifterOperand second_reg(second.AsRegister<Register>());
6266    Register out_reg = out.AsRegister<Register>();
6267    if (instruction->IsAnd()) {
6268      __ and_(out_reg, first_reg, second_reg);
6269    } else if (instruction->IsOr()) {
6270      __ orr(out_reg, first_reg, second_reg);
6271    } else {
6272      DCHECK(instruction->IsXor());
6273      __ eor(out_reg, first_reg, second_reg);
6274    }
6275  } else {
6276    DCHECK_EQ(instruction->GetResultType(), Primitive::kPrimLong);
6277    Register first_low = first.AsRegisterPairLow<Register>();
6278    Register first_high = first.AsRegisterPairHigh<Register>();
6279    ShifterOperand second_low(second.AsRegisterPairLow<Register>());
6280    ShifterOperand second_high(second.AsRegisterPairHigh<Register>());
6281    Register out_low = out.AsRegisterPairLow<Register>();
6282    Register out_high = out.AsRegisterPairHigh<Register>();
6283    if (instruction->IsAnd()) {
6284      __ and_(out_low, first_low, second_low);
6285      __ and_(out_high, first_high, second_high);
6286    } else if (instruction->IsOr()) {
6287      __ orr(out_low, first_low, second_low);
6288      __ orr(out_high, first_high, second_high);
6289    } else {
6290      DCHECK(instruction->IsXor());
6291      __ eor(out_low, first_low, second_low);
6292      __ eor(out_high, first_high, second_high);
6293    }
6294  }
6295}
6296
6297void InstructionCodeGeneratorARM::GenerateReferenceLoadOneRegister(HInstruction* instruction,
6298                                                                   Location out,
6299                                                                   uint32_t offset,
6300                                                                   Location maybe_temp) {
6301  Register out_reg = out.AsRegister<Register>();
6302  if (kEmitCompilerReadBarrier) {
6303    DCHECK(maybe_temp.IsRegister()) << maybe_temp;
6304    if (kUseBakerReadBarrier) {
6305      // Load with fast path based Baker's read barrier.
6306      // /* HeapReference<Object> */ out = *(out + offset)
6307      codegen_->GenerateFieldLoadWithBakerReadBarrier(
6308          instruction, out, out_reg, offset, maybe_temp, /* needs_null_check */ false);
6309    } else {
6310      // Load with slow path based read barrier.
6311      // Save the value of `out` into `maybe_temp` before overwriting it
6312      // in the following move operation, as we will need it for the
6313      // read barrier below.
6314      __ Mov(maybe_temp.AsRegister<Register>(), out_reg);
6315      // /* HeapReference<Object> */ out = *(out + offset)
6316      __ LoadFromOffset(kLoadWord, out_reg, out_reg, offset);
6317      codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset);
6318    }
6319  } else {
6320    // Plain load with no read barrier.
6321    // /* HeapReference<Object> */ out = *(out + offset)
6322    __ LoadFromOffset(kLoadWord, out_reg, out_reg, offset);
6323    __ MaybeUnpoisonHeapReference(out_reg);
6324  }
6325}
6326
6327void InstructionCodeGeneratorARM::GenerateReferenceLoadTwoRegisters(HInstruction* instruction,
6328                                                                    Location out,
6329                                                                    Location obj,
6330                                                                    uint32_t offset,
6331                                                                    Location maybe_temp) {
6332  Register out_reg = out.AsRegister<Register>();
6333  Register obj_reg = obj.AsRegister<Register>();
6334  if (kEmitCompilerReadBarrier) {
6335    if (kUseBakerReadBarrier) {
6336      DCHECK(maybe_temp.IsRegister()) << maybe_temp;
6337      // Load with fast path based Baker's read barrier.
6338      // /* HeapReference<Object> */ out = *(obj + offset)
6339      codegen_->GenerateFieldLoadWithBakerReadBarrier(
6340          instruction, out, obj_reg, offset, maybe_temp, /* needs_null_check */ false);
6341    } else {
6342      // Load with slow path based read barrier.
6343      // /* HeapReference<Object> */ out = *(obj + offset)
6344      __ LoadFromOffset(kLoadWord, out_reg, obj_reg, offset);
6345      codegen_->GenerateReadBarrierSlow(instruction, out, out, obj, offset);
6346    }
6347  } else {
6348    // Plain load with no read barrier.
6349    // /* HeapReference<Object> */ out = *(obj + offset)
6350    __ LoadFromOffset(kLoadWord, out_reg, obj_reg, offset);
6351    __ MaybeUnpoisonHeapReference(out_reg);
6352  }
6353}
6354
6355void InstructionCodeGeneratorARM::GenerateGcRootFieldLoad(HInstruction* instruction,
6356                                                          Location root,
6357                                                          Register obj,
6358                                                          uint32_t offset) {
6359  Register root_reg = root.AsRegister<Register>();
6360  if (kEmitCompilerReadBarrier) {
6361    if (kUseBakerReadBarrier) {
6362      // Fast path implementation of art::ReadBarrier::BarrierForRoot when
6363      // Baker's read barrier are used:
6364      //
6365      //   root = obj.field;
6366      //   if (Thread::Current()->GetIsGcMarking()) {
6367      //     root = ReadBarrier::Mark(root)
6368      //   }
6369
6370      // /* GcRoot<mirror::Object> */ root = *(obj + offset)
6371      __ LoadFromOffset(kLoadWord, root_reg, obj, offset);
6372      static_assert(
6373          sizeof(mirror::CompressedReference<mirror::Object>) == sizeof(GcRoot<mirror::Object>),
6374          "art::mirror::CompressedReference<mirror::Object> and art::GcRoot<mirror::Object> "
6375          "have different sizes.");
6376      static_assert(sizeof(mirror::CompressedReference<mirror::Object>) == sizeof(int32_t),
6377                    "art::mirror::CompressedReference<mirror::Object> and int32_t "
6378                    "have different sizes.");
6379
6380      // Slow path used to mark the GC root `root`.
6381      SlowPathCode* slow_path =
6382          new (GetGraph()->GetArena()) ReadBarrierMarkSlowPathARM(instruction, root);
6383      codegen_->AddSlowPath(slow_path);
6384
6385      // IP = Thread::Current()->GetIsGcMarking()
6386      __ LoadFromOffset(
6387          kLoadWord, IP, TR, Thread::IsGcMarkingOffset<kArmPointerSize>().Int32Value());
6388      __ CompareAndBranchIfNonZero(IP, slow_path->GetEntryLabel());
6389      __ Bind(slow_path->GetExitLabel());
6390    } else {
6391      // GC root loaded through a slow path for read barriers other
6392      // than Baker's.
6393      // /* GcRoot<mirror::Object>* */ root = obj + offset
6394      __ AddConstant(root_reg, obj, offset);
6395      // /* mirror::Object* */ root = root->Read()
6396      codegen_->GenerateReadBarrierForRootSlow(instruction, root, root);
6397    }
6398  } else {
6399    // Plain GC root load with no read barrier.
6400    // /* GcRoot<mirror::Object> */ root = *(obj + offset)
6401    __ LoadFromOffset(kLoadWord, root_reg, obj, offset);
6402    // Note that GC roots are not affected by heap poisoning, thus we
6403    // do not have to unpoison `root_reg` here.
6404  }
6405}
6406
6407void CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier(HInstruction* instruction,
6408                                                             Location ref,
6409                                                             Register obj,
6410                                                             uint32_t offset,
6411                                                             Location temp,
6412                                                             bool needs_null_check) {
6413  DCHECK(kEmitCompilerReadBarrier);
6414  DCHECK(kUseBakerReadBarrier);
6415
6416  // /* HeapReference<Object> */ ref = *(obj + offset)
6417  Location no_index = Location::NoLocation();
6418  ScaleFactor no_scale_factor = TIMES_1;
6419  GenerateReferenceLoadWithBakerReadBarrier(
6420      instruction, ref, obj, offset, no_index, no_scale_factor, temp, needs_null_check);
6421}
6422
6423void CodeGeneratorARM::GenerateArrayLoadWithBakerReadBarrier(HInstruction* instruction,
6424                                                             Location ref,
6425                                                             Register obj,
6426                                                             uint32_t data_offset,
6427                                                             Location index,
6428                                                             Location temp,
6429                                                             bool needs_null_check) {
6430  DCHECK(kEmitCompilerReadBarrier);
6431  DCHECK(kUseBakerReadBarrier);
6432
6433  static_assert(
6434      sizeof(mirror::HeapReference<mirror::Object>) == sizeof(int32_t),
6435      "art::mirror::HeapReference<art::mirror::Object> and int32_t have different sizes.");
6436  // /* HeapReference<Object> */ ref =
6437  //     *(obj + data_offset + index * sizeof(HeapReference<Object>))
6438  ScaleFactor scale_factor = TIMES_4;
6439  GenerateReferenceLoadWithBakerReadBarrier(
6440      instruction, ref, obj, data_offset, index, scale_factor, temp, needs_null_check);
6441}
6442
6443void CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier(HInstruction* instruction,
6444                                                                 Location ref,
6445                                                                 Register obj,
6446                                                                 uint32_t offset,
6447                                                                 Location index,
6448                                                                 ScaleFactor scale_factor,
6449                                                                 Location temp,
6450                                                                 bool needs_null_check) {
6451  DCHECK(kEmitCompilerReadBarrier);
6452  DCHECK(kUseBakerReadBarrier);
6453
6454  // In slow path based read barriers, the read barrier call is
6455  // inserted after the original load. However, in fast path based
6456  // Baker's read barriers, we need to perform the load of
6457  // mirror::Object::monitor_ *before* the original reference load.
6458  // This load-load ordering is required by the read barrier.
6459  // The fast path/slow path (for Baker's algorithm) should look like:
6460  //
6461  //   uint32_t rb_state = Lockword(obj->monitor_).ReadBarrierState();
6462  //   lfence;  // Load fence or artificial data dependency to prevent load-load reordering
6463  //   HeapReference<Object> ref = *src;  // Original reference load.
6464  //   bool is_gray = (rb_state == ReadBarrier::gray_ptr_);
6465  //   if (is_gray) {
6466  //     ref = ReadBarrier::Mark(ref);  // Performed by runtime entrypoint slow path.
6467  //   }
6468  //
6469  // Note: the original implementation in ReadBarrier::Barrier is
6470  // slightly more complex as it performs additional checks that we do
6471  // not do here for performance reasons.
6472
6473  Register ref_reg = ref.AsRegister<Register>();
6474  Register temp_reg = temp.AsRegister<Register>();
6475  uint32_t monitor_offset = mirror::Object::MonitorOffset().Int32Value();
6476
6477  // /* int32_t */ monitor = obj->monitor_
6478  __ LoadFromOffset(kLoadWord, temp_reg, obj, monitor_offset);
6479  if (needs_null_check) {
6480    MaybeRecordImplicitNullCheck(instruction);
6481  }
6482  // /* LockWord */ lock_word = LockWord(monitor)
6483  static_assert(sizeof(LockWord) == sizeof(int32_t),
6484                "art::LockWord and int32_t have different sizes.");
6485
6486  // Introduce a dependency on the lock_word including the rb_state,
6487  // which shall prevent load-load reordering without using
6488  // a memory barrier (which would be more expensive).
6489  // `obj` is unchanged by this operation, but its value now depends
6490  // on `temp_reg`.
6491  __ add(obj, obj, ShifterOperand(temp_reg, LSR, 32));
6492
6493  // The actual reference load.
6494  if (index.IsValid()) {
6495    // Load types involving an "index": ArrayGet and
6496    // UnsafeGetObject/UnsafeGetObjectVolatile intrinsics.
6497    // /* HeapReference<Object> */ ref = *(obj + offset + (index << scale_factor))
6498    if (index.IsConstant()) {
6499      size_t computed_offset =
6500          (index.GetConstant()->AsIntConstant()->GetValue() << scale_factor) + offset;
6501      __ LoadFromOffset(kLoadWord, ref_reg, obj, computed_offset);
6502    } else {
6503      // Handle the special case of the
6504      // UnsafeGetObject/UnsafeGetObjectVolatile intrinsics, which use
6505      // a register pair as index ("long offset"), of which only the low
6506      // part contains data.
6507      Register index_reg = index.IsRegisterPair()
6508          ? index.AsRegisterPairLow<Register>()
6509          : index.AsRegister<Register>();
6510      __ add(IP, obj, ShifterOperand(index_reg, LSL, scale_factor));
6511      __ LoadFromOffset(kLoadWord, ref_reg, IP, offset);
6512    }
6513  } else {
6514    // /* HeapReference<Object> */ ref = *(obj + offset)
6515    __ LoadFromOffset(kLoadWord, ref_reg, obj, offset);
6516  }
6517
6518  // Object* ref = ref_addr->AsMirrorPtr()
6519  __ MaybeUnpoisonHeapReference(ref_reg);
6520
6521  // Slow path used to mark the object `ref` when it is gray.
6522  SlowPathCode* slow_path =
6523      new (GetGraph()->GetArena()) ReadBarrierMarkSlowPathARM(instruction, ref);
6524  AddSlowPath(slow_path);
6525
6526  // if (rb_state == ReadBarrier::gray_ptr_)
6527  //   ref = ReadBarrier::Mark(ref);
6528  // Given the numeric representation, it's enough to check the low bit of the
6529  // rb_state. We do that by shifting the bit out of the lock word with LSRS
6530  // which can be a 16-bit instruction unlike the TST immediate.
6531  static_assert(ReadBarrier::white_ptr_ == 0, "Expecting white to have value 0");
6532  static_assert(ReadBarrier::gray_ptr_ == 1, "Expecting gray to have value 1");
6533  static_assert(ReadBarrier::black_ptr_ == 2, "Expecting black to have value 2");
6534  __ Lsrs(temp_reg, temp_reg, LockWord::kReadBarrierStateShift + 1);
6535  __ b(slow_path->GetEntryLabel(), CS);  // Carry flag is the last bit shifted out by LSRS.
6536  __ Bind(slow_path->GetExitLabel());
6537}
6538
6539void CodeGeneratorARM::GenerateReadBarrierSlow(HInstruction* instruction,
6540                                               Location out,
6541                                               Location ref,
6542                                               Location obj,
6543                                               uint32_t offset,
6544                                               Location index) {
6545  DCHECK(kEmitCompilerReadBarrier);
6546
6547  // Insert a slow path based read barrier *after* the reference load.
6548  //
6549  // If heap poisoning is enabled, the unpoisoning of the loaded
6550  // reference will be carried out by the runtime within the slow
6551  // path.
6552  //
6553  // Note that `ref` currently does not get unpoisoned (when heap
6554  // poisoning is enabled), which is alright as the `ref` argument is
6555  // not used by the artReadBarrierSlow entry point.
6556  //
6557  // TODO: Unpoison `ref` when it is used by artReadBarrierSlow.
6558  SlowPathCode* slow_path = new (GetGraph()->GetArena())
6559      ReadBarrierForHeapReferenceSlowPathARM(instruction, out, ref, obj, offset, index);
6560  AddSlowPath(slow_path);
6561
6562  __ b(slow_path->GetEntryLabel());
6563  __ Bind(slow_path->GetExitLabel());
6564}
6565
6566void CodeGeneratorARM::MaybeGenerateReadBarrierSlow(HInstruction* instruction,
6567                                                    Location out,
6568                                                    Location ref,
6569                                                    Location obj,
6570                                                    uint32_t offset,
6571                                                    Location index) {
6572  if (kEmitCompilerReadBarrier) {
6573    // Baker's read barriers shall be handled by the fast path
6574    // (CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier).
6575    DCHECK(!kUseBakerReadBarrier);
6576    // If heap poisoning is enabled, unpoisoning will be taken care of
6577    // by the runtime within the slow path.
6578    GenerateReadBarrierSlow(instruction, out, ref, obj, offset, index);
6579  } else if (kPoisonHeapReferences) {
6580    __ UnpoisonHeapReference(out.AsRegister<Register>());
6581  }
6582}
6583
6584void CodeGeneratorARM::GenerateReadBarrierForRootSlow(HInstruction* instruction,
6585                                                      Location out,
6586                                                      Location root) {
6587  DCHECK(kEmitCompilerReadBarrier);
6588
6589  // Insert a slow path based read barrier *after* the GC root load.
6590  //
6591  // Note that GC roots are not affected by heap poisoning, so we do
6592  // not need to do anything special for this here.
6593  SlowPathCode* slow_path =
6594      new (GetGraph()->GetArena()) ReadBarrierForRootSlowPathARM(instruction, out, root);
6595  AddSlowPath(slow_path);
6596
6597  __ b(slow_path->GetEntryLabel());
6598  __ Bind(slow_path->GetExitLabel());
6599}
6600
6601HInvokeStaticOrDirect::DispatchInfo CodeGeneratorARM::GetSupportedInvokeStaticOrDirectDispatch(
6602      const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info,
6603      MethodReference target_method) {
6604  HInvokeStaticOrDirect::DispatchInfo dispatch_info = desired_dispatch_info;
6605  // We disable pc-relative load when there is an irreducible loop, as the optimization
6606  // is incompatible with it.
6607  // TODO: Create as many ArmDexCacheArraysBase instructions as needed for methods
6608  // with irreducible loops.
6609  if (GetGraph()->HasIrreducibleLoops() &&
6610      (dispatch_info.method_load_kind ==
6611          HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative)) {
6612    dispatch_info.method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod;
6613  }
6614
6615  if (dispatch_info.code_ptr_location == HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative) {
6616    const DexFile& outer_dex_file = GetGraph()->GetDexFile();
6617    if (&outer_dex_file != target_method.dex_file) {
6618      // Calls across dex files are more likely to exceed the available BL range,
6619      // so use absolute patch with fixup if available and kCallArtMethod otherwise.
6620      HInvokeStaticOrDirect::CodePtrLocation code_ptr_location =
6621          (desired_dispatch_info.method_load_kind ==
6622           HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup)
6623          ? HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup
6624          : HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod;
6625      return HInvokeStaticOrDirect::DispatchInfo {
6626        dispatch_info.method_load_kind,
6627        code_ptr_location,
6628        dispatch_info.method_load_data,
6629        0u
6630      };
6631    }
6632  }
6633  return dispatch_info;
6634}
6635
6636Register CodeGeneratorARM::GetInvokeStaticOrDirectExtraParameter(HInvokeStaticOrDirect* invoke,
6637                                                                 Register temp) {
6638  DCHECK_EQ(invoke->InputCount(), invoke->GetNumberOfArguments() + 1u);
6639  Location location = invoke->GetLocations()->InAt(invoke->GetSpecialInputIndex());
6640  if (!invoke->GetLocations()->Intrinsified()) {
6641    return location.AsRegister<Register>();
6642  }
6643  // For intrinsics we allow any location, so it may be on the stack.
6644  if (!location.IsRegister()) {
6645    __ LoadFromOffset(kLoadWord, temp, SP, location.GetStackIndex());
6646    return temp;
6647  }
6648  // For register locations, check if the register was saved. If so, get it from the stack.
6649  // Note: There is a chance that the register was saved but not overwritten, so we could
6650  // save one load. However, since this is just an intrinsic slow path we prefer this
6651  // simple and more robust approach rather that trying to determine if that's the case.
6652  SlowPathCode* slow_path = GetCurrentSlowPath();
6653  DCHECK(slow_path != nullptr);  // For intrinsified invokes the call is emitted on the slow path.
6654  if (slow_path->IsCoreRegisterSaved(location.AsRegister<Register>())) {
6655    int stack_offset = slow_path->GetStackOffsetOfCoreRegister(location.AsRegister<Register>());
6656    __ LoadFromOffset(kLoadWord, temp, SP, stack_offset);
6657    return temp;
6658  }
6659  return location.AsRegister<Register>();
6660}
6661
6662void CodeGeneratorARM::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) {
6663  // For better instruction scheduling we load the direct code pointer before the method pointer.
6664  switch (invoke->GetCodePtrLocation()) {
6665    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup:
6666      // LR = code address from literal pool with link-time patch.
6667      __ LoadLiteral(LR, DeduplicateMethodCodeLiteral(invoke->GetTargetMethod()));
6668      break;
6669    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect:
6670      // LR = invoke->GetDirectCodePtr();
6671      __ LoadImmediate(LR, invoke->GetDirectCodePtr());
6672      break;
6673    default:
6674      break;
6675  }
6676
6677  Location callee_method = temp;  // For all kinds except kRecursive, callee will be in temp.
6678  switch (invoke->GetMethodLoadKind()) {
6679    case HInvokeStaticOrDirect::MethodLoadKind::kStringInit:
6680      // temp = thread->string_init_entrypoint
6681      __ LoadFromOffset(kLoadWord, temp.AsRegister<Register>(), TR, invoke->GetStringInitOffset());
6682      break;
6683    case HInvokeStaticOrDirect::MethodLoadKind::kRecursive:
6684      callee_method = invoke->GetLocations()->InAt(invoke->GetSpecialInputIndex());
6685      break;
6686    case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddress:
6687      __ LoadImmediate(temp.AsRegister<Register>(), invoke->GetMethodAddress());
6688      break;
6689    case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup:
6690      __ LoadLiteral(temp.AsRegister<Register>(),
6691                     DeduplicateMethodAddressLiteral(invoke->GetTargetMethod()));
6692      break;
6693    case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: {
6694      HArmDexCacheArraysBase* base =
6695          invoke->InputAt(invoke->GetSpecialInputIndex())->AsArmDexCacheArraysBase();
6696      Register base_reg = GetInvokeStaticOrDirectExtraParameter(invoke,
6697                                                                temp.AsRegister<Register>());
6698      int32_t offset = invoke->GetDexCacheArrayOffset() - base->GetElementOffset();
6699      __ LoadFromOffset(kLoadWord, temp.AsRegister<Register>(), base_reg, offset);
6700      break;
6701    }
6702    case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: {
6703      Location current_method = invoke->GetLocations()->InAt(invoke->GetSpecialInputIndex());
6704      Register method_reg;
6705      Register reg = temp.AsRegister<Register>();
6706      if (current_method.IsRegister()) {
6707        method_reg = current_method.AsRegister<Register>();
6708      } else {
6709        DCHECK(invoke->GetLocations()->Intrinsified());
6710        DCHECK(!current_method.IsValid());
6711        method_reg = reg;
6712        __ LoadFromOffset(kLoadWord, reg, SP, kCurrentMethodStackOffset);
6713      }
6714      // /* ArtMethod*[] */ temp = temp.ptr_sized_fields_->dex_cache_resolved_methods_;
6715      __ LoadFromOffset(kLoadWord,
6716                        reg,
6717                        method_reg,
6718                        ArtMethod::DexCacheResolvedMethodsOffset(kArmPointerSize).Int32Value());
6719      // temp = temp[index_in_cache];
6720      // Note: Don't use invoke->GetTargetMethod() as it may point to a different dex file.
6721      uint32_t index_in_cache = invoke->GetDexMethodIndex();
6722      __ LoadFromOffset(kLoadWord, reg, reg, CodeGenerator::GetCachePointerOffset(index_in_cache));
6723      break;
6724    }
6725  }
6726
6727  switch (invoke->GetCodePtrLocation()) {
6728    case HInvokeStaticOrDirect::CodePtrLocation::kCallSelf:
6729      __ bl(GetFrameEntryLabel());
6730      break;
6731    case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative:
6732      relative_call_patches_.emplace_back(invoke->GetTargetMethod());
6733      __ BindTrackedLabel(&relative_call_patches_.back().label);
6734      // Arbitrarily branch to the BL itself, override at link time.
6735      __ bl(&relative_call_patches_.back().label);
6736      break;
6737    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup:
6738    case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect:
6739      // LR prepared above for better instruction scheduling.
6740      // LR()
6741      __ blx(LR);
6742      break;
6743    case HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod:
6744      // LR = callee_method->entry_point_from_quick_compiled_code_
6745      __ LoadFromOffset(
6746          kLoadWord, LR, callee_method.AsRegister<Register>(),
6747          ArtMethod::EntryPointFromQuickCompiledCodeOffset(kArmPointerSize).Int32Value());
6748      // LR()
6749      __ blx(LR);
6750      break;
6751  }
6752
6753  DCHECK(!IsLeafMethod());
6754}
6755
6756void CodeGeneratorARM::GenerateVirtualCall(HInvokeVirtual* invoke, Location temp_location) {
6757  Register temp = temp_location.AsRegister<Register>();
6758  uint32_t method_offset = mirror::Class::EmbeddedVTableEntryOffset(
6759      invoke->GetVTableIndex(), kArmPointerSize).Uint32Value();
6760
6761  // Use the calling convention instead of the location of the receiver, as
6762  // intrinsics may have put the receiver in a different register. In the intrinsics
6763  // slow path, the arguments have been moved to the right place, so here we are
6764  // guaranteed that the receiver is the first register of the calling convention.
6765  InvokeDexCallingConvention calling_convention;
6766  Register receiver = calling_convention.GetRegisterAt(0);
6767  uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
6768  // /* HeapReference<Class> */ temp = receiver->klass_
6769  __ LoadFromOffset(kLoadWord, temp, receiver, class_offset);
6770  MaybeRecordImplicitNullCheck(invoke);
6771  // Instead of simply (possibly) unpoisoning `temp` here, we should
6772  // emit a read barrier for the previous class reference load.
6773  // However this is not required in practice, as this is an
6774  // intermediate/temporary reference and because the current
6775  // concurrent copying collector keeps the from-space memory
6776  // intact/accessible until the end of the marking phase (the
6777  // concurrent copying collector may not in the future).
6778  __ MaybeUnpoisonHeapReference(temp);
6779  // temp = temp->GetMethodAt(method_offset);
6780  uint32_t entry_point = ArtMethod::EntryPointFromQuickCompiledCodeOffset(
6781      kArmPointerSize).Int32Value();
6782  __ LoadFromOffset(kLoadWord, temp, temp, method_offset);
6783  // LR = temp->GetEntryPoint();
6784  __ LoadFromOffset(kLoadWord, LR, temp, entry_point);
6785  // LR();
6786  __ blx(LR);
6787}
6788
6789CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativeStringPatch(
6790    const DexFile& dex_file, uint32_t string_index) {
6791  return NewPcRelativePatch(dex_file, string_index, &pc_relative_string_patches_);
6792}
6793
6794CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativeTypePatch(
6795    const DexFile& dex_file, uint32_t type_index) {
6796  return NewPcRelativePatch(dex_file, type_index, &pc_relative_type_patches_);
6797}
6798
6799CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativeDexCacheArrayPatch(
6800    const DexFile& dex_file, uint32_t element_offset) {
6801  return NewPcRelativePatch(dex_file, element_offset, &pc_relative_dex_cache_patches_);
6802}
6803
6804CodeGeneratorARM::PcRelativePatchInfo* CodeGeneratorARM::NewPcRelativePatch(
6805    const DexFile& dex_file, uint32_t offset_or_index, ArenaDeque<PcRelativePatchInfo>* patches) {
6806  patches->emplace_back(dex_file, offset_or_index);
6807  return &patches->back();
6808}
6809
6810Literal* CodeGeneratorARM::DeduplicateBootImageStringLiteral(const DexFile& dex_file,
6811                                                             uint32_t string_index) {
6812  return boot_image_string_patches_.GetOrCreate(
6813      StringReference(&dex_file, string_index),
6814      [this]() { return __ NewLiteral<uint32_t>(/* placeholder */ 0u); });
6815}
6816
6817Literal* CodeGeneratorARM::DeduplicateBootImageTypeLiteral(const DexFile& dex_file,
6818                                                           uint32_t type_index) {
6819  return boot_image_type_patches_.GetOrCreate(
6820      TypeReference(&dex_file, type_index),
6821      [this]() { return __ NewLiteral<uint32_t>(/* placeholder */ 0u); });
6822}
6823
6824Literal* CodeGeneratorARM::DeduplicateBootImageAddressLiteral(uint32_t address) {
6825  bool needs_patch = GetCompilerOptions().GetIncludePatchInformation();
6826  Uint32ToLiteralMap* map = needs_patch ? &boot_image_address_patches_ : &uint32_literals_;
6827  return DeduplicateUint32Literal(dchecked_integral_cast<uint32_t>(address), map);
6828}
6829
6830Literal* CodeGeneratorARM::DeduplicateDexCacheAddressLiteral(uint32_t address) {
6831  return DeduplicateUint32Literal(address, &uint32_literals_);
6832}
6833
6834void CodeGeneratorARM::EmitLinkerPatches(ArenaVector<LinkerPatch>* linker_patches) {
6835  DCHECK(linker_patches->empty());
6836  size_t size =
6837      method_patches_.size() +
6838      call_patches_.size() +
6839      relative_call_patches_.size() +
6840      /* MOVW+MOVT for each base */ 2u * pc_relative_dex_cache_patches_.size() +
6841      boot_image_string_patches_.size() +
6842      /* MOVW+MOVT for each base */ 2u * pc_relative_string_patches_.size() +
6843      boot_image_type_patches_.size() +
6844      /* MOVW+MOVT for each base */ 2u * pc_relative_type_patches_.size() +
6845      boot_image_address_patches_.size();
6846  linker_patches->reserve(size);
6847  for (const auto& entry : method_patches_) {
6848    const MethodReference& target_method = entry.first;
6849    Literal* literal = entry.second;
6850    DCHECK(literal->GetLabel()->IsBound());
6851    uint32_t literal_offset = literal->GetLabel()->Position();
6852    linker_patches->push_back(LinkerPatch::MethodPatch(literal_offset,
6853                                                       target_method.dex_file,
6854                                                       target_method.dex_method_index));
6855  }
6856  for (const auto& entry : call_patches_) {
6857    const MethodReference& target_method = entry.first;
6858    Literal* literal = entry.second;
6859    DCHECK(literal->GetLabel()->IsBound());
6860    uint32_t literal_offset = literal->GetLabel()->Position();
6861    linker_patches->push_back(LinkerPatch::CodePatch(literal_offset,
6862                                                     target_method.dex_file,
6863                                                     target_method.dex_method_index));
6864  }
6865  for (const MethodPatchInfo<Label>& info : relative_call_patches_) {
6866    uint32_t literal_offset = info.label.Position();
6867    linker_patches->push_back(LinkerPatch::RelativeCodePatch(literal_offset,
6868                                                             info.target_method.dex_file,
6869                                                             info.target_method.dex_method_index));
6870  }
6871  for (const PcRelativePatchInfo& info : pc_relative_dex_cache_patches_) {
6872    const DexFile& dex_file = info.target_dex_file;
6873    size_t base_element_offset = info.offset_or_index;
6874    DCHECK(info.add_pc_label.IsBound());
6875    uint32_t add_pc_offset = dchecked_integral_cast<uint32_t>(info.add_pc_label.Position());
6876    // Add MOVW patch.
6877    DCHECK(info.movw_label.IsBound());
6878    uint32_t movw_offset = dchecked_integral_cast<uint32_t>(info.movw_label.Position());
6879    linker_patches->push_back(LinkerPatch::DexCacheArrayPatch(movw_offset,
6880                                                              &dex_file,
6881                                                              add_pc_offset,
6882                                                              base_element_offset));
6883    // Add MOVT patch.
6884    DCHECK(info.movt_label.IsBound());
6885    uint32_t movt_offset = dchecked_integral_cast<uint32_t>(info.movt_label.Position());
6886    linker_patches->push_back(LinkerPatch::DexCacheArrayPatch(movt_offset,
6887                                                              &dex_file,
6888                                                              add_pc_offset,
6889                                                              base_element_offset));
6890  }
6891  for (const auto& entry : boot_image_string_patches_) {
6892    const StringReference& target_string = entry.first;
6893    Literal* literal = entry.second;
6894    DCHECK(literal->GetLabel()->IsBound());
6895    uint32_t literal_offset = literal->GetLabel()->Position();
6896    linker_patches->push_back(LinkerPatch::StringPatch(literal_offset,
6897                                                       target_string.dex_file,
6898                                                       target_string.string_index));
6899  }
6900  for (const PcRelativePatchInfo& info : pc_relative_string_patches_) {
6901    const DexFile& dex_file = info.target_dex_file;
6902    uint32_t string_index = info.offset_or_index;
6903    DCHECK(info.add_pc_label.IsBound());
6904    uint32_t add_pc_offset = dchecked_integral_cast<uint32_t>(info.add_pc_label.Position());
6905    // Add MOVW patch.
6906    DCHECK(info.movw_label.IsBound());
6907    uint32_t movw_offset = dchecked_integral_cast<uint32_t>(info.movw_label.Position());
6908    linker_patches->push_back(LinkerPatch::RelativeStringPatch(movw_offset,
6909                                                               &dex_file,
6910                                                               add_pc_offset,
6911                                                               string_index));
6912    // Add MOVT patch.
6913    DCHECK(info.movt_label.IsBound());
6914    uint32_t movt_offset = dchecked_integral_cast<uint32_t>(info.movt_label.Position());
6915    linker_patches->push_back(LinkerPatch::RelativeStringPatch(movt_offset,
6916                                                               &dex_file,
6917                                                               add_pc_offset,
6918                                                               string_index));
6919  }
6920  for (const auto& entry : boot_image_type_patches_) {
6921    const TypeReference& target_type = entry.first;
6922    Literal* literal = entry.second;
6923    DCHECK(literal->GetLabel()->IsBound());
6924    uint32_t literal_offset = literal->GetLabel()->Position();
6925    linker_patches->push_back(LinkerPatch::TypePatch(literal_offset,
6926                                                     target_type.dex_file,
6927                                                     target_type.type_index));
6928  }
6929  for (const PcRelativePatchInfo& info : pc_relative_type_patches_) {
6930    const DexFile& dex_file = info.target_dex_file;
6931    uint32_t type_index = info.offset_or_index;
6932    DCHECK(info.add_pc_label.IsBound());
6933    uint32_t add_pc_offset = dchecked_integral_cast<uint32_t>(info.add_pc_label.Position());
6934    // Add MOVW patch.
6935    DCHECK(info.movw_label.IsBound());
6936    uint32_t movw_offset = dchecked_integral_cast<uint32_t>(info.movw_label.Position());
6937    linker_patches->push_back(LinkerPatch::RelativeTypePatch(movw_offset,
6938                                                             &dex_file,
6939                                                             add_pc_offset,
6940                                                             type_index));
6941    // Add MOVT patch.
6942    DCHECK(info.movt_label.IsBound());
6943    uint32_t movt_offset = dchecked_integral_cast<uint32_t>(info.movt_label.Position());
6944    linker_patches->push_back(LinkerPatch::RelativeTypePatch(movt_offset,
6945                                                             &dex_file,
6946                                                             add_pc_offset,
6947                                                             type_index));
6948  }
6949  for (const auto& entry : boot_image_address_patches_) {
6950    DCHECK(GetCompilerOptions().GetIncludePatchInformation());
6951    Literal* literal = entry.second;
6952    DCHECK(literal->GetLabel()->IsBound());
6953    uint32_t literal_offset = literal->GetLabel()->Position();
6954    linker_patches->push_back(LinkerPatch::RecordPosition(literal_offset));
6955  }
6956}
6957
6958Literal* CodeGeneratorARM::DeduplicateUint32Literal(uint32_t value, Uint32ToLiteralMap* map) {
6959  return map->GetOrCreate(
6960      value,
6961      [this, value]() { return __ NewLiteral<uint32_t>(value); });
6962}
6963
6964Literal* CodeGeneratorARM::DeduplicateMethodLiteral(MethodReference target_method,
6965                                                    MethodToLiteralMap* map) {
6966  return map->GetOrCreate(
6967      target_method,
6968      [this]() { return __ NewLiteral<uint32_t>(/* placeholder */ 0u); });
6969}
6970
6971Literal* CodeGeneratorARM::DeduplicateMethodAddressLiteral(MethodReference target_method) {
6972  return DeduplicateMethodLiteral(target_method, &method_patches_);
6973}
6974
6975Literal* CodeGeneratorARM::DeduplicateMethodCodeLiteral(MethodReference target_method) {
6976  return DeduplicateMethodLiteral(target_method, &call_patches_);
6977}
6978
6979void LocationsBuilderARM::VisitMultiplyAccumulate(HMultiplyAccumulate* instr) {
6980  LocationSummary* locations =
6981      new (GetGraph()->GetArena()) LocationSummary(instr, LocationSummary::kNoCall);
6982  locations->SetInAt(HMultiplyAccumulate::kInputAccumulatorIndex,
6983                     Location::RequiresRegister());
6984  locations->SetInAt(HMultiplyAccumulate::kInputMulLeftIndex, Location::RequiresRegister());
6985  locations->SetInAt(HMultiplyAccumulate::kInputMulRightIndex, Location::RequiresRegister());
6986  locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
6987}
6988
6989void InstructionCodeGeneratorARM::VisitMultiplyAccumulate(HMultiplyAccumulate* instr) {
6990  LocationSummary* locations = instr->GetLocations();
6991  Register res = locations->Out().AsRegister<Register>();
6992  Register accumulator =
6993      locations->InAt(HMultiplyAccumulate::kInputAccumulatorIndex).AsRegister<Register>();
6994  Register mul_left =
6995      locations->InAt(HMultiplyAccumulate::kInputMulLeftIndex).AsRegister<Register>();
6996  Register mul_right =
6997      locations->InAt(HMultiplyAccumulate::kInputMulRightIndex).AsRegister<Register>();
6998
6999  if (instr->GetOpKind() == HInstruction::kAdd) {
7000    __ mla(res, mul_left, mul_right, accumulator);
7001  } else {
7002    __ mls(res, mul_left, mul_right, accumulator);
7003  }
7004}
7005
7006void LocationsBuilderARM::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) {
7007  // Nothing to do, this should be removed during prepare for register allocator.
7008  LOG(FATAL) << "Unreachable";
7009}
7010
7011void InstructionCodeGeneratorARM::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) {
7012  // Nothing to do, this should be removed during prepare for register allocator.
7013  LOG(FATAL) << "Unreachable";
7014}
7015
7016// Simple implementation of packed switch - generate cascaded compare/jumps.
7017void LocationsBuilderARM::VisitPackedSwitch(HPackedSwitch* switch_instr) {
7018  LocationSummary* locations =
7019      new (GetGraph()->GetArena()) LocationSummary(switch_instr, LocationSummary::kNoCall);
7020  locations->SetInAt(0, Location::RequiresRegister());
7021  if (switch_instr->GetNumEntries() > kPackedSwitchCompareJumpThreshold &&
7022      codegen_->GetAssembler()->IsThumb()) {
7023    locations->AddTemp(Location::RequiresRegister());  // We need a temp for the table base.
7024    if (switch_instr->GetStartValue() != 0) {
7025      locations->AddTemp(Location::RequiresRegister());  // We need a temp for the bias.
7026    }
7027  }
7028}
7029
7030void InstructionCodeGeneratorARM::VisitPackedSwitch(HPackedSwitch* switch_instr) {
7031  int32_t lower_bound = switch_instr->GetStartValue();
7032  uint32_t num_entries = switch_instr->GetNumEntries();
7033  LocationSummary* locations = switch_instr->GetLocations();
7034  Register value_reg = locations->InAt(0).AsRegister<Register>();
7035  HBasicBlock* default_block = switch_instr->GetDefaultBlock();
7036
7037  if (num_entries <= kPackedSwitchCompareJumpThreshold || !codegen_->GetAssembler()->IsThumb()) {
7038    // Create a series of compare/jumps.
7039    Register temp_reg = IP;
7040    // Note: It is fine for the below AddConstantSetFlags() using IP register to temporarily store
7041    // the immediate, because IP is used as the destination register. For the other
7042    // AddConstantSetFlags() and GenerateCompareWithImmediate(), the immediate values are constant,
7043    // and they can be encoded in the instruction without making use of IP register.
7044    __ AddConstantSetFlags(temp_reg, value_reg, -lower_bound);
7045
7046    const ArenaVector<HBasicBlock*>& successors = switch_instr->GetBlock()->GetSuccessors();
7047    // Jump to successors[0] if value == lower_bound.
7048    __ b(codegen_->GetLabelOf(successors[0]), EQ);
7049    int32_t last_index = 0;
7050    for (; num_entries - last_index > 2; last_index += 2) {
7051      __ AddConstantSetFlags(temp_reg, temp_reg, -2);
7052      // Jump to successors[last_index + 1] if value < case_value[last_index + 2].
7053      __ b(codegen_->GetLabelOf(successors[last_index + 1]), LO);
7054      // Jump to successors[last_index + 2] if value == case_value[last_index + 2].
7055      __ b(codegen_->GetLabelOf(successors[last_index + 2]), EQ);
7056    }
7057    if (num_entries - last_index == 2) {
7058      // The last missing case_value.
7059      __ CmpConstant(temp_reg, 1);
7060      __ b(codegen_->GetLabelOf(successors[last_index + 1]), EQ);
7061    }
7062
7063    // And the default for any other value.
7064    if (!codegen_->GoesToNextBlock(switch_instr->GetBlock(), default_block)) {
7065      __ b(codegen_->GetLabelOf(default_block));
7066    }
7067  } else {
7068    // Create a table lookup.
7069    Register temp_reg = locations->GetTemp(0).AsRegister<Register>();
7070
7071    // Materialize a pointer to the switch table
7072    std::vector<Label*> labels(num_entries);
7073    const ArenaVector<HBasicBlock*>& successors = switch_instr->GetBlock()->GetSuccessors();
7074    for (uint32_t i = 0; i < num_entries; i++) {
7075      labels[i] = codegen_->GetLabelOf(successors[i]);
7076    }
7077    JumpTable* table = __ CreateJumpTable(std::move(labels), temp_reg);
7078
7079    // Remove the bias.
7080    Register key_reg;
7081    if (lower_bound != 0) {
7082      key_reg = locations->GetTemp(1).AsRegister<Register>();
7083      __ AddConstant(key_reg, value_reg, -lower_bound);
7084    } else {
7085      key_reg = value_reg;
7086    }
7087
7088    // Check whether the value is in the table, jump to default block if not.
7089    __ CmpConstant(key_reg, num_entries - 1);
7090    __ b(codegen_->GetLabelOf(default_block), Condition::HI);
7091
7092    // Load the displacement from the table.
7093    __ ldr(temp_reg, Address(temp_reg, key_reg, Shift::LSL, 2));
7094
7095    // Dispatch is a direct add to the PC (for Thumb2).
7096    __ EmitJumpTableDispatch(table, temp_reg);
7097  }
7098}
7099
7100void LocationsBuilderARM::VisitArmDexCacheArraysBase(HArmDexCacheArraysBase* base) {
7101  LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(base);
7102  locations->SetOut(Location::RequiresRegister());
7103}
7104
7105void InstructionCodeGeneratorARM::VisitArmDexCacheArraysBase(HArmDexCacheArraysBase* base) {
7106  Register base_reg = base->GetLocations()->Out().AsRegister<Register>();
7107  CodeGeneratorARM::PcRelativePatchInfo* labels =
7108      codegen_->NewPcRelativeDexCacheArrayPatch(base->GetDexFile(), base->GetElementOffset());
7109  __ BindTrackedLabel(&labels->movw_label);
7110  __ movw(base_reg, /* placeholder */ 0u);
7111  __ BindTrackedLabel(&labels->movt_label);
7112  __ movt(base_reg, /* placeholder */ 0u);
7113  __ BindTrackedLabel(&labels->add_pc_label);
7114  __ add(base_reg, base_reg, ShifterOperand(PC));
7115}
7116
7117void CodeGeneratorARM::MoveFromReturnRegister(Location trg, Primitive::Type type) {
7118  if (!trg.IsValid()) {
7119    DCHECK_EQ(type, Primitive::kPrimVoid);
7120    return;
7121  }
7122
7123  DCHECK_NE(type, Primitive::kPrimVoid);
7124
7125  Location return_loc = InvokeDexCallingConventionVisitorARM().GetReturnLocation(type);
7126  if (return_loc.Equals(trg)) {
7127    return;
7128  }
7129
7130  // TODO: Consider pairs in the parallel move resolver, then this could be nicely merged
7131  //       with the last branch.
7132  if (type == Primitive::kPrimLong) {
7133    HParallelMove parallel_move(GetGraph()->GetArena());
7134    parallel_move.AddMove(return_loc.ToLow(), trg.ToLow(), Primitive::kPrimInt, nullptr);
7135    parallel_move.AddMove(return_loc.ToHigh(), trg.ToHigh(), Primitive::kPrimInt, nullptr);
7136    GetMoveResolver()->EmitNativeCode(&parallel_move);
7137  } else if (type == Primitive::kPrimDouble) {
7138    HParallelMove parallel_move(GetGraph()->GetArena());
7139    parallel_move.AddMove(return_loc.ToLow(), trg.ToLow(), Primitive::kPrimFloat, nullptr);
7140    parallel_move.AddMove(return_loc.ToHigh(), trg.ToHigh(), Primitive::kPrimFloat, nullptr);
7141    GetMoveResolver()->EmitNativeCode(&parallel_move);
7142  } else {
7143    // Let the parallel move resolver take care of all of this.
7144    HParallelMove parallel_move(GetGraph()->GetArena());
7145    parallel_move.AddMove(return_loc, trg, type, nullptr);
7146    GetMoveResolver()->EmitNativeCode(&parallel_move);
7147  }
7148}
7149
7150void LocationsBuilderARM::VisitClassTableGet(HClassTableGet* instruction) {
7151  LocationSummary* locations =
7152      new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
7153  locations->SetInAt(0, Location::RequiresRegister());
7154  locations->SetOut(Location::RequiresRegister());
7155}
7156
7157void InstructionCodeGeneratorARM::VisitClassTableGet(HClassTableGet* instruction) {
7158  LocationSummary* locations = instruction->GetLocations();
7159  if (instruction->GetTableKind() == HClassTableGet::TableKind::kVTable) {
7160    uint32_t method_offset = mirror::Class::EmbeddedVTableEntryOffset(
7161        instruction->GetIndex(), kArmPointerSize).SizeValue();
7162    __ LoadFromOffset(kLoadWord,
7163                      locations->Out().AsRegister<Register>(),
7164                      locations->InAt(0).AsRegister<Register>(),
7165                      method_offset);
7166  } else {
7167    uint32_t method_offset = static_cast<uint32_t>(ImTable::OffsetOfElement(
7168        instruction->GetIndex(), kArmPointerSize));
7169    __ LoadFromOffset(kLoadWord,
7170                      locations->Out().AsRegister<Register>(),
7171                      locations->InAt(0).AsRegister<Register>(),
7172                      mirror::Class::ImtPtrOffset(kArmPointerSize).Uint32Value());
7173    __ LoadFromOffset(kLoadWord,
7174                      locations->Out().AsRegister<Register>(),
7175                      locations->Out().AsRegister<Register>(),
7176                      method_offset);
7177  }
7178}
7179
7180#undef __
7181#undef QUICK_ENTRY_POINT
7182
7183}  // namespace arm
7184}  // namespace art
7185