1 /* 2 * Generic 32-bit "/2addr" binary operation. Provide an "instr" 3 * that specifies an instruction that performs "fv0 = fa0 op fa1". 4 * This could be an MIPS instruction or a function call. 5 * 6 * For: add-float/2addr, sub-float/2addr, mul-float/2addr, 7 * div-float/2addr, rem-float/2addr 8 */ 9 /* binop/2addr vA, vB */ 10 GET_OPA4(rOBJ) # rOBJ <- A+ 11 GET_OPB(a3) # a3 <- B 12 GET_VREG_F(fa0, rOBJ) 13 GET_VREG_F(fa1, a3) 14 FETCH_ADVANCE_INST(1) # advance rPC, load rINST 15 16 $instr 17 GET_INST_OPCODE(t0) # extract opcode from rINST 18 SET_VREG_F_GOTO(fv0, rOBJ, t0) # vA <- result 19