100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze%include "mips64/fcvtHeader.S" { "suffix":"_FLOAT", "valreg":"f0" }
200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    /*
300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze     * TODO: simplify this when the MIPS64R6 emulator
400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze     * supports NAN2008=1.
500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze     */
600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    li      t0, INT_MIN_AS_FLOAT
700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    mtc1    t0, f1
800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    cmp.le.s f1, f1, f0
900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    bc1nez  f1, .L${opcode}_trunc
1000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    cmp.eq.s f1, f0, f0
1100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    li      t0, INT_MIN
1200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    mfc1    t1, f1
1300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    and     t0, t0, t1
1400b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    b       .L${opcode}_done
1500b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze%break
1600b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L${opcode}_trunc:
1700b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    trunc.w.s f0, f0
1800b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    mfc1    t0, f0
1900b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze.L${opcode}_done:
2000b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    /* Can't include fcvtFooter.S after break */
2100b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    GET_INST_OPCODE v0                  # extract opcode from rINST
2200b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    SET_VREG t0, a1
2300b53b7f3f9ce5996b767b52c28dd846f47a723cAlexey Frunze    GOTO_OPCODE v0                      # jump to next instruction
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