14f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/* 2e83b0cadc67882c1ba7f430d16dab80c9b3a0228Dan Handley * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 34f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 44f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistribution and use in source and binary forms, with or without 54f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * modification, are permitted provided that the following conditions are met: 64f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 74f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistributions of source code must retain the above copyright notice, this 84f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * list of conditions and the following disclaimer. 94f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 104f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistributions in binary form must reproduce the above copyright notice, 114f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * this list of conditions and the following disclaimer in the documentation 124f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * and/or other materials provided with the distribution. 134f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 144f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Neither the name of ARM nor the names of its contributors may be used 154f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * to endorse or promote products derived from this software without specific 164f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * prior written permission. 174f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 184f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 194f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 204f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 214f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 224f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 234f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 264f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 284f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * POSSIBILITY OF SUCH DAMAGE. 294f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta */ 304f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 315f0cdb059d7d5c3a8a834074a7f236b85d014ddeDan Handley#include <platform_def.h> 324f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 334f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin GuptaOUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) 344f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin GuptaOUTPUT_ARCH(PLATFORM_LINKER_ARCH) 359f98aa1a7e33dd55851fd4feec0de9b40b6d9f10Jeenu ViswambharanENTRY(bl31_entrypoint) 364f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 374f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 384f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin GuptaMEMORY { 39d7fbf13267d910b1f8efd461c60f84e2355cba6aJuan Castillo RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_LIMIT - BL31_BASE 404f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta} 414f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 424f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 434f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin GuptaSECTIONS 444f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{ 458d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux . = BL31_BASE; 468d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux ASSERT(. == ALIGN(4096), 478d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux "BL31_BASE address is not aligned on a page boundary.") 484f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 498d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux ro . : { 508d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __RO_START__ = .; 51dccc537a7243d784e0b8b81ce1634e385c3b048bAndrew Thoelke *bl31_entrypoint.o(.text*) 52dccc537a7243d784e0b8b81ce1634e385c3b048bAndrew Thoelke *(.text*) 538d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux *(.rodata*) 547421b4653dcfe6b10be5ca7167d2a5f3584c95c1Achin Gupta 55dccc537a7243d784e0b8b81ce1634e385c3b048bAndrew Thoelke /* Ensure 8-byte alignment for descriptors and ensure inclusion */ 567421b4653dcfe6b10be5ca7167d2a5f3584c95c1Achin Gupta . = ALIGN(8); 577421b4653dcfe6b10be5ca7167d2a5f3584c95c1Achin Gupta __RT_SVC_DESCS_START__ = .; 58dccc537a7243d784e0b8b81ce1634e385c3b048bAndrew Thoelke KEEP(*(rt_svc_descs)) 597421b4653dcfe6b10be5ca7167d2a5f3584c95c1Achin Gupta __RT_SVC_DESCS_END__ = .; 607421b4653dcfe6b10be5ca7167d2a5f3584c95c1Achin Gupta 619b4768417051ead50135d1d7675cab940d864e8dSoby Mathew /* 629b4768417051ead50135d1d7675cab940d864e8dSoby Mathew * Ensure 8-byte alignment for cpu_ops so that its fields are also 639b4768417051ead50135d1d7675cab940d864e8dSoby Mathew * aligned. Also ensure cpu_ops inclusion. 649b4768417051ead50135d1d7675cab940d864e8dSoby Mathew */ 659b4768417051ead50135d1d7675cab940d864e8dSoby Mathew . = ALIGN(8); 669b4768417051ead50135d1d7675cab940d864e8dSoby Mathew __CPU_OPS_START__ = .; 679b4768417051ead50135d1d7675cab940d864e8dSoby Mathew KEEP(*(cpu_ops)) 689b4768417051ead50135d1d7675cab940d864e8dSoby Mathew __CPU_OPS_END__ = .; 699b4768417051ead50135d1d7675cab940d864e8dSoby Mathew 70b739f22a99c96d5a295f083125505b5b5ec2f8b6Achin Gupta *(.vectors) 718d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __RO_END_UNALIGNED__ = .; 728d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux /* 738d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * Memory page(s) mapped to this section will be marked as read-only, 748d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * executable. No RW data from the next section must creep in. 758d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * Ensure the rest of the current memory page is unused. 768d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux */ 778d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux . = NEXT(4096); 788d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __RO_END__ = .; 794f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta } >RAM 804f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 819b4768417051ead50135d1d7675cab940d864e8dSoby Mathew ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__, 829b4768417051ead50135d1d7675cab940d864e8dSoby Mathew "cpu_ops not defined for this platform.") 839b4768417051ead50135d1d7675cab940d864e8dSoby Mathew 848d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux .data . : { 858d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __DATA_START__ = .; 86dccc537a7243d784e0b8b81ce1634e385c3b048bAndrew Thoelke *(.data*) 878d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __DATA_END__ = .; 884f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta } >RAM 894f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 90a1b6db6c62aa500a0f2e3def3b97cda8a59c95e6Sandrine Bailleux#ifdef BL31_PROGBITS_LIMIT 91a1b6db6c62aa500a0f2e3def3b97cda8a59c95e6Sandrine Bailleux ASSERT(. <= BL31_PROGBITS_LIMIT, "BL3-1 progbits has exceeded its limit.") 92a1b6db6c62aa500a0f2e3def3b97cda8a59c95e6Sandrine Bailleux#endif 93a1b6db6c62aa500a0f2e3def3b97cda8a59c95e6Sandrine Bailleux 948d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux stacks (NOLOAD) : { 958d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __STACKS_START__ = .; 968d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux *(tzfw_normal_stacks) 978d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __STACKS_END__ = .; 984f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta } >RAM 994f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1008d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux /* 1018d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * The .bss section gets initialised to 0 at runtime. 1028d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * Its base address must be 16-byte aligned. 1038d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux */ 1048d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux .bss : ALIGN(16) { 1058d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __BSS_START__ = .; 106dccc537a7243d784e0b8b81ce1634e385c3b048bAndrew Thoelke *(.bss*) 1074f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta *(COMMON) 1088d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __BSS_END__ = .; 1094f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta } >RAM 1104f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1118d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux /* 112e3fff153803bcf256d95e5b4d31a0c04d50ed5e4Jeenu Viswambharan * The xlat_table section is for full, aligned page tables (4K). 113a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta * Removing them from .bss avoids forcing 4K alignment on 114a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta * the .bss section and eliminates the unecessary zero init 115a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta */ 116a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta xlat_table (NOLOAD) : { 117a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta *(xlat_table) 118a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta } >RAM 119a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta 120ab8707e6875a9fe447ff04fad9053d7d719f89e6Soby Mathew#if USE_COHERENT_MEM 121a0cd989dd589acaa6cddaa6617bd59dde0b8ce26Achin Gupta /* 1228d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * The base address of the coherent memory section must be page-aligned (4K) 1238d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * to guarantee that the coherent data are stored on their own pages and 1248d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * are not mixed with normal data. This is required to set up the correct 1258d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * memory attributes for the coherent data page tables. 1268d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux */ 1278d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux coherent_ram (NOLOAD) : ALIGN(4096) { 1288d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __COHERENT_RAM_START__ = .; 1298d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux *(tzfw_coherent_mem) 1308d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __COHERENT_RAM_END_UNALIGNED__ = .; 1318d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux /* 1328d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * Memory page(s) mapped to this section will be marked 1338d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * as device memory. No other unexpected data must creep in. 1348d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * Ensure the rest of the current memory page is unused. 1358d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux */ 1368d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux . = NEXT(4096); 1378d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __COHERENT_RAM_END__ = .; 1384f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta } >RAM 139ab8707e6875a9fe447ff04fad9053d7d719f89e6Soby Mathew#endif 1404f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1418d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __BL31_END__ = .; 1424f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1438d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __BSS_SIZE__ = SIZEOF(.bss); 144ab8707e6875a9fe447ff04fad9053d7d719f89e6Soby Mathew#if USE_COHERENT_MEM 1458d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __COHERENT_RAM_UNALIGNED_SIZE__ = 1468d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__; 147ab8707e6875a9fe447ff04fad9053d7d719f89e6Soby Mathew#endif 1484f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 149a37255a205fa004bfc075aca81cef45b99dc30cbSandrine Bailleux ASSERT(. <= BL31_LIMIT, "BL3-1 image has exceeded its limit.") 1504f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta} 151