bl1_fvp_setup.c revision 4f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5
14f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/*
24f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Copyright (c) 2013, ARM Limited. All rights reserved.
34f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta *
44f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistribution and use in source and binary forms, with or without
54f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * modification, are permitted provided that the following conditions are met:
64f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta *
74f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistributions of source code must retain the above copyright notice, this
84f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * list of conditions and the following disclaimer.
94f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta *
104f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistributions in binary form must reproduce the above copyright notice,
114f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * this list of conditions and the following disclaimer in the documentation
124f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * and/or other materials provided with the distribution.
134f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta *
144f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Neither the name of ARM nor the names of its contributors may be used
154f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * to endorse or promote products derived from this software without specific
164f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * prior written permission.
174f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta *
184f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
194f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
204f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
214f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
224f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
234f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
244f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
254f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
264f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
274f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
284f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * POSSIBILITY OF SUCH DAMAGE.
294f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta */
304f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
314f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <string.h>
324f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <assert.h>
334f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <arch_helpers.h>
344f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <platform.h>
354f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <bl1.h>
364f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <console.h>
374f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
384f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/*******************************************************************************
394f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Declarations of linker defined symbols which will help us find the layout
404f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * of trusted SRAM
414f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/
424f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#if defined (__GNUC__)
434f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_ROM_START__;
444f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_ROM_SIZE__;
454f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_DATA_START__;
464f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_DATA_SIZE__;
474f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_BSS_START__;
484f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_BSS_SIZE__;
494f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __DATA_RAM_START__;
504f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __DATA_RAM_SIZE__;
514f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __BSS_RAM_START__;
524f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __BSS_RAM_SIZE__;
534f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_RAM_STACKS_START__;
544f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_RAM_STACKS_SIZE__;
554f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_RAM_PAGETABLES_START__;
564f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_RAM_PAGETABLES_SIZE__;
574f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_RAM_COHERENT_START__;
584f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptaextern unsigned long __FIRMWARE_RAM_COHERENT_SIZE__;
594f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
604f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_COHERENT_MEM_BASE	(&__FIRMWARE_RAM_COHERENT_START__)
614f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_COHERENT_MEM_LIMIT \
624f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	((unsigned long long)&__FIRMWARE_RAM_COHERENT_START__ + \
634f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 (unsigned long long)&__FIRMWARE_RAM_COHERENT_SIZE__)
644f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
654f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_FIRMWARE_RAM_GLOBALS_ZI_BASE \
664f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	(unsigned long)(&__BSS_RAM_START__)
674f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_FIRMWARE_RAM_GLOBALS_ZI_LENGTH \
684f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	(unsigned long)(&__FIRMWARE_BSS_SIZE__)
694f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
704f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_FIRMWARE_RAM_COHERENT_ZI_BASE \
714f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	(unsigned long)(&__FIRMWARE_RAM_COHERENT_START__)
724f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_FIRMWARE_RAM_COHERENT_ZI_LENGTH\
734f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	(unsigned long)(&__FIRMWARE_RAM_COHERENT_SIZE__)
744f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
754f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_NORMAL_RAM_BASE (unsigned long)(&__BSS_RAM_START__)
764f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#define BL1_NORMAL_RAM_LIMIT \
774f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	((unsigned long)&__FIRMWARE_RAM_COHERENT_START__ +	\
784f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 (unsigned long)&__FIRMWARE_RAM_COHERENT_SIZE__)
794f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#else
804f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta #error "Unknown compiler."
814f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#endif
824f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
834f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
844f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/* Data structure which holds the extents of the trusted SRAM for BL1*/
854f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptastatic meminfo bl1_tzram_layout = {0};
864f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
874f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptameminfo bl1_get_sec_mem_layout(void)
884f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{
894f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	return bl1_tzram_layout;
904f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta}
914f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
924f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/*******************************************************************************
934f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Perform any BL1 specific platform actions.
944f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/
954f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptavoid bl1_early_platform_setup(void)
964f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{
974f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	unsigned long bl1_normal_ram_base;
984f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	unsigned long bl1_coherent_ram_limit;
994f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	unsigned long tzram_limit = TZRAM_BASE + TZRAM_SIZE;
1004f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1014f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	/*
1024f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * Initialize extents of the bl1 sections as per the platform
1034f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * defined values.
1044f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 */
1054f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	bl1_normal_ram_base  = BL1_NORMAL_RAM_BASE;
1064f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	bl1_coherent_ram_limit = BL1_NORMAL_RAM_LIMIT;
1074f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1084f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	/*
1094f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * Calculate how much ram is BL1 using & how much remains free.
1104f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * This also includes a rudimentary mechanism to detect whether
1114f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * the BL1 data is loaded at the top or bottom of memory.
1124f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * TODO: add support for discontigous chunks of free ram if
1134f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 *       needed. Might need dynamic memory allocation support
1144f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 *       et al.
1154f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 *       Also assuming that the section for coherent memory is
1164f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 *       the last and for globals the first in the scatter file.
1174f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 */
1184f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	bl1_tzram_layout.total_base = TZRAM_BASE;
1194f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	bl1_tzram_layout.total_size = TZRAM_SIZE;
1204f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1214f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	if (bl1_coherent_ram_limit == tzram_limit) {
1224f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		bl1_tzram_layout.free_base = TZRAM_BASE;
1234f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		bl1_tzram_layout.free_size = bl1_normal_ram_base - TZRAM_BASE;
1244f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	} else {
1254f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		bl1_tzram_layout.free_base = bl1_coherent_ram_limit;
1264f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		bl1_tzram_layout.free_size =
1274f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta			tzram_limit - bl1_coherent_ram_limit;
1284f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	}
1294f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta}
1304f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1314f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/*******************************************************************************
1324f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Function which will evaluate how much of the trusted ram has been gobbled
1334f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * up by BL1 and return the base and size of whats available for loading BL2.
1344f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Its called after coherency and the MMU have been turned on.
1354f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/
1364f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptavoid bl1_platform_setup(void)
1374f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{
1384f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	/*
1394f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * This should zero out our coherent stacks as well but we don't care
1404f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 * as they are not being used right now.
1414f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	 */
1424f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	memset((void *) BL1_FIRMWARE_RAM_COHERENT_ZI_BASE, 0,
1434f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	       (size_t) BL1_FIRMWARE_RAM_COHERENT_ZI_LENGTH);
1444f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1454f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	/* Enable and initialize the System level generic timer */
1464f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_EN);
1474f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1484f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	/* Initialize the console */
1494f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	console_init();
1504f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1514f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	return;
1524f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta}
1534f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta
1544f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/*******************************************************************************
1554f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Perform the very early platform specific architecture setup here. At the
1564f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * moment this is only intializes the mmu in a quick and dirty way. Later arch-
1574f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * itectural setup (bl1_arch_setup()) does not do anything platform specific.
1584f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/
1594f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptavoid bl1_plat_arch_setup(void)
1604f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{
1614f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta	configure_mmu(&bl1_tzram_layout,
1624f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		TZROM_BASE,			/* Read_only region start */
1634f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		TZROM_BASE + TZROM_SIZE,	/* Read_only region size */
1644f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		/* Coherent region start */
1654f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		BL1_FIRMWARE_RAM_COHERENT_ZI_BASE,
1664f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		/* Coherent region size */
1674f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta		BL1_FIRMWARE_RAM_COHERENT_ZI_BASE +
1684f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta			BL1_FIRMWARE_RAM_COHERENT_ZI_LENGTH);
1694f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta}
170