bl1_fvp_setup.c revision 9d72b4ea9c7d9cac386f70d8a6581d4b1a45d7b0
14f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/* 2e83b0cadc67882c1ba7f430d16dab80c9b3a0228Dan Handley * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 34f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 44f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistribution and use in source and binary forms, with or without 54f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * modification, are permitted provided that the following conditions are met: 64f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 74f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistributions of source code must retain the above copyright notice, this 84f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * list of conditions and the following disclaimer. 94f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 104f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Redistributions in binary form must reproduce the above copyright notice, 114f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * this list of conditions and the following disclaimer in the documentation 124f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * and/or other materials provided with the distribution. 134f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 144f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Neither the name of ARM nor the names of its contributors may be used 154f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * to endorse or promote products derived from this software without specific 164f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * prior written permission. 174f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * 184f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 194f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 204f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 214f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 224f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 234f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 264f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 284f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * POSSIBILITY OF SUCH DAMAGE. 294f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta */ 304f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 314f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <string.h> 324f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <assert.h> 334f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <arch_helpers.h> 344f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <platform.h> 354f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <bl1.h> 364f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta#include <console.h> 3730affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel#include <cci400.h> 384f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 394f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/******************************************************************************* 404f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Declarations of linker defined symbols which will help us find the layout 414f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * of trusted SRAM 424f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/ 438d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleuxextern unsigned long __COHERENT_RAM_START__; 448d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleuxextern unsigned long __COHERENT_RAM_END__; 458d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux 468d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleuxextern unsigned long __BL1_RAM_START__; 478d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleuxextern unsigned long __BL1_RAM_END__; 488d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux 498d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux/* 508d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * The next 2 constants identify the extents of the coherent memory region. 518d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * These addresses are used by the MMU setup code and therefore they must be 528d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * page-aligned. It is the responsibility of the linker script to ensure that 538d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to 548d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux * page-aligned addresses. 558d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux */ 568d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) 578d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) 588d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux 598d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux#define BL1_RAM_BASE (unsigned long)(&__BL1_RAM_START__) 608d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux#define BL1_RAM_LIMIT (unsigned long)(&__BL1_RAM_END__) 614f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 624f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 634f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/* Data structure which holds the extents of the trusted SRAM for BL1*/ 64204aa03da7d8a34d5e06fba3ccc9e565ed01d305Sandrine Bailleuxstatic meminfo bl1_tzram_layout; 654f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 66ee12f6f7497882fdcc8acc7774c516739296799eSandrine Bailleuxmeminfo *bl1_plat_sec_mem_layout(void) 674f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{ 68ee12f6f7497882fdcc8acc7774c516739296799eSandrine Bailleux return &bl1_tzram_layout; 694f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta} 704f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 714f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/******************************************************************************* 724f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Perform any BL1 specific platform actions. 734f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/ 744f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptavoid bl1_early_platform_setup(void) 754f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{ 768d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux const unsigned long bl1_ram_base = BL1_RAM_BASE; 778d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux const unsigned long bl1_ram_limit = BL1_RAM_LIMIT; 788d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux const unsigned long tzram_limit = TZRAM_BASE + TZRAM_SIZE; 794f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 804f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta /* 814f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Calculate how much ram is BL1 using & how much remains free. 824f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * This also includes a rudimentary mechanism to detect whether 834f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * the BL1 data is loaded at the top or bottom of memory. 844f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * TODO: add support for discontigous chunks of free ram if 854f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * needed. Might need dynamic memory allocation support 864f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * et al. 874f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta */ 884f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta bl1_tzram_layout.total_base = TZRAM_BASE; 894f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta bl1_tzram_layout.total_size = TZRAM_SIZE; 904f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 918d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux if (bl1_ram_limit == tzram_limit) { 928d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux /* BL1 has been loaded at the top of memory. */ 934f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta bl1_tzram_layout.free_base = TZRAM_BASE; 948d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux bl1_tzram_layout.free_size = bl1_ram_base - TZRAM_BASE; 954f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta } else { 968d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux /* BL1 has been loaded at the bottom of memory. */ 978d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux bl1_tzram_layout.free_base = bl1_ram_limit; 984f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta bl1_tzram_layout.free_size = 998d69a03f6a7db3c437b7cfdd15402627277d8cb4Sandrine Bailleux tzram_limit - bl1_ram_limit; 1004f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta } 10130affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel 10230affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel /* Initialize the platform config for future decision making */ 10330affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel platform_config_setup(); 1044f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta} 1054f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1064f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/******************************************************************************* 1074f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Function which will evaluate how much of the trusted ram has been gobbled 1084f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * up by BL1 and return the base and size of whats available for loading BL2. 1094f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Its called after coherency and the MMU have been turned on. 1104f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/ 1114f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptavoid bl1_platform_setup(void) 1124f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{ 1139d72b4ea9c7d9cac386f70d8a6581d4b1a45d7b0James Morrissey /* Initialise the IO layer and register platform IO devices */ 1149d72b4ea9c7d9cac386f70d8a6581d4b1a45d7b0James Morrissey io_setup(); 1159d72b4ea9c7d9cac386f70d8a6581d4b1a45d7b0James Morrissey 1164f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta /* Enable and initialize the System level generic timer */ 1174f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_EN); 1184f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1194f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta /* Initialize the console */ 1204f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta console_init(); 1214f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1224f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta return; 1234f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta} 1244f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta 1259d72b4ea9c7d9cac386f70d8a6581d4b1a45d7b0James Morrissey 1264f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta/******************************************************************************* 1274f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta * Perform the very early platform specific architecture setup here. At the 12830affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel * moment this only does basic initialization. Later architectural setup 12930affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel * (bl1_arch_setup()) does not do anything platform specific. 1304f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta ******************************************************************************/ 1314f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Guptavoid bl1_plat_arch_setup(void) 1324f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta{ 13330affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel unsigned long cci_setup; 13430affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel 13530affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel /* 13630affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel * Enable CCI-400 for this cluster. No need 13730affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel * for locks as no other cpu is active at the 13830affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel * moment 13930affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel */ 14030affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel cci_setup = platform_get_cfgvar(CONFIG_HAS_CCI); 14130affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel if (cci_setup) { 14230affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel cci_enable_coherency(read_mpidr()); 14330affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel } 14430affd563a98441155d3188f705c7b8be9e3ebefHarry Liebel 1454f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta configure_mmu(&bl1_tzram_layout, 1468468739c5f19928240934f80c6582e45985bf975Ian Spray TZROM_BASE, 1478468739c5f19928240934f80c6582e45985bf975Ian Spray TZROM_BASE + TZROM_SIZE, 1488468739c5f19928240934f80c6582e45985bf975Ian Spray BL1_COHERENT_RAM_BASE, 1498468739c5f19928240934f80c6582e45985bf975Ian Spray BL1_COHERENT_RAM_LIMIT); 1504f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a5Achin Gupta} 151